1 /* 2 * fireworks.h - a part of driver for Fireworks based devices 3 * 4 * Copyright (c) 2009-2010 Clemens Ladisch 5 * Copyright (c) 2013-2014 Takashi Sakamoto 6 * 7 * Licensed under the terms of the GNU General Public License, version 2. 8 */ 9 #ifndef SOUND_FIREWORKS_H_INCLUDED 10 #define SOUND_FIREWORKS_H_INCLUDED 11 12 #include <linux/compat.h> 13 #include <linux/device.h> 14 #include <linux/firewire.h> 15 #include <linux/firewire-constants.h> 16 #include <linux/module.h> 17 #include <linux/mod_devicetable.h> 18 #include <linux/delay.h> 19 #include <linux/slab.h> 20 21 #include <sound/core.h> 22 #include <sound/initval.h> 23 #include <sound/pcm.h> 24 25 #include "../packets-buffer.h" 26 #include "../iso-resources.h" 27 #include "../amdtp.h" 28 #include "../cmp.h" 29 #include "../lib.h" 30 31 #define SND_EFW_MAX_MIDI_OUT_PORTS 2 32 #define SND_EFW_MAX_MIDI_IN_PORTS 2 33 34 #define SND_EFW_MULTIPLIER_MODES 3 35 #define HWINFO_NAME_SIZE_BYTES 32 36 #define HWINFO_MAX_CAPS_GROUPS 8 37 38 /* 39 * This should be greater than maximum bytes for EFW response content. 40 * Currently response against command for isochronous channel mapping is 41 * confirmed to be the maximum one. But for flexibility, use maximum data 42 * payload for asynchronous primary packets at S100 (Cable base rate) in 43 * IEEE Std 1394-1995. 44 */ 45 #define SND_EFW_RESPONSE_MAXIMUM_BYTES 0x200U 46 47 struct snd_efw_phys_grp { 48 u8 type; /* see enum snd_efw_grp_type */ 49 u8 count; 50 } __packed; 51 52 struct snd_efw { 53 struct snd_card *card; 54 struct fw_unit *unit; 55 int card_index; 56 57 struct mutex mutex; 58 spinlock_t lock; 59 60 /* for transaction */ 61 u32 seqnum; 62 bool resp_addr_changable; 63 64 unsigned int midi_in_ports; 65 unsigned int midi_out_ports; 66 67 unsigned int supported_sampling_rate; 68 unsigned int pcm_capture_channels[SND_EFW_MULTIPLIER_MODES]; 69 unsigned int pcm_playback_channels[SND_EFW_MULTIPLIER_MODES]; 70 71 struct amdtp_stream *master; 72 struct amdtp_stream tx_stream; 73 struct amdtp_stream rx_stream; 74 struct cmp_connection out_conn; 75 struct cmp_connection in_conn; 76 atomic_t capture_substreams; 77 atomic_t playback_substreams; 78 }; 79 80 struct snd_efw_transaction { 81 __be32 length; 82 __be32 version; 83 __be32 seqnum; 84 __be32 category; 85 __be32 command; 86 __be32 status; 87 __be32 params[0]; 88 }; 89 int snd_efw_transaction_run(struct fw_unit *unit, 90 const void *cmd, unsigned int cmd_size, 91 void *resp, unsigned int resp_size); 92 int snd_efw_transaction_register(void); 93 void snd_efw_transaction_unregister(void); 94 void snd_efw_transaction_bus_reset(struct fw_unit *unit); 95 96 struct snd_efw_hwinfo { 97 u32 flags; 98 u32 guid_hi; 99 u32 guid_lo; 100 u32 type; 101 u32 version; 102 char vendor_name[HWINFO_NAME_SIZE_BYTES]; 103 char model_name[HWINFO_NAME_SIZE_BYTES]; 104 u32 supported_clocks; 105 u32 amdtp_rx_pcm_channels; 106 u32 amdtp_tx_pcm_channels; 107 u32 phys_out; 108 u32 phys_in; 109 u32 phys_out_grp_count; 110 struct snd_efw_phys_grp phys_out_grps[HWINFO_MAX_CAPS_GROUPS]; 111 u32 phys_in_grp_count; 112 struct snd_efw_phys_grp phys_in_grps[HWINFO_MAX_CAPS_GROUPS]; 113 u32 midi_out_ports; 114 u32 midi_in_ports; 115 u32 max_sample_rate; 116 u32 min_sample_rate; 117 u32 dsp_version; 118 u32 arm_version; 119 u32 mixer_playback_channels; 120 u32 mixer_capture_channels; 121 u32 fpga_version; 122 u32 amdtp_rx_pcm_channels_2x; 123 u32 amdtp_tx_pcm_channels_2x; 124 u32 amdtp_rx_pcm_channels_4x; 125 u32 amdtp_tx_pcm_channels_4x; 126 u32 reserved[16]; 127 } __packed; 128 enum snd_efw_grp_type { 129 SND_EFW_CH_TYPE_ANALOG = 0, 130 SND_EFW_CH_TYPE_SPDIF = 1, 131 SND_EFW_CH_TYPE_ADAT = 2, 132 SND_EFW_CH_TYPE_SPDIF_OR_ADAT = 3, 133 SND_EFW_CH_TYPE_ANALOG_MIRRORING = 4, 134 SND_EFW_CH_TYPE_HEADPHONES = 5, 135 SND_EFW_CH_TYPE_I2S = 6, 136 SND_EFW_CH_TYPE_GUITAR = 7, 137 SND_EFW_CH_TYPE_PIEZO_GUITAR = 8, 138 SND_EFW_CH_TYPE_GUITAR_STRING = 9, 139 SND_EFW_CH_TYPE_VIRTUAL = 0x10000, 140 SND_EFW_CH_TYPE_DUMMY 141 }; 142 struct snd_efw_phys_meters { 143 u32 status; /* guitar state/midi signal/clock input detect */ 144 u32 reserved0; 145 u32 reserved1; 146 u32 reserved2; 147 u32 reserved3; 148 u32 out_meters; 149 u32 in_meters; 150 u32 reserved4; 151 u32 reserved5; 152 u32 values[0]; 153 } __packed; 154 enum snd_efw_clock_source { 155 SND_EFW_CLOCK_SOURCE_INTERNAL = 0, 156 SND_EFW_CLOCK_SOURCE_SYTMATCH = 1, 157 SND_EFW_CLOCK_SOURCE_WORDCLOCK = 2, 158 SND_EFW_CLOCK_SOURCE_SPDIF = 3, 159 SND_EFW_CLOCK_SOURCE_ADAT_1 = 4, 160 SND_EFW_CLOCK_SOURCE_ADAT_2 = 5, 161 SND_EFW_CLOCK_SOURCE_CONTINUOUS = 6 /* internal variable clock */ 162 }; 163 enum snd_efw_transport_mode { 164 SND_EFW_TRANSPORT_MODE_WINDOWS = 0, 165 SND_EFW_TRANSPORT_MODE_IEC61883 = 1, 166 }; 167 int snd_efw_command_set_resp_addr(struct snd_efw *efw, 168 u16 addr_high, u32 addr_low); 169 int snd_efw_command_set_tx_mode(struct snd_efw *efw, unsigned int mode); 170 int snd_efw_command_get_hwinfo(struct snd_efw *efw, 171 struct snd_efw_hwinfo *hwinfo); 172 int snd_efw_command_get_phys_meters(struct snd_efw *efw, 173 struct snd_efw_phys_meters *meters, 174 unsigned int len); 175 int snd_efw_command_get_clock_source(struct snd_efw *efw, 176 enum snd_efw_clock_source *source); 177 int snd_efw_command_get_sampling_rate(struct snd_efw *efw, unsigned int *rate); 178 int snd_efw_command_set_sampling_rate(struct snd_efw *efw, unsigned int rate); 179 180 int snd_efw_stream_init_duplex(struct snd_efw *efw); 181 int snd_efw_stream_start_duplex(struct snd_efw *efw, int sampling_rate); 182 void snd_efw_stream_stop_duplex(struct snd_efw *efw); 183 void snd_efw_stream_update_duplex(struct snd_efw *efw); 184 void snd_efw_stream_destroy_duplex(struct snd_efw *efw); 185 186 #define SND_EFW_DEV_ENTRY(vendor, model) \ 187 { \ 188 .match_flags = IEEE1394_MATCH_VENDOR_ID | \ 189 IEEE1394_MATCH_MODEL_ID, \ 190 .vendor_id = vendor,\ 191 .model_id = model \ 192 } 193 194 #endif 195