1 /* 2 * linux/sound/arm/aaci.c - ARM PrimeCell AACI PL041 driver 3 * 4 * Copyright (C) 2003 Deep Blue Solutions Ltd, All Rights Reserved. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 * 10 * Documentation: ARM DDI 0173B 11 */ 12 #include <linux/module.h> 13 #include <linux/delay.h> 14 #include <linux/init.h> 15 #include <linux/ioport.h> 16 #include <linux/device.h> 17 #include <linux/spinlock.h> 18 #include <linux/interrupt.h> 19 #include <linux/err.h> 20 #include <linux/amba/bus.h> 21 22 #include <asm/io.h> 23 #include <asm/irq.h> 24 #include <asm/sizes.h> 25 26 #include <sound/driver.h> 27 #include <sound/core.h> 28 #include <sound/initval.h> 29 #include <sound/ac97_codec.h> 30 #include <sound/pcm.h> 31 #include <sound/pcm_params.h> 32 33 #include "aaci.h" 34 #include "devdma.h" 35 36 #define DRIVER_NAME "aaci-pl041" 37 38 /* 39 * PM support is not complete. Turn it off. 40 */ 41 #undef CONFIG_PM 42 43 static void aaci_ac97_select_codec(struct aaci *aaci, ac97_t *ac97) 44 { 45 u32 v, maincr = aaci->maincr | MAINCR_SCRA(ac97->num); 46 47 /* 48 * Ensure that the slot 1/2 RX registers are empty. 49 */ 50 v = readl(aaci->base + AACI_SLFR); 51 if (v & SLFR_2RXV) 52 readl(aaci->base + AACI_SL2RX); 53 if (v & SLFR_1RXV) 54 readl(aaci->base + AACI_SL1RX); 55 56 writel(maincr, aaci->base + AACI_MAINCR); 57 } 58 59 /* 60 * P29: 61 * The recommended use of programming the external codec through slot 1 62 * and slot 2 data is to use the channels during setup routines and the 63 * slot register at any other time. The data written into slot 1, slot 2 64 * and slot 12 registers is transmitted only when their corresponding 65 * SI1TxEn, SI2TxEn and SI12TxEn bits are set in the AACI_MAINCR 66 * register. 67 */ 68 static void aaci_ac97_write(ac97_t *ac97, unsigned short reg, unsigned short val) 69 { 70 struct aaci *aaci = ac97->private_data; 71 u32 v; 72 73 if (ac97->num >= 4) 74 return; 75 76 down(&aaci->ac97_sem); 77 78 aaci_ac97_select_codec(aaci, ac97); 79 80 /* 81 * P54: You must ensure that AACI_SL2TX is always written 82 * to, if required, before data is written to AACI_SL1TX. 83 */ 84 writel(val << 4, aaci->base + AACI_SL2TX); 85 writel(reg << 12, aaci->base + AACI_SL1TX); 86 87 /* 88 * Wait for the transmission of both slots to complete. 89 */ 90 do { 91 v = readl(aaci->base + AACI_SLFR); 92 } while (v & (SLFR_1TXB|SLFR_2TXB)); 93 94 up(&aaci->ac97_sem); 95 } 96 97 /* 98 * Read an AC'97 register. 99 */ 100 static unsigned short aaci_ac97_read(ac97_t *ac97, unsigned short reg) 101 { 102 struct aaci *aaci = ac97->private_data; 103 u32 v; 104 105 if (ac97->num >= 4) 106 return ~0; 107 108 down(&aaci->ac97_sem); 109 110 aaci_ac97_select_codec(aaci, ac97); 111 112 /* 113 * Write the register address to slot 1. 114 */ 115 writel((reg << 12) | (1 << 19), aaci->base + AACI_SL1TX); 116 117 /* 118 * Wait for the transmission to complete. 119 */ 120 do { 121 v = readl(aaci->base + AACI_SLFR); 122 } while (v & SLFR_1TXB); 123 124 /* 125 * Give the AC'97 codec more than enough time 126 * to respond. (42us = ~2 frames at 48kHz.) 127 */ 128 udelay(42); 129 130 /* 131 * Wait for slot 2 to indicate data. 132 */ 133 do { 134 cond_resched(); 135 v = readl(aaci->base + AACI_SLFR) & (SLFR_1RXV|SLFR_2RXV); 136 } while (v != (SLFR_1RXV|SLFR_2RXV)); 137 138 v = readl(aaci->base + AACI_SL1RX) >> 12; 139 if (v == reg) { 140 v = readl(aaci->base + AACI_SL2RX) >> 4; 141 } else { 142 dev_err(&aaci->dev->dev, 143 "wrong ac97 register read back (%x != %x)\n", 144 v, reg); 145 v = ~0; 146 } 147 148 up(&aaci->ac97_sem); 149 return v; 150 } 151 152 static inline void aaci_chan_wait_ready(struct aaci_runtime *aacirun) 153 { 154 u32 val; 155 int timeout = 5000; 156 157 do { 158 val = readl(aacirun->base + AACI_SR); 159 } while (val & (SR_TXB|SR_RXB) && timeout--); 160 } 161 162 163 164 /* 165 * Interrupt support. 166 */ 167 static void aaci_fifo_irq(struct aaci *aaci, u32 mask) 168 { 169 if (mask & ISR_URINTR) { 170 writel(ICLR_TXUEC1, aaci->base + AACI_INTCLR); 171 } 172 173 if (mask & ISR_TXINTR) { 174 struct aaci_runtime *aacirun = &aaci->playback; 175 void *ptr; 176 177 if (!aacirun->substream || !aacirun->start) { 178 dev_warn(&aaci->dev->dev, "TX interrupt???"); 179 writel(0, aacirun->base + AACI_IE); 180 return; 181 } 182 183 ptr = aacirun->ptr; 184 do { 185 unsigned int len = aacirun->fifosz; 186 u32 val; 187 188 if (aacirun->bytes <= 0) { 189 aacirun->bytes += aacirun->period; 190 aacirun->ptr = ptr; 191 spin_unlock(&aaci->lock); 192 snd_pcm_period_elapsed(aacirun->substream); 193 spin_lock(&aaci->lock); 194 } 195 if (!(aacirun->cr & TXCR_TXEN)) 196 break; 197 198 val = readl(aacirun->base + AACI_SR); 199 if (!(val & SR_TXHE)) 200 break; 201 if (!(val & SR_TXFE)) 202 len >>= 1; 203 204 aacirun->bytes -= len; 205 206 /* writing 16 bytes at a time */ 207 for ( ; len > 0; len -= 16) { 208 asm( 209 "ldmia %0!, {r0, r1, r2, r3}\n\t" 210 "stmia %1, {r0, r1, r2, r3}" 211 : "+r" (ptr) 212 : "r" (aacirun->fifo) 213 : "r0", "r1", "r2", "r3", "cc"); 214 215 if (ptr >= aacirun->end) 216 ptr = aacirun->start; 217 } 218 } while (1); 219 220 aacirun->ptr = ptr; 221 } 222 } 223 224 static irqreturn_t aaci_irq(int irq, void *devid, struct pt_regs *regs) 225 { 226 struct aaci *aaci = devid; 227 u32 mask; 228 int i; 229 230 spin_lock(&aaci->lock); 231 mask = readl(aaci->base + AACI_ALLINTS); 232 if (mask) { 233 u32 m = mask; 234 for (i = 0; i < 4; i++, m >>= 7) { 235 if (m & 0x7f) { 236 aaci_fifo_irq(aaci, m); 237 } 238 } 239 } 240 spin_unlock(&aaci->lock); 241 242 return mask ? IRQ_HANDLED : IRQ_NONE; 243 } 244 245 246 247 /* 248 * ALSA support. 249 */ 250 251 struct aaci_stream { 252 unsigned char codec_idx; 253 unsigned char rate_idx; 254 }; 255 256 static struct aaci_stream aaci_streams[] = { 257 [ACSTREAM_FRONT] = { 258 .codec_idx = 0, 259 .rate_idx = AC97_RATES_FRONT_DAC, 260 }, 261 [ACSTREAM_SURROUND] = { 262 .codec_idx = 0, 263 .rate_idx = AC97_RATES_SURR_DAC, 264 }, 265 [ACSTREAM_LFE] = { 266 .codec_idx = 0, 267 .rate_idx = AC97_RATES_LFE_DAC, 268 }, 269 }; 270 271 static inline unsigned int aaci_rate_mask(struct aaci *aaci, int streamid) 272 { 273 struct aaci_stream *s = aaci_streams + streamid; 274 return aaci->ac97_bus->codec[s->codec_idx]->rates[s->rate_idx]; 275 } 276 277 static unsigned int rate_list[] = { 278 5512, 8000, 11025, 16000, 22050, 32000, 44100, 279 48000, 64000, 88200, 96000, 176400, 192000 280 }; 281 282 /* 283 * Double-rate rule: we can support double rate iff channels == 2 284 * (unimplemented) 285 */ 286 static int 287 aaci_rule_rate_by_channels(snd_pcm_hw_params_t *p, snd_pcm_hw_rule_t *rule) 288 { 289 struct aaci *aaci = rule->private; 290 unsigned int rate_mask = SNDRV_PCM_RATE_8000_48000|SNDRV_PCM_RATE_5512; 291 snd_interval_t *c = hw_param_interval(p, SNDRV_PCM_HW_PARAM_CHANNELS); 292 293 switch (c->max) { 294 case 6: 295 rate_mask &= aaci_rate_mask(aaci, ACSTREAM_LFE); 296 case 4: 297 rate_mask &= aaci_rate_mask(aaci, ACSTREAM_SURROUND); 298 case 2: 299 rate_mask &= aaci_rate_mask(aaci, ACSTREAM_FRONT); 300 } 301 302 return snd_interval_list(hw_param_interval(p, rule->var), 303 ARRAY_SIZE(rate_list), rate_list, 304 rate_mask); 305 } 306 307 static snd_pcm_hardware_t aaci_hw_info = { 308 .info = SNDRV_PCM_INFO_MMAP | 309 SNDRV_PCM_INFO_MMAP_VALID | 310 SNDRV_PCM_INFO_INTERLEAVED | 311 SNDRV_PCM_INFO_BLOCK_TRANSFER | 312 SNDRV_PCM_INFO_RESUME, 313 314 /* 315 * ALSA doesn't support 18-bit or 20-bit packed into 32-bit 316 * words. It also doesn't support 12-bit at all. 317 */ 318 .formats = SNDRV_PCM_FMTBIT_S16_LE, 319 320 /* should this be continuous or knot? */ 321 .rates = SNDRV_PCM_RATE_CONTINUOUS, 322 .rate_max = 48000, 323 .rate_min = 4000, 324 .channels_min = 2, 325 .channels_max = 6, 326 .buffer_bytes_max = 64 * 1024, 327 .period_bytes_min = 256, 328 .period_bytes_max = PAGE_SIZE, 329 .periods_min = 4, 330 .periods_max = PAGE_SIZE / 16, 331 }; 332 333 static int aaci_pcm_open(struct aaci *aaci, snd_pcm_substream_t *substream, 334 struct aaci_runtime *aacirun) 335 { 336 snd_pcm_runtime_t *runtime = substream->runtime; 337 int ret; 338 339 aacirun->substream = substream; 340 runtime->private_data = aacirun; 341 runtime->hw = aaci_hw_info; 342 343 /* 344 * FIXME: ALSA specifies fifo_size in bytes. If we're in normal 345 * mode, each 32-bit word contains one sample. If we're in 346 * compact mode, each 32-bit word contains two samples, effectively 347 * halving the FIFO size. However, we don't know for sure which 348 * we'll be using at this point. We set this to the lower limit. 349 */ 350 runtime->hw.fifo_size = aaci->fifosize * 2; 351 352 /* 353 * Add rule describing hardware rate dependency 354 * on the number of channels. 355 */ 356 ret = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 357 aaci_rule_rate_by_channels, aaci, 358 SNDRV_PCM_HW_PARAM_CHANNELS, 359 SNDRV_PCM_HW_PARAM_RATE, -1); 360 if (ret) 361 goto out; 362 363 ret = request_irq(aaci->dev->irq[0], aaci_irq, SA_SHIRQ|SA_INTERRUPT, 364 DRIVER_NAME, aaci); 365 if (ret) 366 goto out; 367 368 return 0; 369 370 out: 371 return ret; 372 } 373 374 375 /* 376 * Common ALSA stuff 377 */ 378 static int aaci_pcm_close(snd_pcm_substream_t *substream) 379 { 380 struct aaci *aaci = substream->private_data; 381 struct aaci_runtime *aacirun = substream->runtime->private_data; 382 383 WARN_ON(aacirun->cr & TXCR_TXEN); 384 385 aacirun->substream = NULL; 386 free_irq(aaci->dev->irq[0], aaci); 387 388 return 0; 389 } 390 391 static int aaci_pcm_hw_free(snd_pcm_substream_t *substream) 392 { 393 struct aaci_runtime *aacirun = substream->runtime->private_data; 394 395 /* 396 * This must not be called with the device enabled. 397 */ 398 WARN_ON(aacirun->cr & TXCR_TXEN); 399 400 if (aacirun->pcm_open) 401 snd_ac97_pcm_close(aacirun->pcm); 402 aacirun->pcm_open = 0; 403 404 /* 405 * Clear out the DMA and any allocated buffers. 406 */ 407 devdma_hw_free(NULL, substream); 408 409 return 0; 410 } 411 412 static int aaci_pcm_hw_params(snd_pcm_substream_t *substream, 413 struct aaci_runtime *aacirun, 414 snd_pcm_hw_params_t *params) 415 { 416 int err; 417 418 aaci_pcm_hw_free(substream); 419 420 err = devdma_hw_alloc(NULL, substream, 421 params_buffer_bytes(params)); 422 if (err < 0) 423 goto out; 424 425 err = snd_ac97_pcm_open(aacirun->pcm, params_rate(params), 426 params_channels(params), 427 aacirun->pcm->r[0].slots); 428 if (err) 429 goto out; 430 431 aacirun->pcm_open = 1; 432 433 out: 434 return err; 435 } 436 437 static int aaci_pcm_prepare(snd_pcm_substream_t *substream) 438 { 439 snd_pcm_runtime_t *runtime = substream->runtime; 440 struct aaci_runtime *aacirun = runtime->private_data; 441 442 aacirun->start = (void *)runtime->dma_area; 443 aacirun->end = aacirun->start + runtime->dma_bytes; 444 aacirun->ptr = aacirun->start; 445 aacirun->period = 446 aacirun->bytes = frames_to_bytes(runtime, runtime->period_size); 447 448 return 0; 449 } 450 451 static snd_pcm_uframes_t aaci_pcm_pointer(snd_pcm_substream_t *substream) 452 { 453 snd_pcm_runtime_t *runtime = substream->runtime; 454 struct aaci_runtime *aacirun = runtime->private_data; 455 ssize_t bytes = aacirun->ptr - aacirun->start; 456 457 return bytes_to_frames(runtime, bytes); 458 } 459 460 static int aaci_pcm_mmap(snd_pcm_substream_t *substream, struct vm_area_struct *vma) 461 { 462 return devdma_mmap(NULL, substream, vma); 463 } 464 465 466 /* 467 * Playback specific ALSA stuff 468 */ 469 static const u32 channels_to_txmask[] = { 470 [2] = TXCR_TX3 | TXCR_TX4, 471 [4] = TXCR_TX3 | TXCR_TX4 | TXCR_TX7 | TXCR_TX8, 472 [6] = TXCR_TX3 | TXCR_TX4 | TXCR_TX7 | TXCR_TX8 | TXCR_TX6 | TXCR_TX9, 473 }; 474 475 /* 476 * We can support two and four channel audio. Unfortunately 477 * six channel audio requires a non-standard channel ordering: 478 * 2 -> FL(3), FR(4) 479 * 4 -> FL(3), FR(4), SL(7), SR(8) 480 * 6 -> FL(3), FR(4), SL(7), SR(8), C(6), LFE(9) (required) 481 * FL(3), FR(4), C(6), SL(7), SR(8), LFE(9) (actual) 482 * This requires an ALSA configuration file to correct. 483 */ 484 static unsigned int channel_list[] = { 2, 4, 6 }; 485 486 static int 487 aaci_rule_channels(snd_pcm_hw_params_t *p, snd_pcm_hw_rule_t *rule) 488 { 489 struct aaci *aaci = rule->private; 490 unsigned int chan_mask = 1 << 0, slots; 491 492 /* 493 * pcms[0] is the our 5.1 PCM instance. 494 */ 495 slots = aaci->ac97_bus->pcms[0].r[0].slots; 496 if (slots & (1 << AC97_SLOT_PCM_SLEFT)) { 497 chan_mask |= 1 << 1; 498 if (slots & (1 << AC97_SLOT_LFE)) 499 chan_mask |= 1 << 2; 500 } 501 502 return snd_interval_list(hw_param_interval(p, rule->var), 503 ARRAY_SIZE(channel_list), channel_list, 504 chan_mask); 505 } 506 507 static int aaci_pcm_playback_open(snd_pcm_substream_t *substream) 508 { 509 struct aaci *aaci = substream->private_data; 510 int ret; 511 512 /* 513 * Add rule describing channel dependency. 514 */ 515 ret = snd_pcm_hw_rule_add(substream->runtime, 0, 516 SNDRV_PCM_HW_PARAM_CHANNELS, 517 aaci_rule_channels, aaci, 518 SNDRV_PCM_HW_PARAM_CHANNELS, -1); 519 if (ret) 520 return ret; 521 522 return aaci_pcm_open(aaci, substream, &aaci->playback); 523 } 524 525 static int aaci_pcm_playback_hw_params(snd_pcm_substream_t *substream, 526 snd_pcm_hw_params_t *params) 527 { 528 struct aaci *aaci = substream->private_data; 529 struct aaci_runtime *aacirun = substream->runtime->private_data; 530 unsigned int channels = params_channels(params); 531 int ret; 532 533 WARN_ON(channels >= ARRAY_SIZE(channels_to_txmask) || 534 !channels_to_txmask[channels]); 535 536 ret = aaci_pcm_hw_params(substream, aacirun, params); 537 538 /* 539 * Enable FIFO, compact mode, 16 bits per sample. 540 * FIXME: double rate slots? 541 */ 542 if (ret >= 0) { 543 aacirun->cr = TXCR_FEN | TXCR_COMPACT | TXCR_TSZ16; 544 aacirun->cr |= channels_to_txmask[channels]; 545 546 aacirun->fifosz = aaci->fifosize * 4; 547 if (aacirun->cr & TXCR_COMPACT) 548 aacirun->fifosz >>= 1; 549 } 550 return ret; 551 } 552 553 static void aaci_pcm_playback_stop(struct aaci_runtime *aacirun) 554 { 555 u32 ie; 556 557 ie = readl(aacirun->base + AACI_IE); 558 ie &= ~(IE_URIE|IE_TXIE); 559 writel(ie, aacirun->base + AACI_IE); 560 aacirun->cr &= ~TXCR_TXEN; 561 aaci_chan_wait_ready(aacirun); 562 writel(aacirun->cr, aacirun->base + AACI_TXCR); 563 } 564 565 static void aaci_pcm_playback_start(struct aaci_runtime *aacirun) 566 { 567 u32 ie; 568 569 aaci_chan_wait_ready(aacirun); 570 aacirun->cr |= TXCR_TXEN; 571 572 ie = readl(aacirun->base + AACI_IE); 573 ie |= IE_URIE | IE_TXIE; 574 writel(ie, aacirun->base + AACI_IE); 575 writel(aacirun->cr, aacirun->base + AACI_TXCR); 576 } 577 578 static int aaci_pcm_playback_trigger(snd_pcm_substream_t *substream, int cmd) 579 { 580 struct aaci *aaci = substream->private_data; 581 struct aaci_runtime *aacirun = substream->runtime->private_data; 582 unsigned long flags; 583 int ret = 0; 584 585 spin_lock_irqsave(&aaci->lock, flags); 586 switch (cmd) { 587 case SNDRV_PCM_TRIGGER_START: 588 aaci_pcm_playback_start(aacirun); 589 break; 590 591 case SNDRV_PCM_TRIGGER_RESUME: 592 aaci_pcm_playback_start(aacirun); 593 break; 594 595 case SNDRV_PCM_TRIGGER_STOP: 596 aaci_pcm_playback_stop(aacirun); 597 break; 598 599 case SNDRV_PCM_TRIGGER_SUSPEND: 600 aaci_pcm_playback_stop(aacirun); 601 break; 602 603 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 604 break; 605 606 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 607 break; 608 609 default: 610 ret = -EINVAL; 611 } 612 spin_unlock_irqrestore(&aaci->lock, flags); 613 614 return ret; 615 } 616 617 static snd_pcm_ops_t aaci_playback_ops = { 618 .open = aaci_pcm_playback_open, 619 .close = aaci_pcm_close, 620 .ioctl = snd_pcm_lib_ioctl, 621 .hw_params = aaci_pcm_playback_hw_params, 622 .hw_free = aaci_pcm_hw_free, 623 .prepare = aaci_pcm_prepare, 624 .trigger = aaci_pcm_playback_trigger, 625 .pointer = aaci_pcm_pointer, 626 .mmap = aaci_pcm_mmap, 627 }; 628 629 630 631 /* 632 * Power Management. 633 */ 634 #ifdef CONFIG_PM 635 static int aaci_do_suspend(snd_card_t *card, unsigned int state) 636 { 637 struct aaci *aaci = card->private_data; 638 if (aaci->card->power_state != SNDRV_CTL_POWER_D3cold) { 639 snd_pcm_suspend_all(aaci->pcm); 640 snd_power_change_state(aaci->card, SNDRV_CTL_POWER_D3cold); 641 } 642 return 0; 643 } 644 645 static int aaci_do_resume(snd_card_t *card, unsigned int state) 646 { 647 struct aaci *aaci = card->private_data; 648 if (aaci->card->power_state != SNDRV_CTL_POWER_D0) { 649 snd_power_change_state(aaci->card, SNDRV_CTL_POWER_D0); 650 } 651 return 0; 652 } 653 654 static int aaci_suspend(struct amba_device *dev, pm_message_t state) 655 { 656 snd_card_t *card = amba_get_drvdata(dev); 657 return card ? aaci_do_suspend(card) : 0; 658 } 659 660 static int aaci_resume(struct amba_device *dev) 661 { 662 snd_card_t *card = amba_get_drvdata(dev); 663 return card ? aaci_do_resume(card) : 0; 664 } 665 #else 666 #define aaci_do_suspend NULL 667 #define aaci_do_resume NULL 668 #define aaci_suspend NULL 669 #define aaci_resume NULL 670 #endif 671 672 673 static struct ac97_pcm ac97_defs[] __devinitdata = { 674 [0] = { /* Front PCM */ 675 .exclusive = 1, 676 .r = { 677 [0] = { 678 .slots = (1 << AC97_SLOT_PCM_LEFT) | 679 (1 << AC97_SLOT_PCM_RIGHT) | 680 (1 << AC97_SLOT_PCM_CENTER) | 681 (1 << AC97_SLOT_PCM_SLEFT) | 682 (1 << AC97_SLOT_PCM_SRIGHT) | 683 (1 << AC97_SLOT_LFE), 684 }, 685 }, 686 }, 687 [1] = { /* PCM in */ 688 .stream = 1, 689 .exclusive = 1, 690 .r = { 691 [0] = { 692 .slots = (1 << AC97_SLOT_PCM_LEFT) | 693 (1 << AC97_SLOT_PCM_RIGHT), 694 }, 695 }, 696 }, 697 [2] = { /* Mic in */ 698 .stream = 1, 699 .exclusive = 1, 700 .r = { 701 [0] = { 702 .slots = (1 << AC97_SLOT_MIC), 703 }, 704 }, 705 } 706 }; 707 708 static ac97_bus_ops_t aaci_bus_ops = { 709 .write = aaci_ac97_write, 710 .read = aaci_ac97_read, 711 }; 712 713 static int __devinit aaci_probe_ac97(struct aaci *aaci) 714 { 715 ac97_template_t ac97_template; 716 ac97_bus_t *ac97_bus; 717 ac97_t *ac97; 718 int ret; 719 720 /* 721 * Assert AACIRESET for 2us 722 */ 723 writel(0, aaci->base + AACI_RESET); 724 udelay(2); 725 writel(RESET_NRST, aaci->base + AACI_RESET); 726 727 /* 728 * Give the AC'97 codec more than enough time 729 * to wake up. (42us = ~2 frames at 48kHz.) 730 */ 731 udelay(42); 732 733 ret = snd_ac97_bus(aaci->card, 0, &aaci_bus_ops, aaci, &ac97_bus); 734 if (ret) 735 goto out; 736 737 ac97_bus->clock = 48000; 738 aaci->ac97_bus = ac97_bus; 739 740 memset(&ac97_template, 0, sizeof(ac97_template_t)); 741 ac97_template.private_data = aaci; 742 ac97_template.num = 0; 743 ac97_template.scaps = AC97_SCAP_SKIP_MODEM; 744 745 ret = snd_ac97_mixer(ac97_bus, &ac97_template, &ac97); 746 if (ret) 747 goto out; 748 749 /* 750 * Disable AC97 PC Beep input on audio codecs. 751 */ 752 if (ac97_is_audio(ac97)) 753 snd_ac97_write_cache(ac97, AC97_PC_BEEP, 0x801e); 754 755 ret = snd_ac97_pcm_assign(ac97_bus, ARRAY_SIZE(ac97_defs), ac97_defs); 756 if (ret) 757 goto out; 758 759 aaci->playback.pcm = &ac97_bus->pcms[0]; 760 761 out: 762 return ret; 763 } 764 765 static void aaci_free_card(snd_card_t *card) 766 { 767 struct aaci *aaci = card->private_data; 768 if (aaci->base) 769 iounmap(aaci->base); 770 } 771 772 static struct aaci * __devinit aaci_init_card(struct amba_device *dev) 773 { 774 struct aaci *aaci; 775 snd_card_t *card; 776 777 card = snd_card_new(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1, 778 THIS_MODULE, sizeof(struct aaci)); 779 if (card == NULL) 780 return ERR_PTR(-ENOMEM); 781 782 card->private_free = aaci_free_card; 783 snd_card_set_pm_callback(card, aaci_do_suspend, aaci_do_resume, NULL); 784 785 strlcpy(card->driver, DRIVER_NAME, sizeof(card->driver)); 786 strlcpy(card->shortname, "ARM AC'97 Interface", sizeof(card->shortname)); 787 snprintf(card->longname, sizeof(card->longname), 788 "%s at 0x%08lx, irq %d", 789 card->shortname, dev->res.start, dev->irq[0]); 790 791 aaci = card->private_data; 792 init_MUTEX(&aaci->ac97_sem); 793 spin_lock_init(&aaci->lock); 794 aaci->card = card; 795 aaci->dev = dev; 796 797 /* Set MAINCR to allow slot 1 and 2 data IO */ 798 aaci->maincr = MAINCR_IE | MAINCR_SL1RXEN | MAINCR_SL1TXEN | 799 MAINCR_SL2RXEN | MAINCR_SL2TXEN; 800 801 return aaci; 802 } 803 804 static int __devinit aaci_init_pcm(struct aaci *aaci) 805 { 806 snd_pcm_t *pcm; 807 int ret; 808 809 ret = snd_pcm_new(aaci->card, "AACI AC'97", 0, 1, 0, &pcm); 810 if (ret == 0) { 811 aaci->pcm = pcm; 812 pcm->private_data = aaci; 813 pcm->info_flags = 0; 814 815 strlcpy(pcm->name, DRIVER_NAME, sizeof(pcm->name)); 816 817 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &aaci_playback_ops); 818 } 819 820 return ret; 821 } 822 823 static unsigned int __devinit aaci_size_fifo(struct aaci *aaci) 824 { 825 void __iomem *base = aaci->base + AACI_CSCH1; 826 int i; 827 828 writel(TXCR_FEN | TXCR_TSZ16 | TXCR_TXEN, base + AACI_TXCR); 829 830 for (i = 0; !(readl(base + AACI_SR) & SR_TXFF) && i < 4096; i++) 831 writel(0, aaci->base + AACI_DR1); 832 833 writel(0, base + AACI_TXCR); 834 835 /* 836 * Re-initialise the AACI after the FIFO depth test, to 837 * ensure that the FIFOs are empty. Unfortunately, merely 838 * disabling the channel doesn't clear the FIFO. 839 */ 840 writel(aaci->maincr & ~MAINCR_IE, aaci->base + AACI_MAINCR); 841 writel(aaci->maincr, aaci->base + AACI_MAINCR); 842 843 /* 844 * If we hit 4096, we failed. Go back to the specified 845 * fifo depth. 846 */ 847 if (i == 4096) 848 i = 8; 849 850 return i; 851 } 852 853 static int __devinit aaci_probe(struct amba_device *dev, void *id) 854 { 855 struct aaci *aaci; 856 int ret, i; 857 858 ret = amba_request_regions(dev, NULL); 859 if (ret) 860 return ret; 861 862 aaci = aaci_init_card(dev); 863 if (IS_ERR(aaci)) { 864 ret = PTR_ERR(aaci); 865 goto out; 866 } 867 868 aaci->base = ioremap(dev->res.start, SZ_4K); 869 if (!aaci->base) { 870 ret = -ENOMEM; 871 goto out; 872 } 873 874 /* 875 * Playback uses AACI channel 0 876 */ 877 aaci->playback.base = aaci->base + AACI_CSCH1; 878 aaci->playback.fifo = aaci->base + AACI_DR1; 879 880 for (i = 0; i < 4; i++) { 881 void __iomem *base = aaci->base + i * 0x14; 882 883 writel(0, base + AACI_IE); 884 writel(0, base + AACI_TXCR); 885 writel(0, base + AACI_RXCR); 886 } 887 888 writel(0x1fff, aaci->base + AACI_INTCLR); 889 writel(aaci->maincr, aaci->base + AACI_MAINCR); 890 891 /* 892 * Size the FIFOs. 893 */ 894 aaci->fifosize = aaci_size_fifo(aaci); 895 896 ret = aaci_probe_ac97(aaci); 897 if (ret) 898 goto out; 899 900 ret = aaci_init_pcm(aaci); 901 if (ret) 902 goto out; 903 904 snd_card_set_dev(aaci->card, &dev->dev); 905 906 ret = snd_card_register(aaci->card); 907 if (ret == 0) { 908 dev_info(&dev->dev, "%s, fifo %d\n", aaci->card->longname, 909 aaci->fifosize); 910 amba_set_drvdata(dev, aaci->card); 911 return ret; 912 } 913 914 out: 915 if (aaci) 916 snd_card_free(aaci->card); 917 amba_release_regions(dev); 918 return ret; 919 } 920 921 static int __devexit aaci_remove(struct amba_device *dev) 922 { 923 snd_card_t *card = amba_get_drvdata(dev); 924 925 amba_set_drvdata(dev, NULL); 926 927 if (card) { 928 struct aaci *aaci = card->private_data; 929 writel(0, aaci->base + AACI_MAINCR); 930 931 snd_card_free(card); 932 amba_release_regions(dev); 933 } 934 935 return 0; 936 } 937 938 static struct amba_id aaci_ids[] = { 939 { 940 .id = 0x00041041, 941 .mask = 0x000fffff, 942 }, 943 { 0, 0 }, 944 }; 945 946 static struct amba_driver aaci_driver = { 947 .drv = { 948 .name = DRIVER_NAME, 949 }, 950 .probe = aaci_probe, 951 .remove = __devexit_p(aaci_remove), 952 .suspend = aaci_suspend, 953 .resume = aaci_resume, 954 .id_table = aaci_ids, 955 }; 956 957 static int __init aaci_init(void) 958 { 959 return amba_driver_register(&aaci_driver); 960 } 961 962 static void __exit aaci_exit(void) 963 { 964 amba_driver_unregister(&aaci_driver); 965 } 966 967 module_init(aaci_init); 968 module_exit(aaci_exit); 969 970 MODULE_LICENSE("GPL"); 971 MODULE_DESCRIPTION("ARM PrimeCell PL041 Advanced Audio CODEC Interface driver"); 972