1// SPDX-License-Identifier: GPL-2.0 OR MIT 2/* 3 * Copyright (C) 2022 StarFive Technology Co., Ltd. 4 * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk> 5 */ 6 7/dts-v1/; 8#include "jh7110.dtsi" 9#include "jh7110-pinfunc.h" 10#include <dt-bindings/gpio/gpio.h> 11 12/ { 13 aliases { 14 ethernet0 = &gmac0; 15 ethernet1 = &gmac1; 16 i2c0 = &i2c0; 17 i2c2 = &i2c2; 18 i2c5 = &i2c5; 19 i2c6 = &i2c6; 20 mmc0 = &mmc0; 21 mmc1 = &mmc1; 22 serial0 = &uart0; 23 }; 24 25 chosen { 26 stdout-path = "serial0:115200n8"; 27 }; 28 29 cpus { 30 timebase-frequency = <4000000>; 31 }; 32 33 memory@40000000 { 34 device_type = "memory"; 35 reg = <0x0 0x40000000 0x1 0x0>; 36 }; 37 38 gpio-restart { 39 compatible = "gpio-restart"; 40 gpios = <&sysgpio 35 GPIO_ACTIVE_HIGH>; 41 priority = <224>; 42 }; 43 44 pwmdac_codec: pwmdac-codec { 45 compatible = "linux,spdif-dit"; 46 #sound-dai-cells = <0>; 47 }; 48 49 sound-pwmdac { 50 compatible = "simple-audio-card"; 51 simple-audio-card,name = "StarFive-PWMDAC-Sound-Card"; 52 #address-cells = <1>; 53 #size-cells = <0>; 54 55 simple-audio-card,dai-link@0 { 56 reg = <0>; 57 format = "left_j"; 58 bitclock-master = <&sndcpu0>; 59 frame-master = <&sndcpu0>; 60 61 sndcpu0: cpu { 62 sound-dai = <&pwmdac>; 63 }; 64 65 codec { 66 sound-dai = <&pwmdac_codec>; 67 }; 68 }; 69 }; 70}; 71 72&dvp_clk { 73 clock-frequency = <74250000>; 74}; 75 76&gmac0_rgmii_rxin { 77 clock-frequency = <125000000>; 78}; 79 80&gmac0_rmii_refin { 81 clock-frequency = <50000000>; 82}; 83 84&gmac1_rgmii_rxin { 85 clock-frequency = <125000000>; 86}; 87 88&gmac1_rmii_refin { 89 clock-frequency = <50000000>; 90}; 91 92&hdmitx0_pixelclk { 93 clock-frequency = <297000000>; 94}; 95 96&i2srx_bclk_ext { 97 clock-frequency = <12288000>; 98}; 99 100&i2srx_lrck_ext { 101 clock-frequency = <192000>; 102}; 103 104&i2stx_bclk_ext { 105 clock-frequency = <12288000>; 106}; 107 108&i2stx_lrck_ext { 109 clock-frequency = <192000>; 110}; 111 112&mclk_ext { 113 clock-frequency = <12288000>; 114}; 115 116&osc { 117 clock-frequency = <24000000>; 118}; 119 120&rtc_osc { 121 clock-frequency = <32768>; 122}; 123 124&tdm_ext { 125 clock-frequency = <49152000>; 126}; 127 128&camss { 129 assigned-clocks = <&ispcrg JH7110_ISPCLK_DOM4_APB_FUNC>, 130 <&ispcrg JH7110_ISPCLK_MIPI_RX0_PXL>; 131 assigned-clock-rates = <49500000>, <198000000>; 132 status = "okay"; 133 134 ports { 135 #address-cells = <1>; 136 #size-cells = <0>; 137 138 port@0 { 139 reg = <0>; 140 }; 141 142 port@1 { 143 reg = <1>; 144 145 camss_from_csi2rx: endpoint { 146 remote-endpoint = <&csi2rx_to_camss>; 147 }; 148 }; 149 }; 150}; 151 152&csi2rx { 153 assigned-clocks = <&ispcrg JH7110_ISPCLK_VIN_SYS>; 154 assigned-clock-rates = <297000000>; 155 status = "okay"; 156 157 ports { 158 #address-cells = <1>; 159 #size-cells = <0>; 160 161 port@0 { 162 reg = <0>; 163 164 /* remote MIPI sensor endpoint */ 165 }; 166 167 port@1 { 168 reg = <1>; 169 170 csi2rx_to_camss: endpoint { 171 remote-endpoint = <&camss_from_csi2rx>; 172 }; 173 }; 174 }; 175}; 176 177&gmac0 { 178 phy-handle = <&phy0>; 179 phy-mode = "rgmii-id"; 180 status = "okay"; 181 182 mdio { 183 #address-cells = <1>; 184 #size-cells = <0>; 185 compatible = "snps,dwmac-mdio"; 186 187 phy0: ethernet-phy@0 { 188 reg = <0>; 189 }; 190 }; 191}; 192 193&gmac1 { 194 phy-handle = <&phy1>; 195 phy-mode = "rgmii-id"; 196 status = "okay"; 197 198 mdio { 199 #address-cells = <1>; 200 #size-cells = <0>; 201 compatible = "snps,dwmac-mdio"; 202 203 phy1: ethernet-phy@1 { 204 reg = <0>; 205 }; 206 }; 207}; 208 209&i2c0 { 210 clock-frequency = <100000>; 211 i2c-sda-hold-time-ns = <300>; 212 i2c-sda-falling-time-ns = <510>; 213 i2c-scl-falling-time-ns = <510>; 214 pinctrl-names = "default"; 215 pinctrl-0 = <&i2c0_pins>; 216 status = "okay"; 217}; 218 219&i2c2 { 220 clock-frequency = <100000>; 221 i2c-sda-hold-time-ns = <300>; 222 i2c-sda-falling-time-ns = <510>; 223 i2c-scl-falling-time-ns = <510>; 224 pinctrl-names = "default"; 225 pinctrl-0 = <&i2c2_pins>; 226 status = "okay"; 227}; 228 229&i2c5 { 230 clock-frequency = <100000>; 231 i2c-sda-hold-time-ns = <300>; 232 i2c-sda-falling-time-ns = <510>; 233 i2c-scl-falling-time-ns = <510>; 234 pinctrl-names = "default"; 235 pinctrl-0 = <&i2c5_pins>; 236 status = "okay"; 237 238 axp15060: pmic@36 { 239 compatible = "x-powers,axp15060"; 240 reg = <0x36>; 241 interrupts = <0>; 242 interrupt-controller; 243 #interrupt-cells = <1>; 244 245 regulators { 246 vcc_3v3: dcdc1 { 247 regulator-boot-on; 248 regulator-always-on; 249 regulator-min-microvolt = <3300000>; 250 regulator-max-microvolt = <3300000>; 251 regulator-name = "vcc_3v3"; 252 }; 253 254 vdd_cpu: dcdc2 { 255 regulator-always-on; 256 regulator-min-microvolt = <500000>; 257 regulator-max-microvolt = <1540000>; 258 regulator-name = "vdd-cpu"; 259 }; 260 261 emmc_vdd: aldo4 { 262 regulator-boot-on; 263 regulator-always-on; 264 regulator-min-microvolt = <1800000>; 265 regulator-max-microvolt = <1800000>; 266 regulator-name = "emmc_vdd"; 267 }; 268 }; 269 }; 270}; 271 272&i2c6 { 273 clock-frequency = <100000>; 274 i2c-sda-hold-time-ns = <300>; 275 i2c-sda-falling-time-ns = <510>; 276 i2c-scl-falling-time-ns = <510>; 277 pinctrl-names = "default"; 278 pinctrl-0 = <&i2c6_pins>; 279 status = "okay"; 280}; 281 282&i2srx { 283 pinctrl-names = "default"; 284 pinctrl-0 = <&i2srx_pins>; 285 status = "okay"; 286}; 287 288&i2stx0 { 289 pinctrl-names = "default"; 290 pinctrl-0 = <&mclk_ext_pins>; 291 status = "okay"; 292}; 293 294&i2stx1 { 295 pinctrl-names = "default"; 296 pinctrl-0 = <&i2stx1_pins>; 297 status = "okay"; 298}; 299 300&mmc0 { 301 max-frequency = <100000000>; 302 assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO0_SDCARD>; 303 assigned-clock-rates = <50000000>; 304 bus-width = <8>; 305 cap-mmc-highspeed; 306 mmc-ddr-1_8v; 307 mmc-hs200-1_8v; 308 non-removable; 309 cap-mmc-hw-reset; 310 post-power-on-delay-ms = <200>; 311 pinctrl-names = "default"; 312 pinctrl-0 = <&mmc0_pins>; 313 vmmc-supply = <&vcc_3v3>; 314 vqmmc-supply = <&emmc_vdd>; 315 status = "okay"; 316}; 317 318&mmc1 { 319 max-frequency = <100000000>; 320 assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO1_SDCARD>; 321 assigned-clock-rates = <50000000>; 322 bus-width = <4>; 323 no-sdio; 324 no-mmc; 325 broken-cd; 326 cap-sd-highspeed; 327 post-power-on-delay-ms = <200>; 328 pinctrl-names = "default"; 329 pinctrl-0 = <&mmc1_pins>; 330 status = "okay"; 331}; 332 333&pwmdac { 334 pinctrl-names = "default"; 335 pinctrl-0 = <&pwmdac_pins>; 336 status = "okay"; 337}; 338 339&qspi { 340 #address-cells = <1>; 341 #size-cells = <0>; 342 status = "okay"; 343 344 nor_flash: flash@0 { 345 compatible = "jedec,spi-nor"; 346 reg = <0>; 347 cdns,read-delay = <5>; 348 spi-max-frequency = <12000000>; 349 cdns,tshsl-ns = <1>; 350 cdns,tsd2d-ns = <1>; 351 cdns,tchsh-ns = <1>; 352 cdns,tslch-ns = <1>; 353 354 partitions { 355 compatible = "fixed-partitions"; 356 #address-cells = <1>; 357 #size-cells = <1>; 358 359 spl@0 { 360 reg = <0x0 0x80000>; 361 }; 362 uboot-env@f0000 { 363 reg = <0xf0000 0x10000>; 364 }; 365 uboot@100000 { 366 reg = <0x100000 0x400000>; 367 }; 368 reserved-data@600000 { 369 reg = <0x600000 0xa00000>; 370 }; 371 }; 372 }; 373}; 374 375&pwm { 376 pinctrl-names = "default"; 377 pinctrl-0 = <&pwm_pins>; 378 status = "okay"; 379}; 380 381&spi0 { 382 pinctrl-names = "default"; 383 pinctrl-0 = <&spi0_pins>; 384 status = "okay"; 385 386 spi_dev0: spi@0 { 387 compatible = "rohm,dh2228fv"; 388 reg = <0>; 389 spi-max-frequency = <10000000>; 390 }; 391}; 392 393&sysgpio { 394 i2c0_pins: i2c0-0 { 395 i2c-pins { 396 pinmux = <GPIOMUX(57, GPOUT_LOW, 397 GPOEN_SYS_I2C0_CLK, 398 GPI_SYS_I2C0_CLK)>, 399 <GPIOMUX(58, GPOUT_LOW, 400 GPOEN_SYS_I2C0_DATA, 401 GPI_SYS_I2C0_DATA)>; 402 bias-disable; /* external pull-up */ 403 input-enable; 404 input-schmitt-enable; 405 }; 406 }; 407 408 i2c2_pins: i2c2-0 { 409 i2c-pins { 410 pinmux = <GPIOMUX(3, GPOUT_LOW, 411 GPOEN_SYS_I2C2_CLK, 412 GPI_SYS_I2C2_CLK)>, 413 <GPIOMUX(2, GPOUT_LOW, 414 GPOEN_SYS_I2C2_DATA, 415 GPI_SYS_I2C2_DATA)>; 416 bias-disable; /* external pull-up */ 417 input-enable; 418 input-schmitt-enable; 419 }; 420 }; 421 422 i2c5_pins: i2c5-0 { 423 i2c-pins { 424 pinmux = <GPIOMUX(19, GPOUT_LOW, 425 GPOEN_SYS_I2C5_CLK, 426 GPI_SYS_I2C5_CLK)>, 427 <GPIOMUX(20, GPOUT_LOW, 428 GPOEN_SYS_I2C5_DATA, 429 GPI_SYS_I2C5_DATA)>; 430 bias-disable; /* external pull-up */ 431 input-enable; 432 input-schmitt-enable; 433 }; 434 }; 435 436 i2c6_pins: i2c6-0 { 437 i2c-pins { 438 pinmux = <GPIOMUX(16, GPOUT_LOW, 439 GPOEN_SYS_I2C6_CLK, 440 GPI_SYS_I2C6_CLK)>, 441 <GPIOMUX(17, GPOUT_LOW, 442 GPOEN_SYS_I2C6_DATA, 443 GPI_SYS_I2C6_DATA)>; 444 bias-disable; /* external pull-up */ 445 input-enable; 446 input-schmitt-enable; 447 }; 448 }; 449 450 i2srx_pins: i2srx-0 { 451 clk-sd-pins { 452 pinmux = <GPIOMUX(38, GPOUT_LOW, 453 GPOEN_DISABLE, 454 GPI_SYS_I2SRX_BCLK)>, 455 <GPIOMUX(63, GPOUT_LOW, 456 GPOEN_DISABLE, 457 GPI_SYS_I2SRX_LRCK)>, 458 <GPIOMUX(38, GPOUT_LOW, 459 GPOEN_DISABLE, 460 GPI_SYS_I2STX1_BCLK)>, 461 <GPIOMUX(63, GPOUT_LOW, 462 GPOEN_DISABLE, 463 GPI_SYS_I2STX1_LRCK)>, 464 <GPIOMUX(61, GPOUT_LOW, 465 GPOEN_DISABLE, 466 GPI_SYS_I2SRX_SDIN0)>; 467 input-enable; 468 }; 469 }; 470 471 i2stx1_pins: i2stx1-0 { 472 sd-pins { 473 pinmux = <GPIOMUX(44, GPOUT_SYS_I2STX1_SDO0, 474 GPOEN_ENABLE, 475 GPI_NONE)>; 476 bias-disable; 477 input-disable; 478 }; 479 }; 480 481 mclk_ext_pins: mclk-ext-0 { 482 mclk-ext-pins { 483 pinmux = <GPIOMUX(4, GPOUT_LOW, 484 GPOEN_DISABLE, 485 GPI_SYS_MCLK_EXT)>; 486 input-enable; 487 }; 488 }; 489 490 mmc0_pins: mmc0-0 { 491 rst-pins { 492 pinmux = <GPIOMUX(62, GPOUT_SYS_SDIO0_RST, 493 GPOEN_ENABLE, 494 GPI_NONE)>; 495 bias-pull-up; 496 drive-strength = <12>; 497 input-disable; 498 input-schmitt-disable; 499 slew-rate = <0>; 500 }; 501 502 mmc-pins { 503 pinmux = <PINMUX(64, 0)>, 504 <PINMUX(65, 0)>, 505 <PINMUX(66, 0)>, 506 <PINMUX(67, 0)>, 507 <PINMUX(68, 0)>, 508 <PINMUX(69, 0)>, 509 <PINMUX(70, 0)>, 510 <PINMUX(71, 0)>, 511 <PINMUX(72, 0)>, 512 <PINMUX(73, 0)>; 513 bias-pull-up; 514 drive-strength = <12>; 515 input-enable; 516 }; 517 }; 518 519 mmc1_pins: mmc1-0 { 520 clk-pins { 521 pinmux = <GPIOMUX(10, GPOUT_SYS_SDIO1_CLK, 522 GPOEN_ENABLE, 523 GPI_NONE)>; 524 bias-pull-up; 525 drive-strength = <12>; 526 input-disable; 527 input-schmitt-disable; 528 slew-rate = <0>; 529 }; 530 531 mmc-pins { 532 pinmux = <GPIOMUX(9, GPOUT_SYS_SDIO1_CMD, 533 GPOEN_SYS_SDIO1_CMD, 534 GPI_SYS_SDIO1_CMD)>, 535 <GPIOMUX(11, GPOUT_SYS_SDIO1_DATA0, 536 GPOEN_SYS_SDIO1_DATA0, 537 GPI_SYS_SDIO1_DATA0)>, 538 <GPIOMUX(12, GPOUT_SYS_SDIO1_DATA1, 539 GPOEN_SYS_SDIO1_DATA1, 540 GPI_SYS_SDIO1_DATA1)>, 541 <GPIOMUX(7, GPOUT_SYS_SDIO1_DATA2, 542 GPOEN_SYS_SDIO1_DATA2, 543 GPI_SYS_SDIO1_DATA2)>, 544 <GPIOMUX(8, GPOUT_SYS_SDIO1_DATA3, 545 GPOEN_SYS_SDIO1_DATA3, 546 GPI_SYS_SDIO1_DATA3)>; 547 bias-pull-up; 548 drive-strength = <12>; 549 input-enable; 550 input-schmitt-enable; 551 slew-rate = <0>; 552 }; 553 }; 554 555 pwmdac_pins: pwmdac-0 { 556 pwmdac-pins { 557 pinmux = <GPIOMUX(33, GPOUT_SYS_PWMDAC_LEFT, 558 GPOEN_ENABLE, 559 GPI_NONE)>, 560 <GPIOMUX(34, GPOUT_SYS_PWMDAC_RIGHT, 561 GPOEN_ENABLE, 562 GPI_NONE)>; 563 bias-disable; 564 drive-strength = <2>; 565 input-disable; 566 input-schmitt-disable; 567 slew-rate = <0>; 568 }; 569 }; 570 571 pwm_pins: pwm-0 { 572 pwm-pins { 573 pinmux = <GPIOMUX(46, GPOUT_SYS_PWM_CHANNEL0, 574 GPOEN_SYS_PWM0_CHANNEL0, 575 GPI_NONE)>, 576 <GPIOMUX(59, GPOUT_SYS_PWM_CHANNEL1, 577 GPOEN_SYS_PWM0_CHANNEL1, 578 GPI_NONE)>; 579 bias-disable; 580 drive-strength = <12>; 581 input-disable; 582 input-schmitt-disable; 583 slew-rate = <0>; 584 }; 585 }; 586 587 spi0_pins: spi0-0 { 588 mosi-pins { 589 pinmux = <GPIOMUX(52, GPOUT_SYS_SPI0_TXD, 590 GPOEN_ENABLE, 591 GPI_NONE)>; 592 bias-disable; 593 input-disable; 594 input-schmitt-disable; 595 }; 596 597 miso-pins { 598 pinmux = <GPIOMUX(53, GPOUT_LOW, 599 GPOEN_DISABLE, 600 GPI_SYS_SPI0_RXD)>; 601 bias-pull-up; 602 input-enable; 603 input-schmitt-enable; 604 }; 605 606 sck-pins { 607 pinmux = <GPIOMUX(48, GPOUT_SYS_SPI0_CLK, 608 GPOEN_ENABLE, 609 GPI_SYS_SPI0_CLK)>; 610 bias-disable; 611 input-disable; 612 input-schmitt-disable; 613 }; 614 615 ss-pins { 616 pinmux = <GPIOMUX(49, GPOUT_SYS_SPI0_FSS, 617 GPOEN_ENABLE, 618 GPI_SYS_SPI0_FSS)>; 619 bias-disable; 620 input-disable; 621 input-schmitt-disable; 622 }; 623 }; 624 625 tdm_pins: tdm-0 { 626 tx-pins { 627 pinmux = <GPIOMUX(44, GPOUT_SYS_TDM_TXD, 628 GPOEN_ENABLE, 629 GPI_NONE)>; 630 bias-pull-up; 631 drive-strength = <2>; 632 input-disable; 633 input-schmitt-disable; 634 slew-rate = <0>; 635 }; 636 637 rx-pins { 638 pinmux = <GPIOMUX(61, GPOUT_HIGH, 639 GPOEN_DISABLE, 640 GPI_SYS_TDM_RXD)>; 641 input-enable; 642 }; 643 644 sync-pins { 645 pinmux = <GPIOMUX(63, GPOUT_HIGH, 646 GPOEN_DISABLE, 647 GPI_SYS_TDM_SYNC)>; 648 input-enable; 649 }; 650 651 pcmclk-pins { 652 pinmux = <GPIOMUX(38, GPOUT_HIGH, 653 GPOEN_DISABLE, 654 GPI_SYS_TDM_CLK)>; 655 input-enable; 656 }; 657 }; 658 659 uart0_pins: uart0-0 { 660 tx-pins { 661 pinmux = <GPIOMUX(5, GPOUT_SYS_UART0_TX, 662 GPOEN_ENABLE, 663 GPI_NONE)>; 664 bias-disable; 665 drive-strength = <12>; 666 input-disable; 667 input-schmitt-disable; 668 slew-rate = <0>; 669 }; 670 671 rx-pins { 672 pinmux = <GPIOMUX(6, GPOUT_LOW, 673 GPOEN_DISABLE, 674 GPI_SYS_UART0_RX)>; 675 bias-disable; /* external pull-up */ 676 drive-strength = <2>; 677 input-enable; 678 input-schmitt-enable; 679 slew-rate = <0>; 680 }; 681 }; 682}; 683 684&tdm { 685 pinctrl-names = "default"; 686 pinctrl-0 = <&tdm_pins>; 687 status = "okay"; 688}; 689 690&uart0 { 691 pinctrl-names = "default"; 692 pinctrl-0 = <&uart0_pins>; 693 status = "okay"; 694}; 695 696&usb0 { 697 dr_mode = "peripheral"; 698 status = "okay"; 699}; 700 701&U74_1 { 702 cpu-supply = <&vdd_cpu>; 703}; 704 705&U74_2 { 706 cpu-supply = <&vdd_cpu>; 707}; 708 709&U74_3 { 710 cpu-supply = <&vdd_cpu>; 711}; 712 713&U74_4 { 714 cpu-supply = <&vdd_cpu>; 715}; 716