xref: /linux/scripts/dtc/include-prefixes/riscv/starfive/jh7110-milkv-mars.dts (revision c34e9ab9a612ee8b18273398ef75c207b01f516d)
19276baddSJisheng Zhang// SPDX-License-Identifier: GPL-2.0 OR MIT
29276baddSJisheng Zhang/*
39276baddSJisheng Zhang * Copyright (C) 2023 Jisheng Zhang <jszhang@kernel.org>
49276baddSJisheng Zhang */
59276baddSJisheng Zhang
69276baddSJisheng Zhang/dts-v1/;
79276baddSJisheng Zhang#include "jh7110-common.dtsi"
89276baddSJisheng Zhang
99276baddSJisheng Zhang/ {
109276baddSJisheng Zhang	model = "Milk-V Mars";
119276baddSJisheng Zhang	compatible = "milkv,mars", "starfive,jh7110";
129276baddSJisheng Zhang};
139276baddSJisheng Zhang
149276baddSJisheng Zhang&gmac0 {
159276baddSJisheng Zhang	starfive,tx-use-rgmii-clk;
169276baddSJisheng Zhang	assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>;
179276baddSJisheng Zhang	assigned-clock-parents = <&aoncrg JH7110_AONCLK_GMAC0_RMII_RTX>;
185a5001d2SGuodong Xu	status = "okay";
195a5001d2SGuodong Xu};
205a5001d2SGuodong Xu
215a5001d2SGuodong Xu&i2c0 {
225a5001d2SGuodong Xu	status = "okay";
239276baddSJisheng Zhang};
249276baddSJisheng Zhang
252904244aSMinda Chen&pcie0 {
262904244aSMinda Chen	status = "okay";
272904244aSMinda Chen};
282904244aSMinda Chen
292904244aSMinda Chen&pcie1 {
302904244aSMinda Chen	status = "okay";
312904244aSMinda Chen};
329276baddSJisheng Zhang
339276baddSJisheng Zhang&phy0 {
349276baddSJisheng Zhang	motorcomm,tx-clk-adj-enabled;
359276baddSJisheng Zhang	motorcomm,tx-clk-10-inverted;
369276baddSJisheng Zhang	motorcomm,tx-clk-100-inverted;
379276baddSJisheng Zhang	motorcomm,tx-clk-1000-inverted;
389276baddSJisheng Zhang	motorcomm,rx-clk-drv-microamp = <3970>;
399276baddSJisheng Zhang	motorcomm,rx-data-drv-microamp = <2910>;
409276baddSJisheng Zhang	rx-internal-delay-ps = <1500>;
419276baddSJisheng Zhang	tx-internal-delay-ps = <1500>;
429276baddSJisheng Zhang};
435a5001d2SGuodong Xu
445a5001d2SGuodong Xu&pwm {
455a5001d2SGuodong Xu	status = "okay";
465a5001d2SGuodong Xu};
475a5001d2SGuodong Xu
485a5001d2SGuodong Xu&pwmdac {
495a5001d2SGuodong Xu	status = "okay";
505a5001d2SGuodong Xu};
515a5001d2SGuodong Xu
525a5001d2SGuodong Xu&spi0 {
535a5001d2SGuodong Xu	status = "okay";
545a5001d2SGuodong Xu};
55*817eac16SGuodong Xu
56*817eac16SGuodong Xu&usb0 {
57*817eac16SGuodong Xu	dr_mode = "peripheral";
58*817eac16SGuodong Xu	status = "okay";
59*817eac16SGuodong Xu};
60