xref: /linux/scripts/dtc/include-prefixes/riscv/starfive/jh7110-common.dtsi (revision 6660a1236fbebaa3282f5bf9cce1f90fbd318a3a) 
1// SPDX-License-Identifier: GPL-2.0 OR MIT
2/*
3 * Copyright (C) 2022 StarFive Technology Co., Ltd.
4 * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk>
5 */
6
7/dts-v1/;
8#include "jh7110.dtsi"
9#include "jh7110-pinfunc.h"
10#include <dt-bindings/gpio/gpio.h>
11
12/ {
13	aliases {
14		ethernet0 = &gmac0;
15		i2c0 = &i2c0;
16		i2c2 = &i2c2;
17		i2c5 = &i2c5;
18		i2c6 = &i2c6;
19		mmc0 = &mmc0;
20		mmc1 = &mmc1;
21		serial0 = &uart0;
22	};
23
24	chosen {
25		stdout-path = "serial0:115200n8";
26	};
27
28	memory@40000000 {
29		device_type = "memory";
30		reg = <0x0 0x40000000 0x1 0x0>;
31	};
32
33	gpio-restart {
34		compatible = "gpio-restart";
35		gpios = <&sysgpio 35 GPIO_ACTIVE_HIGH>;
36		priority = <224>;
37	};
38
39	pwmdac_codec: audio-codec {
40		compatible = "linux,spdif-dit";
41		#sound-dai-cells = <0>;
42	};
43
44	sound {
45		compatible = "simple-audio-card";
46		simple-audio-card,name = "StarFive-PWMDAC-Sound-Card";
47		#address-cells = <1>;
48		#size-cells = <0>;
49
50		simple-audio-card,dai-link@0 {
51			reg = <0>;
52			format = "left_j";
53			bitclock-master = <&sndcpu0>;
54			frame-master = <&sndcpu0>;
55
56			sndcpu0: cpu {
57				sound-dai = <&pwmdac>;
58			};
59
60			codec {
61				sound-dai = <&pwmdac_codec>;
62			};
63		};
64	};
65};
66
67&cpus {
68	timebase-frequency = <4000000>;
69};
70
71&dvp_clk {
72	clock-frequency = <74250000>;
73};
74
75&gmac0_rgmii_rxin {
76	clock-frequency = <125000000>;
77};
78
79&gmac0_rmii_refin {
80	clock-frequency = <50000000>;
81};
82
83&gmac1_rgmii_rxin {
84	clock-frequency = <125000000>;
85};
86
87&gmac1_rmii_refin {
88	clock-frequency = <50000000>;
89};
90
91&hdmitx0_pixelclk {
92	clock-frequency = <297000000>;
93};
94
95&i2srx_bclk_ext {
96	clock-frequency = <12288000>;
97};
98
99&i2srx_lrck_ext {
100	clock-frequency = <192000>;
101};
102
103&i2stx_bclk_ext {
104	clock-frequency = <12288000>;
105};
106
107&i2stx_lrck_ext {
108	clock-frequency = <192000>;
109};
110
111&mclk_ext {
112	clock-frequency = <12288000>;
113};
114
115&osc {
116	clock-frequency = <24000000>;
117};
118
119&rtc_osc {
120	clock-frequency = <32768>;
121};
122
123&tdm_ext {
124	clock-frequency = <49152000>;
125};
126
127&camss {
128	assigned-clocks = <&ispcrg JH7110_ISPCLK_DOM4_APB_FUNC>,
129			  <&ispcrg JH7110_ISPCLK_MIPI_RX0_PXL>;
130	assigned-clock-rates = <49500000>, <198000000>;
131	status = "okay";
132
133	ports {
134		#address-cells = <1>;
135		#size-cells = <0>;
136
137		port@0 {
138			reg = <0>;
139		};
140
141		port@1 {
142			reg = <1>;
143
144			camss_from_csi2rx: endpoint {
145				remote-endpoint = <&csi2rx_to_camss>;
146			};
147		};
148	};
149};
150
151&csi2rx {
152	assigned-clocks = <&ispcrg JH7110_ISPCLK_VIN_SYS>;
153	assigned-clock-rates = <297000000>;
154	status = "okay";
155
156	ports {
157		#address-cells = <1>;
158		#size-cells = <0>;
159
160		port@0 {
161			reg = <0>;
162
163			/* remote MIPI sensor endpoint */
164		};
165
166		port@1 {
167			reg = <1>;
168
169			csi2rx_to_camss: endpoint {
170				remote-endpoint = <&camss_from_csi2rx>;
171			};
172		};
173	};
174};
175
176&gmac0 {
177	phy-handle = <&phy0>;
178	phy-mode = "rgmii-id";
179
180	mdio {
181		#address-cells = <1>;
182		#size-cells = <0>;
183		compatible = "snps,dwmac-mdio";
184
185		phy0: ethernet-phy@0 {
186			reg = <0>;
187		};
188	};
189};
190
191&i2c0 {
192	clock-frequency = <100000>;
193	i2c-sda-hold-time-ns = <300>;
194	i2c-sda-falling-time-ns = <510>;
195	i2c-scl-falling-time-ns = <510>;
196	pinctrl-names = "default";
197	pinctrl-0 = <&i2c0_pins>;
198};
199
200&i2c2 {
201	clock-frequency = <100000>;
202	i2c-sda-hold-time-ns = <300>;
203	i2c-sda-falling-time-ns = <510>;
204	i2c-scl-falling-time-ns = <510>;
205	pinctrl-names = "default";
206	pinctrl-0 = <&i2c2_pins>;
207	status = "okay";
208};
209
210&i2c5 {
211	clock-frequency = <100000>;
212	i2c-sda-hold-time-ns = <300>;
213	i2c-sda-falling-time-ns = <510>;
214	i2c-scl-falling-time-ns = <510>;
215	pinctrl-names = "default";
216	pinctrl-0 = <&i2c5_pins>;
217	status = "okay";
218
219	axp15060: pmic@36 {
220		compatible = "x-powers,axp15060";
221		reg = <0x36>;
222		interrupt-controller;
223		#interrupt-cells = <1>;
224
225		regulators {
226			vcc_3v3: dcdc1 {
227				regulator-boot-on;
228				regulator-always-on;
229				regulator-min-microvolt = <3300000>;
230				regulator-max-microvolt = <3300000>;
231				regulator-name = "vcc_3v3";
232			};
233
234			vdd_cpu: dcdc2 {
235				regulator-always-on;
236				regulator-min-microvolt = <500000>;
237				regulator-max-microvolt = <1540000>;
238				regulator-name = "vdd-cpu";
239			};
240
241			emmc_vdd: aldo4 {
242				regulator-boot-on;
243				regulator-always-on;
244				regulator-min-microvolt = <1800000>;
245				regulator-max-microvolt = <3300000>;
246				regulator-name = "emmc_vdd";
247			};
248		};
249	};
250};
251
252&i2c6 {
253	clock-frequency = <100000>;
254	i2c-sda-hold-time-ns = <300>;
255	i2c-sda-falling-time-ns = <510>;
256	i2c-scl-falling-time-ns = <510>;
257	pinctrl-names = "default";
258	pinctrl-0 = <&i2c6_pins>;
259	status = "okay";
260};
261
262&mmc0 {
263	max-frequency = <100000000>;
264	assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO0_SDCARD>;
265	assigned-clock-rates = <50000000>;
266	bus-width = <8>;
267	cap-mmc-highspeed;
268	mmc-ddr-1_8v;
269	mmc-hs200-1_8v;
270	cap-mmc-hw-reset;
271	post-power-on-delay-ms = <200>;
272	pinctrl-names = "default";
273	pinctrl-0 = <&mmc0_pins>;
274	vmmc-supply = <&vcc_3v3>;
275	vqmmc-supply = <&emmc_vdd>;
276	status = "okay";
277};
278
279&mmc1 {
280	max-frequency = <100000000>;
281	assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO1_SDCARD>;
282	assigned-clock-rates = <50000000>;
283	bus-width = <4>;
284	no-sdio;
285	no-mmc;
286	cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>;
287	disable-wp;
288	cap-sd-highspeed;
289	post-power-on-delay-ms = <200>;
290	pinctrl-names = "default";
291	pinctrl-0 = <&mmc1_pins>;
292	status = "okay";
293};
294
295&pcie0 {
296	perst-gpios = <&sysgpio 26 GPIO_ACTIVE_LOW>;
297	phys = <&pciephy0>;
298	pinctrl-names = "default";
299	pinctrl-0 = <&pcie0_pins>;
300};
301
302&pcie1 {
303	perst-gpios = <&sysgpio 28 GPIO_ACTIVE_LOW>;
304	phys = <&pciephy1>;
305	pinctrl-names = "default";
306	pinctrl-0 = <&pcie1_pins>;
307};
308
309&pwmdac {
310	pinctrl-names = "default";
311	pinctrl-0 = <&pwmdac_pins>;
312};
313
314&qspi {
315	#address-cells = <1>;
316	#size-cells = <0>;
317	status = "okay";
318
319	nor_flash: flash@0 {
320		compatible = "jedec,spi-nor";
321		reg = <0>;
322		cdns,read-delay = <5>;
323		spi-max-frequency = <12000000>;
324		cdns,tshsl-ns = <1>;
325		cdns,tsd2d-ns = <1>;
326		cdns,tchsh-ns = <1>;
327		cdns,tslch-ns = <1>;
328
329		partitions {
330			compatible = "fixed-partitions";
331			#address-cells = <1>;
332			#size-cells = <1>;
333
334			spl@0 {
335				reg = <0x0 0xf0000>;
336			};
337			uboot-env@f0000 {
338				reg = <0xf0000 0x10000>;
339			};
340			uboot@100000 {
341				reg = <0x100000 0xf00000>;
342			};
343		};
344	};
345};
346
347&pwm {
348	pinctrl-names = "default";
349	pinctrl-0 = <&pwm_pins>;
350};
351
352&spi0 {
353	pinctrl-names = "default";
354	pinctrl-0 = <&spi0_pins>;
355
356	spi_dev0: spi@0 {
357		compatible = "rohm,dh2228fv";
358		reg = <0>;
359		spi-max-frequency = <10000000>;
360	};
361};
362
363&syscrg {
364	assigned-clocks = <&syscrg JH7110_SYSCLK_CPU_CORE>,
365			  <&pllclk JH7110_PLLCLK_PLL0_OUT>;
366	assigned-clock-rates = <500000000>, <1500000000>;
367};
368
369&sysgpio {
370	i2c0_pins: i2c0-0 {
371		i2c-pins {
372			pinmux = <GPIOMUX(57, GPOUT_LOW,
373					      GPOEN_SYS_I2C0_CLK,
374					      GPI_SYS_I2C0_CLK)>,
375				 <GPIOMUX(58, GPOUT_LOW,
376					      GPOEN_SYS_I2C0_DATA,
377					      GPI_SYS_I2C0_DATA)>;
378			bias-disable; /* external pull-up */
379			input-enable;
380			input-schmitt-enable;
381		};
382	};
383
384	i2c2_pins: i2c2-0 {
385		i2c-pins {
386			pinmux = <GPIOMUX(3, GPOUT_LOW,
387					     GPOEN_SYS_I2C2_CLK,
388					     GPI_SYS_I2C2_CLK)>,
389				 <GPIOMUX(2, GPOUT_LOW,
390					     GPOEN_SYS_I2C2_DATA,
391					     GPI_SYS_I2C2_DATA)>;
392			bias-disable; /* external pull-up */
393			input-enable;
394			input-schmitt-enable;
395		};
396	};
397
398	i2c5_pins: i2c5-0 {
399		i2c-pins {
400			pinmux = <GPIOMUX(19, GPOUT_LOW,
401					      GPOEN_SYS_I2C5_CLK,
402					      GPI_SYS_I2C5_CLK)>,
403				 <GPIOMUX(20, GPOUT_LOW,
404					      GPOEN_SYS_I2C5_DATA,
405					      GPI_SYS_I2C5_DATA)>;
406			bias-disable; /* external pull-up */
407			input-enable;
408			input-schmitt-enable;
409		};
410	};
411
412	i2c6_pins: i2c6-0 {
413		i2c-pins {
414			pinmux = <GPIOMUX(16, GPOUT_LOW,
415					      GPOEN_SYS_I2C6_CLK,
416					      GPI_SYS_I2C6_CLK)>,
417				 <GPIOMUX(17, GPOUT_LOW,
418					      GPOEN_SYS_I2C6_DATA,
419					      GPI_SYS_I2C6_DATA)>;
420			bias-disable; /* external pull-up */
421			input-enable;
422			input-schmitt-enable;
423		};
424	};
425
426	mmc0_pins: mmc0-0 {
427		 rst-pins {
428			pinmux = <GPIOMUX(62, GPOUT_SYS_SDIO0_RST,
429					      GPOEN_ENABLE,
430					      GPI_NONE)>;
431			bias-pull-up;
432			drive-strength = <12>;
433			input-disable;
434			input-schmitt-disable;
435			slew-rate = <0>;
436		};
437
438		mmc-pins {
439			pinmux = <PINMUX(64, 0)>,
440				 <PINMUX(65, 0)>,
441				 <PINMUX(66, 0)>,
442				 <PINMUX(67, 0)>,
443				 <PINMUX(68, 0)>,
444				 <PINMUX(69, 0)>,
445				 <PINMUX(70, 0)>,
446				 <PINMUX(71, 0)>,
447				 <PINMUX(72, 0)>,
448				 <PINMUX(73, 0)>;
449			bias-pull-up;
450			drive-strength = <12>;
451			input-enable;
452		};
453	};
454
455	mmc1_pins: mmc1-0 {
456		clk-pins {
457			pinmux = <GPIOMUX(10, GPOUT_SYS_SDIO1_CLK,
458					      GPOEN_ENABLE,
459					      GPI_NONE)>;
460			bias-pull-up;
461			drive-strength = <12>;
462			input-disable;
463			input-schmitt-disable;
464			slew-rate = <0>;
465		};
466
467		mmc-pins {
468			pinmux = <GPIOMUX(9, GPOUT_SYS_SDIO1_CMD,
469					     GPOEN_SYS_SDIO1_CMD,
470					     GPI_SYS_SDIO1_CMD)>,
471				 <GPIOMUX(11, GPOUT_SYS_SDIO1_DATA0,
472					      GPOEN_SYS_SDIO1_DATA0,
473					      GPI_SYS_SDIO1_DATA0)>,
474				 <GPIOMUX(12, GPOUT_SYS_SDIO1_DATA1,
475					      GPOEN_SYS_SDIO1_DATA1,
476					      GPI_SYS_SDIO1_DATA1)>,
477				 <GPIOMUX(7, GPOUT_SYS_SDIO1_DATA2,
478					     GPOEN_SYS_SDIO1_DATA2,
479					     GPI_SYS_SDIO1_DATA2)>,
480				 <GPIOMUX(8, GPOUT_SYS_SDIO1_DATA3,
481					     GPOEN_SYS_SDIO1_DATA3,
482					     GPI_SYS_SDIO1_DATA3)>;
483			bias-pull-up;
484			drive-strength = <12>;
485			input-enable;
486			input-schmitt-enable;
487			slew-rate = <0>;
488		};
489	};
490
491	pcie0_pins: pcie0-0 {
492		clkreq-pins {
493			pinmux = <GPIOMUX(27, GPOUT_LOW,
494					      GPOEN_DISABLE,
495					      GPI_NONE)>;
496			bias-pull-down;
497			drive-strength = <2>;
498			input-enable;
499			input-schmitt-disable;
500			slew-rate = <0>;
501		};
502
503		wake-pins {
504			pinmux = <GPIOMUX(32, GPOUT_LOW,
505					      GPOEN_DISABLE,
506					      GPI_NONE)>;
507			bias-pull-up;
508			drive-strength = <2>;
509			input-enable;
510			input-schmitt-disable;
511			slew-rate = <0>;
512		};
513	};
514
515	pcie1_pins: pcie1-0 {
516		clkreq-pins {
517			pinmux = <GPIOMUX(29, GPOUT_LOW,
518					      GPOEN_DISABLE,
519					      GPI_NONE)>;
520			bias-pull-down;
521			drive-strength = <2>;
522			input-enable;
523			input-schmitt-disable;
524			slew-rate = <0>;
525		};
526
527		wake-pins {
528			pinmux = <GPIOMUX(21, GPOUT_LOW,
529				      GPOEN_DISABLE,
530					      GPI_NONE)>;
531			bias-pull-up;
532			drive-strength = <2>;
533			input-enable;
534			input-schmitt-disable;
535			slew-rate = <0>;
536		};
537	};
538
539	pwmdac_pins: pwmdac-0 {
540		pwmdac-pins {
541			pinmux = <GPIOMUX(33, GPOUT_SYS_PWMDAC_LEFT,
542					      GPOEN_ENABLE,
543					      GPI_NONE)>,
544				 <GPIOMUX(34, GPOUT_SYS_PWMDAC_RIGHT,
545					      GPOEN_ENABLE,
546					      GPI_NONE)>;
547			bias-disable;
548			drive-strength = <2>;
549			input-disable;
550			input-schmitt-disable;
551			slew-rate = <0>;
552		};
553	};
554
555	pwm_pins: pwm-0 {
556		pwm-pins {
557			pinmux = <GPIOMUX(46, GPOUT_SYS_PWM_CHANNEL0,
558					      GPOEN_SYS_PWM0_CHANNEL0,
559					      GPI_NONE)>,
560				 <GPIOMUX(59, GPOUT_SYS_PWM_CHANNEL1,
561					      GPOEN_SYS_PWM0_CHANNEL1,
562					      GPI_NONE)>;
563			bias-disable;
564			drive-strength = <12>;
565			input-disable;
566			input-schmitt-disable;
567			slew-rate = <0>;
568		};
569	};
570
571	spi0_pins: spi0-0 {
572		mosi-pins {
573			pinmux = <GPIOMUX(52, GPOUT_SYS_SPI0_TXD,
574					      GPOEN_ENABLE,
575					      GPI_NONE)>;
576			bias-disable;
577			input-disable;
578			input-schmitt-disable;
579		};
580
581		miso-pins {
582			pinmux = <GPIOMUX(53, GPOUT_LOW,
583					      GPOEN_DISABLE,
584					      GPI_SYS_SPI0_RXD)>;
585			bias-pull-up;
586			input-enable;
587			input-schmitt-enable;
588		};
589
590		sck-pins {
591			pinmux = <GPIOMUX(48, GPOUT_SYS_SPI0_CLK,
592					      GPOEN_ENABLE,
593					      GPI_SYS_SPI0_CLK)>;
594			bias-disable;
595			input-disable;
596			input-schmitt-disable;
597		};
598
599		ss-pins {
600			pinmux = <GPIOMUX(49, GPOUT_SYS_SPI0_FSS,
601					      GPOEN_ENABLE,
602					      GPI_SYS_SPI0_FSS)>;
603			bias-disable;
604			input-disable;
605			input-schmitt-disable;
606		};
607	};
608
609	uart0_pins: uart0-0 {
610		tx-pins {
611			pinmux = <GPIOMUX(5, GPOUT_SYS_UART0_TX,
612					     GPOEN_ENABLE,
613					     GPI_NONE)>;
614			bias-disable;
615			drive-strength = <12>;
616			input-disable;
617			input-schmitt-disable;
618			slew-rate = <0>;
619		};
620
621		rx-pins {
622			pinmux = <GPIOMUX(6, GPOUT_LOW,
623					     GPOEN_DISABLE,
624					     GPI_SYS_UART0_RX)>;
625			bias-disable; /* external pull-up */
626			drive-strength = <2>;
627			input-enable;
628			input-schmitt-enable;
629			slew-rate = <0>;
630		};
631	};
632};
633
634&uart0 {
635	pinctrl-names = "default";
636	pinctrl-0 = <&uart0_pins>;
637	status = "okay";
638};
639
640&U74_1 {
641	cpu-supply = <&vdd_cpu>;
642};
643
644&U74_2 {
645	cpu-supply = <&vdd_cpu>;
646};
647
648&U74_3 {
649	cpu-supply = <&vdd_cpu>;
650};
651
652&U74_4 {
653	cpu-supply = <&vdd_cpu>;
654};
655