1*46a8c017SJunhui Liu// SPDX-License-Identifier: GPL-2.0 OR MIT 2*46a8c017SJunhui Liu/* 3*46a8c017SJunhui Liu * Copyright (C) 2026 Junhui Liu <junhui.liu@pigmoral.tech> 4*46a8c017SJunhui Liu */ 5*46a8c017SJunhui Liu 6*46a8c017SJunhui Liu#include "k1-bananapi-cm6.dtsi" 7*46a8c017SJunhui Liu 8*46a8c017SJunhui Liu#include <dt-bindings/leds/common.h> 9*46a8c017SJunhui Liu 10*46a8c017SJunhui Liu/ { 11*46a8c017SJunhui Liu model = "Banana Pi BPI-CM6 IO Board"; 12*46a8c017SJunhui Liu compatible = "bananapi,bpi-cm6-io", "bananapi,bpi-cm6", "spacemit,k1"; 13*46a8c017SJunhui Liu 14*46a8c017SJunhui Liu aliases { 15*46a8c017SJunhui Liu ethernet0 = ð0; 16*46a8c017SJunhui Liu ethernet1 = ð1; 17*46a8c017SJunhui Liu serial0 = &uart0; 18*46a8c017SJunhui Liu }; 19*46a8c017SJunhui Liu 20*46a8c017SJunhui Liu chosen { 21*46a8c017SJunhui Liu stdout-path = "serial0:115200n8"; 22*46a8c017SJunhui Liu }; 23*46a8c017SJunhui Liu 24*46a8c017SJunhui Liu leds { 25*46a8c017SJunhui Liu compatible = "gpio-leds"; 26*46a8c017SJunhui Liu 27*46a8c017SJunhui Liu led0 { 28*46a8c017SJunhui Liu color = <LED_COLOR_ID_RED>; 29*46a8c017SJunhui Liu gpios = <&gpio K1_GPIO(96) GPIO_ACTIVE_LOW>; 30*46a8c017SJunhui Liu }; 31*46a8c017SJunhui Liu 32*46a8c017SJunhui Liu led1 { 33*46a8c017SJunhui Liu color = <LED_COLOR_ID_BLUE>; 34*46a8c017SJunhui Liu gpios = <&gpio K1_GPIO(97) GPIO_ACTIVE_LOW>; 35*46a8c017SJunhui Liu }; 36*46a8c017SJunhui Liu }; 37*46a8c017SJunhui Liu 38*46a8c017SJunhui Liu pcie_vcc_3v3: regulator-pcie-vcc-3v3 { 39*46a8c017SJunhui Liu compatible = "regulator-fixed"; 40*46a8c017SJunhui Liu regulator-name = "NGFF_KEYM_VDD"; 41*46a8c017SJunhui Liu regulator-min-microvolt = <3300000>; 42*46a8c017SJunhui Liu regulator-max-microvolt = <3300000>; 43*46a8c017SJunhui Liu regulator-boot-on; 44*46a8c017SJunhui Liu regulator-always-on; 45*46a8c017SJunhui Liu }; 46*46a8c017SJunhui Liu 47*46a8c017SJunhui Liu usb_vbus_5v: regulator-usb-vbus-5v { 48*46a8c017SJunhui Liu compatible = "regulator-fixed"; 49*46a8c017SJunhui Liu regulator-name = "VBUS_A_B"; 50*46a8c017SJunhui Liu regulator-min-microvolt = <5000000>; 51*46a8c017SJunhui Liu regulator-max-microvolt = <5000000>; 52*46a8c017SJunhui Liu gpio = <&gpio K1_GPIO(124) GPIO_ACTIVE_HIGH>; 53*46a8c017SJunhui Liu enable-active-high; 54*46a8c017SJunhui Liu }; 55*46a8c017SJunhui Liu 56*46a8c017SJunhui Liu sd_vcc_3v3: regulator-sd-vcc-3v3 { 57*46a8c017SJunhui Liu compatible = "regulator-fixed"; 58*46a8c017SJunhui Liu regulator-name = "3.3VS_CARD"; 59*46a8c017SJunhui Liu regulator-min-microvolt = <3300000>; 60*46a8c017SJunhui Liu regulator-max-microvolt = <3300000>; 61*46a8c017SJunhui Liu gpio = <&gpio K1_GPIO(127) GPIO_ACTIVE_HIGH>; 62*46a8c017SJunhui Liu enable-active-high; 63*46a8c017SJunhui Liu }; 64*46a8c017SJunhui Liu}; 65*46a8c017SJunhui Liu 66*46a8c017SJunhui Liu&combo_phy { 67*46a8c017SJunhui Liu status = "okay"; 68*46a8c017SJunhui Liu}; 69*46a8c017SJunhui Liu 70*46a8c017SJunhui Liuð0 { 71*46a8c017SJunhui Liu status = "okay"; 72*46a8c017SJunhui Liu}; 73*46a8c017SJunhui Liu 74*46a8c017SJunhui Liuð1 { 75*46a8c017SJunhui Liu nvmem-cells = <&mac_address 1>; 76*46a8c017SJunhui Liu nvmem-cell-names = "mac-address"; 77*46a8c017SJunhui Liu phy-handle = <&rgmii1>; 78*46a8c017SJunhui Liu phy-mode = "rgmii-id"; 79*46a8c017SJunhui Liu pinctrl-names = "default"; 80*46a8c017SJunhui Liu pinctrl-0 = <&gmac1_cfg>; 81*46a8c017SJunhui Liu rx-internal-delay-ps = <0>; 82*46a8c017SJunhui Liu tx-internal-delay-ps = <250>; 83*46a8c017SJunhui Liu status = "okay"; 84*46a8c017SJunhui Liu 85*46a8c017SJunhui Liu mdio-bus { 86*46a8c017SJunhui Liu #address-cells = <0x1>; 87*46a8c017SJunhui Liu #size-cells = <0x0>; 88*46a8c017SJunhui Liu 89*46a8c017SJunhui Liu reset-gpios = <&gpio K1_GPIO(46) GPIO_ACTIVE_LOW>; 90*46a8c017SJunhui Liu reset-delay-us = <10000>; 91*46a8c017SJunhui Liu reset-post-delay-us = <100000>; 92*46a8c017SJunhui Liu 93*46a8c017SJunhui Liu rgmii1: phy@1 { 94*46a8c017SJunhui Liu reg = <0x1>; 95*46a8c017SJunhui Liu }; 96*46a8c017SJunhui Liu }; 97*46a8c017SJunhui Liu}; 98*46a8c017SJunhui Liu 99*46a8c017SJunhui Liu&i2c2 { 100*46a8c017SJunhui Liu eeprom@54 { 101*46a8c017SJunhui Liu compatible = "atmel,24c08"; 102*46a8c017SJunhui Liu reg = <0x54>; 103*46a8c017SJunhui Liu vcc-supply = <&buck3_1v8>; 104*46a8c017SJunhui Liu pagesize = <16>; 105*46a8c017SJunhui Liu size = <1024>; 106*46a8c017SJunhui Liu }; 107*46a8c017SJunhui Liu}; 108*46a8c017SJunhui Liu 109*46a8c017SJunhui Liu&pcie1_phy { 110*46a8c017SJunhui Liu pinctrl-names = "default"; 111*46a8c017SJunhui Liu pinctrl-0 = <&pcie1_3_cfg>; 112*46a8c017SJunhui Liu status = "okay"; 113*46a8c017SJunhui Liu}; 114*46a8c017SJunhui Liu 115*46a8c017SJunhui Liu&pcie1_port { 116*46a8c017SJunhui Liu phys = <&pcie1_phy>; 117*46a8c017SJunhui Liu vpcie3v3-supply = <&pcie_vcc_3v3>; 118*46a8c017SJunhui Liu}; 119*46a8c017SJunhui Liu 120*46a8c017SJunhui Liu&pcie1 { 121*46a8c017SJunhui Liu status = "okay"; 122*46a8c017SJunhui Liu}; 123*46a8c017SJunhui Liu 124*46a8c017SJunhui Liu&pcie2_phy { 125*46a8c017SJunhui Liu pinctrl-names = "default"; 126*46a8c017SJunhui Liu pinctrl-0 = <&pcie2_4_cfg>; 127*46a8c017SJunhui Liu status = "okay"; 128*46a8c017SJunhui Liu}; 129*46a8c017SJunhui Liu 130*46a8c017SJunhui Liu&pcie2_port { 131*46a8c017SJunhui Liu phys = <&pcie2_phy>; 132*46a8c017SJunhui Liu vpcie3v3-supply = <&pcie_vcc_3v3>; 133*46a8c017SJunhui Liu}; 134*46a8c017SJunhui Liu 135*46a8c017SJunhui Liu&pcie2 { 136*46a8c017SJunhui Liu status = "okay"; 137*46a8c017SJunhui Liu}; 138*46a8c017SJunhui Liu 139*46a8c017SJunhui Liu&qspi { 140*46a8c017SJunhui Liu pinctrl-names = "default"; 141*46a8c017SJunhui Liu pinctrl-0 = <&qspi_cfg>; 142*46a8c017SJunhui Liu status = "okay"; 143*46a8c017SJunhui Liu}; 144*46a8c017SJunhui Liu 145*46a8c017SJunhui Liu&sdhci0 { 146*46a8c017SJunhui Liu pinctrl-names = "default", "uhs"; 147*46a8c017SJunhui Liu pinctrl-0 = <&mmc1_cfg>; 148*46a8c017SJunhui Liu pinctrl-1 = <&mmc1_uhs_cfg>; 149*46a8c017SJunhui Liu bus-width = <4>; 150*46a8c017SJunhui Liu cd-gpios = <&gpio K1_GPIO(80) (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; 151*46a8c017SJunhui Liu no-mmc; 152*46a8c017SJunhui Liu no-sdio; 153*46a8c017SJunhui Liu disable-wp; 154*46a8c017SJunhui Liu cap-sd-highspeed; 155*46a8c017SJunhui Liu vmmc-supply = <&sd_vcc_3v3>; 156*46a8c017SJunhui Liu vqmmc-supply = <&aldo1>; 157*46a8c017SJunhui Liu sd-uhs-sdr25; 158*46a8c017SJunhui Liu sd-uhs-sdr50; 159*46a8c017SJunhui Liu sd-uhs-sdr104; 160*46a8c017SJunhui Liu status = "okay"; 161*46a8c017SJunhui Liu}; 162*46a8c017SJunhui Liu 163*46a8c017SJunhui Liu&uart0 { 164*46a8c017SJunhui Liu pinctrl-names = "default"; 165*46a8c017SJunhui Liu pinctrl-0 = <&uart0_2_cfg>; 166*46a8c017SJunhui Liu status = "okay"; 167*46a8c017SJunhui Liu}; 168*46a8c017SJunhui Liu 169*46a8c017SJunhui Liu&usbphy2 { 170*46a8c017SJunhui Liu status = "okay"; 171*46a8c017SJunhui Liu}; 172*46a8c017SJunhui Liu 173*46a8c017SJunhui Liu&usb_dwc3 { 174*46a8c017SJunhui Liu dr_mode = "host"; 175*46a8c017SJunhui Liu vbus-supply = <&usb_vbus_5v>; 176*46a8c017SJunhui Liu status = "okay"; 177*46a8c017SJunhui Liu}; 178