xref: /linux/scripts/dtc/include-prefixes/riscv/sophgo/sg2002-licheerv-nano-b.dts (revision c34e9ab9a612ee8b18273398ef75c207b01f516d)
1*d3255230SThomas Bonnefille// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2*d3255230SThomas Bonnefille/*
3*d3255230SThomas Bonnefille * Copyright (C) 2024 Thomas Bonnefille <thomas.bonnefille@bootlin.com>
4*d3255230SThomas Bonnefille */
5*d3255230SThomas Bonnefille
6*d3255230SThomas Bonnefille/dts-v1/;
7*d3255230SThomas Bonnefille
8*d3255230SThomas Bonnefille#include "sg2002.dtsi"
9*d3255230SThomas Bonnefille
10*d3255230SThomas Bonnefille/ {
11*d3255230SThomas Bonnefille	model = "LicheeRV Nano B";
12*d3255230SThomas Bonnefille	compatible = "sipeed,licheerv-nano-b", "sipeed,licheerv-nano", "sophgo,sg2002";
13*d3255230SThomas Bonnefille
14*d3255230SThomas Bonnefille	aliases {
15*d3255230SThomas Bonnefille		gpio0 = &gpio0;
16*d3255230SThomas Bonnefille		gpio1 = &gpio1;
17*d3255230SThomas Bonnefille		gpio2 = &gpio2;
18*d3255230SThomas Bonnefille		gpio3 = &gpio3;
19*d3255230SThomas Bonnefille		serial0 = &uart0;
20*d3255230SThomas Bonnefille		serial1 = &uart1;
21*d3255230SThomas Bonnefille		serial2 = &uart2;
22*d3255230SThomas Bonnefille		serial3 = &uart3;
23*d3255230SThomas Bonnefille		serial4 = &uart4;
24*d3255230SThomas Bonnefille	};
25*d3255230SThomas Bonnefille
26*d3255230SThomas Bonnefille	chosen {
27*d3255230SThomas Bonnefille		stdout-path = "serial0:115200n8";
28*d3255230SThomas Bonnefille	};
29*d3255230SThomas Bonnefille};
30*d3255230SThomas Bonnefille
31*d3255230SThomas Bonnefille&osc {
32*d3255230SThomas Bonnefille	clock-frequency = <25000000>;
33*d3255230SThomas Bonnefille};
34*d3255230SThomas Bonnefille
35*d3255230SThomas Bonnefille&pinctrl {
36*d3255230SThomas Bonnefille	uart0_cfg: uart0-cfg {
37*d3255230SThomas Bonnefille		uart0-pins {
38*d3255230SThomas Bonnefille			pinmux = <PINMUX(PIN_UART0_TX, 0)>,
39*d3255230SThomas Bonnefille				 <PINMUX(PIN_UART0_RX, 0)>;
40*d3255230SThomas Bonnefille			bias-pull-up;
41*d3255230SThomas Bonnefille			drive-strength-microamp = <10800>;
42*d3255230SThomas Bonnefille			power-source = <3300>;
43*d3255230SThomas Bonnefille		};
44*d3255230SThomas Bonnefille	};
45*d3255230SThomas Bonnefille
46*d3255230SThomas Bonnefille	sdhci0_cfg: sdhci0-cfg {
47*d3255230SThomas Bonnefille		sdhci0-clk-pins {
48*d3255230SThomas Bonnefille			pinmux = <PINMUX(PIN_SD0_CLK, 0)>;
49*d3255230SThomas Bonnefille			bias-pull-up;
50*d3255230SThomas Bonnefille			drive-strength-microamp = <16100>;
51*d3255230SThomas Bonnefille			power-source = <3300>;
52*d3255230SThomas Bonnefille		};
53*d3255230SThomas Bonnefille
54*d3255230SThomas Bonnefille		sdhci0-cmd-pins {
55*d3255230SThomas Bonnefille			pinmux = <PINMUX(PIN_SD0_CMD, 0)>;
56*d3255230SThomas Bonnefille			bias-pull-up;
57*d3255230SThomas Bonnefille			drive-strength-microamp = <10800>;
58*d3255230SThomas Bonnefille			power-source = <3300>;
59*d3255230SThomas Bonnefille		};
60*d3255230SThomas Bonnefille
61*d3255230SThomas Bonnefille		sdhci0-data-pins {
62*d3255230SThomas Bonnefille			pinmux = <PINMUX(PIN_SD0_D0, 0)>,
63*d3255230SThomas Bonnefille				 <PINMUX(PIN_SD0_D1, 0)>,
64*d3255230SThomas Bonnefille				 <PINMUX(PIN_SD0_D2, 0)>,
65*d3255230SThomas Bonnefille				 <PINMUX(PIN_SD0_D3, 0)>;
66*d3255230SThomas Bonnefille			bias-pull-up;
67*d3255230SThomas Bonnefille			drive-strength-microamp = <10800>;
68*d3255230SThomas Bonnefille			power-source = <3300>;
69*d3255230SThomas Bonnefille		};
70*d3255230SThomas Bonnefille
71*d3255230SThomas Bonnefille		sdhci0-cd-pins {
72*d3255230SThomas Bonnefille			pinmux = <PINMUX(PIN_SD0_CD, 0)>;
73*d3255230SThomas Bonnefille			bias-pull-up;
74*d3255230SThomas Bonnefille			drive-strength-microamp = <10800>;
75*d3255230SThomas Bonnefille			power-source = <3300>;
76*d3255230SThomas Bonnefille		};
77*d3255230SThomas Bonnefille	};
78*d3255230SThomas Bonnefille};
79*d3255230SThomas Bonnefille
80*d3255230SThomas Bonnefille&sdhci0 {
81*d3255230SThomas Bonnefille	pinctrl-0 = <&sdhci0_cfg>;
82*d3255230SThomas Bonnefille	pinctrl-names = "default";
83*d3255230SThomas Bonnefille	status = "okay";
84*d3255230SThomas Bonnefille	bus-width = <4>;
85*d3255230SThomas Bonnefille	no-1-8-v;
86*d3255230SThomas Bonnefille	no-mmc;
87*d3255230SThomas Bonnefille	no-sdio;
88*d3255230SThomas Bonnefille	disable-wp;
89*d3255230SThomas Bonnefille};
90*d3255230SThomas Bonnefille
91*d3255230SThomas Bonnefille&uart0 {
92*d3255230SThomas Bonnefille	pinctrl-0 = <&uart0_cfg>;
93*d3255230SThomas Bonnefille	pinctrl-names = "default";
94*d3255230SThomas Bonnefille	status = "okay";
95*d3255230SThomas Bonnefille};
96