127df2ed3SJisheng Zhang// SPDX-License-Identifier: (GPL-2.0 OR MIT) 227df2ed3SJisheng Zhang/* 327df2ed3SJisheng Zhang * Copyright (C) 2023 Jisheng Zhang <jszhang@kernel.org> 427df2ed3SJisheng Zhang */ 527df2ed3SJisheng Zhang 627df2ed3SJisheng Zhang/dts-v1/; 727df2ed3SJisheng Zhang 827df2ed3SJisheng Zhang#include "cv1800b.dtsi" 927df2ed3SJisheng Zhang 1027df2ed3SJisheng Zhang/ { 1127df2ed3SJisheng Zhang model = "Milk-V Duo"; 1227df2ed3SJisheng Zhang compatible = "milkv,duo", "sophgo,cv1800b"; 1327df2ed3SJisheng Zhang 1427df2ed3SJisheng Zhang aliases { 1527df2ed3SJisheng Zhang serial0 = &uart0; 1627df2ed3SJisheng Zhang serial1 = &uart1; 1727df2ed3SJisheng Zhang serial2 = &uart2; 1827df2ed3SJisheng Zhang serial3 = &uart3; 1927df2ed3SJisheng Zhang serial4 = &uart4; 2027df2ed3SJisheng Zhang }; 2127df2ed3SJisheng Zhang 2227df2ed3SJisheng Zhang chosen { 2327df2ed3SJisheng Zhang stdout-path = "serial0:115200n8"; 2427df2ed3SJisheng Zhang }; 2527df2ed3SJisheng Zhang 261eba0b61SInochi Amaoto reserved-memory { 271eba0b61SInochi Amaoto #address-cells = <1>; 281eba0b61SInochi Amaoto #size-cells = <1>; 291eba0b61SInochi Amaoto ranges; 301eba0b61SInochi Amaoto 311eba0b61SInochi Amaoto coprocessor_rtos: region@83f40000 { 321eba0b61SInochi Amaoto reg = <0x83f40000 0xc0000>; 331eba0b61SInochi Amaoto no-map; 341eba0b61SInochi Amaoto }; 3527df2ed3SJisheng Zhang }; 3627df2ed3SJisheng Zhang}; 3727df2ed3SJisheng Zhang 3827df2ed3SJisheng Zhang&osc { 3927df2ed3SJisheng Zhang clock-frequency = <25000000>; 4027df2ed3SJisheng Zhang}; 4127df2ed3SJisheng Zhang 4289a7056eSJisheng Zhang&sdhci0 { 4389a7056eSJisheng Zhang status = "okay"; 4489a7056eSJisheng Zhang bus-width = <4>; 4589a7056eSJisheng Zhang no-1-8-v; 4689a7056eSJisheng Zhang no-mmc; 4789a7056eSJisheng Zhang no-sdio; 48*890182bbSHaylen Chu disable-wp; 4989a7056eSJisheng Zhang}; 5089a7056eSJisheng Zhang 5127df2ed3SJisheng Zhang&uart0 { 5227df2ed3SJisheng Zhang status = "okay"; 5327df2ed3SJisheng Zhang}; 54