1*062b9b66SKrzysztof Kozlowski// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2077e5f4fSSamuel Holland// Copyright (C) 2021-2022 Samuel Holland <samuel@sholland.org> 3077e5f4fSSamuel Holland 4077e5f4fSSamuel Holland#include "sun20i-d1s.dtsi" 5077e5f4fSSamuel Holland#include "sunxi-d1-t113.dtsi" 6077e5f4fSSamuel Holland 7077e5f4fSSamuel Holland/ { 8077e5f4fSSamuel Holland soc { 9077e5f4fSSamuel Holland lradc: keys@2009800 { 10077e5f4fSSamuel Holland compatible = "allwinner,sun20i-d1-lradc", 11077e5f4fSSamuel Holland "allwinner,sun50i-r329-lradc"; 12077e5f4fSSamuel Holland reg = <0x2009800 0x400>; 13077e5f4fSSamuel Holland interrupts = <SOC_PERIPHERAL_IRQ(61) IRQ_TYPE_LEVEL_HIGH>; 14077e5f4fSSamuel Holland clocks = <&ccu CLK_BUS_LRADC>; 15077e5f4fSSamuel Holland resets = <&ccu RST_BUS_LRADC>; 16077e5f4fSSamuel Holland status = "disabled"; 17077e5f4fSSamuel Holland }; 18077e5f4fSSamuel Holland 19077e5f4fSSamuel Holland i2s0: i2s@2032000 { 20077e5f4fSSamuel Holland compatible = "allwinner,sun20i-d1-i2s", 21077e5f4fSSamuel Holland "allwinner,sun50i-r329-i2s"; 22077e5f4fSSamuel Holland reg = <0x2032000 0x1000>; 23077e5f4fSSamuel Holland interrupts = <SOC_PERIPHERAL_IRQ(26) IRQ_TYPE_LEVEL_HIGH>; 24077e5f4fSSamuel Holland clocks = <&ccu CLK_BUS_I2S0>, 25077e5f4fSSamuel Holland <&ccu CLK_I2S0>; 26077e5f4fSSamuel Holland clock-names = "apb", "mod"; 27077e5f4fSSamuel Holland resets = <&ccu RST_BUS_I2S0>; 28077e5f4fSSamuel Holland dmas = <&dma 3>, <&dma 3>; 29077e5f4fSSamuel Holland dma-names = "rx", "tx"; 30077e5f4fSSamuel Holland status = "disabled"; 31077e5f4fSSamuel Holland #sound-dai-cells = <0>; 32077e5f4fSSamuel Holland }; 33077e5f4fSSamuel Holland }; 34077e5f4fSSamuel Holland}; 35077e5f4fSSamuel Holland 36077e5f4fSSamuel Holland&pio { 37077e5f4fSSamuel Holland /omit-if-no-ref/ 38077e5f4fSSamuel Holland dmic_pb11_d0_pin: dmic-pb11-d0-pin { 39077e5f4fSSamuel Holland pins = "PB11"; 40077e5f4fSSamuel Holland function = "dmic"; 41077e5f4fSSamuel Holland }; 42077e5f4fSSamuel Holland 43077e5f4fSSamuel Holland /omit-if-no-ref/ 44077e5f4fSSamuel Holland dmic_pe17_clk_pin: dmic-pe17-clk-pin { 45077e5f4fSSamuel Holland pins = "PE17"; 46077e5f4fSSamuel Holland function = "dmic"; 47077e5f4fSSamuel Holland }; 48077e5f4fSSamuel Holland 49077e5f4fSSamuel Holland /omit-if-no-ref/ 50077e5f4fSSamuel Holland i2c0_pb10_pins: i2c0-pb10-pins { 51077e5f4fSSamuel Holland pins = "PB10", "PB11"; 52077e5f4fSSamuel Holland function = "i2c0"; 53077e5f4fSSamuel Holland }; 54077e5f4fSSamuel Holland 55077e5f4fSSamuel Holland /omit-if-no-ref/ 56077e5f4fSSamuel Holland i2c2_pb0_pins: i2c2-pb0-pins { 57077e5f4fSSamuel Holland pins = "PB0", "PB1"; 58077e5f4fSSamuel Holland function = "i2c2"; 59077e5f4fSSamuel Holland }; 60077e5f4fSSamuel Holland 61077e5f4fSSamuel Holland /omit-if-no-ref/ 62077e5f4fSSamuel Holland uart0_pb8_pins: uart0-pb8-pins { 63077e5f4fSSamuel Holland pins = "PB8", "PB9"; 64077e5f4fSSamuel Holland function = "uart0"; 65077e5f4fSSamuel Holland }; 66077e5f4fSSamuel Holland}; 67