199192af0SSean MacLennan/* 299192af0SSean MacLennan * Device Tree Source for PIKA Warp 399192af0SSean MacLennan * 499192af0SSean MacLennan * Copyright (c) 2008 PIKA Technologies 599192af0SSean MacLennan * Sean MacLennan <smaclennan@pikatech.com> 699192af0SSean MacLennan * 799192af0SSean MacLennan * This file is licensed under the terms of the GNU General Public 899192af0SSean MacLennan * License version 2. This program is licensed "as is" without 999192af0SSean MacLennan * any warranty of any kind, whether express or implied. 1099192af0SSean MacLennan */ 1199192af0SSean MacLennan 12*71f34979SDavid Gibson/dts-v1/; 13*71f34979SDavid Gibson 1499192af0SSean MacLennan/ { 1599192af0SSean MacLennan #address-cells = <2>; 1699192af0SSean MacLennan #size-cells = <1>; 1799192af0SSean MacLennan model = "pika,warp"; 1899192af0SSean MacLennan compatible = "pika,warp"; 19*71f34979SDavid Gibson dcr-parent = <&{/cpus/cpu@0}>; 2099192af0SSean MacLennan 2199192af0SSean MacLennan aliases { 2299192af0SSean MacLennan ethernet0 = &EMAC0; 2399192af0SSean MacLennan serial0 = &UART0; 2499192af0SSean MacLennan }; 2599192af0SSean MacLennan 2699192af0SSean MacLennan cpus { 2799192af0SSean MacLennan #address-cells = <1>; 2899192af0SSean MacLennan #size-cells = <0>; 2999192af0SSean MacLennan 3099192af0SSean MacLennan cpu@0 { 3199192af0SSean MacLennan device_type = "cpu"; 3299192af0SSean MacLennan model = "PowerPC,440EP"; 33*71f34979SDavid Gibson reg = <0x00000000>; 3499192af0SSean MacLennan clock-frequency = <0>; /* Filled in by zImage */ 3599192af0SSean MacLennan timebase-frequency = <0>; /* Filled in by zImage */ 36*71f34979SDavid Gibson i-cache-line-size = <32>; 37*71f34979SDavid Gibson d-cache-line-size = <32>; 38*71f34979SDavid Gibson i-cache-size = <32768>; 39*71f34979SDavid Gibson d-cache-size = <32768>; 4099192af0SSean MacLennan dcr-controller; 4199192af0SSean MacLennan dcr-access-method = "native"; 4299192af0SSean MacLennan }; 4399192af0SSean MacLennan }; 4499192af0SSean MacLennan 4599192af0SSean MacLennan memory { 4699192af0SSean MacLennan device_type = "memory"; 47*71f34979SDavid Gibson reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */ 4899192af0SSean MacLennan }; 4999192af0SSean MacLennan 5099192af0SSean MacLennan UIC0: interrupt-controller0 { 5199192af0SSean MacLennan compatible = "ibm,uic-440ep","ibm,uic"; 5299192af0SSean MacLennan interrupt-controller; 5399192af0SSean MacLennan cell-index = <0>; 54*71f34979SDavid Gibson dcr-reg = <0x0c0 0x009>; 5599192af0SSean MacLennan #address-cells = <0>; 5699192af0SSean MacLennan #size-cells = <0>; 5799192af0SSean MacLennan #interrupt-cells = <2>; 5899192af0SSean MacLennan }; 5999192af0SSean MacLennan 6099192af0SSean MacLennan UIC1: interrupt-controller1 { 6199192af0SSean MacLennan compatible = "ibm,uic-440ep","ibm,uic"; 6299192af0SSean MacLennan interrupt-controller; 6399192af0SSean MacLennan cell-index = <1>; 64*71f34979SDavid Gibson dcr-reg = <0x0d0 0x009>; 6599192af0SSean MacLennan #address-cells = <0>; 6699192af0SSean MacLennan #size-cells = <0>; 6799192af0SSean MacLennan #interrupt-cells = <2>; 68*71f34979SDavid Gibson interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ 6999192af0SSean MacLennan interrupt-parent = <&UIC0>; 7099192af0SSean MacLennan }; 7199192af0SSean MacLennan 7299192af0SSean MacLennan SDR0: sdr { 7399192af0SSean MacLennan compatible = "ibm,sdr-440ep"; 74*71f34979SDavid Gibson dcr-reg = <0x00e 0x002>; 7599192af0SSean MacLennan }; 7699192af0SSean MacLennan 7799192af0SSean MacLennan CPR0: cpr { 7899192af0SSean MacLennan compatible = "ibm,cpr-440ep"; 79*71f34979SDavid Gibson dcr-reg = <0x00c 0x002>; 8099192af0SSean MacLennan }; 8199192af0SSean MacLennan 8299192af0SSean MacLennan plb { 8399192af0SSean MacLennan compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4"; 8499192af0SSean MacLennan #address-cells = <2>; 8599192af0SSean MacLennan #size-cells = <1>; 8699192af0SSean MacLennan ranges; 8799192af0SSean MacLennan clock-frequency = <0>; /* Filled in by zImage */ 8899192af0SSean MacLennan 8999192af0SSean MacLennan SDRAM0: sdram { 9099192af0SSean MacLennan compatible = "ibm,sdram-440ep", "ibm,sdram-405gp"; 91*71f34979SDavid Gibson dcr-reg = <0x010 0x002>; 9299192af0SSean MacLennan }; 9399192af0SSean MacLennan 9499192af0SSean MacLennan DMA0: dma { 9599192af0SSean MacLennan compatible = "ibm,dma-440ep", "ibm,dma-440gp"; 96*71f34979SDavid Gibson dcr-reg = <0x100 0x027>; 9799192af0SSean MacLennan }; 9899192af0SSean MacLennan 9999192af0SSean MacLennan MAL0: mcmal { 10099192af0SSean MacLennan compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal"; 101*71f34979SDavid Gibson dcr-reg = <0x180 0x062>; 10299192af0SSean MacLennan num-tx-chans = <4>; 10399192af0SSean MacLennan num-rx-chans = <2>; 10499192af0SSean MacLennan interrupt-parent = <&MAL0>; 105*71f34979SDavid Gibson interrupts = <0x0 0x1 0x2 0x3 0x4>; 10699192af0SSean MacLennan #interrupt-cells = <1>; 10799192af0SSean MacLennan #address-cells = <0>; 10899192af0SSean MacLennan #size-cells = <0>; 109*71f34979SDavid Gibson interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 110*71f34979SDavid Gibson /*RXEOB*/ 0x1 &UIC0 0xb 0x4 111*71f34979SDavid Gibson /*SERR*/ 0x2 &UIC1 0x0 0x4 112*71f34979SDavid Gibson /*TXDE*/ 0x3 &UIC1 0x1 0x4 113*71f34979SDavid Gibson /*RXDE*/ 0x4 &UIC1 0x2 0x4>; 11499192af0SSean MacLennan }; 11599192af0SSean MacLennan 11699192af0SSean MacLennan POB0: opb { 11799192af0SSean MacLennan compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb"; 11899192af0SSean MacLennan #address-cells = <1>; 11999192af0SSean MacLennan #size-cells = <1>; 120*71f34979SDavid Gibson ranges = <0x00000000 0x00000000 0x00000000 0x80000000 121*71f34979SDavid Gibson 0x80000000 0x00000000 0x80000000 0x80000000>; 12299192af0SSean MacLennan interrupt-parent = <&UIC1>; 123*71f34979SDavid Gibson interrupts = <0x7 0x4>; 12499192af0SSean MacLennan clock-frequency = <0>; /* Filled in by zImage */ 12599192af0SSean MacLennan 12699192af0SSean MacLennan EBC0: ebc { 12799192af0SSean MacLennan compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc"; 128*71f34979SDavid Gibson dcr-reg = <0x012 0x002>; 12999192af0SSean MacLennan #address-cells = <2>; 13099192af0SSean MacLennan #size-cells = <1>; 13199192af0SSean MacLennan clock-frequency = <0>; /* Filled in by zImage */ 132*71f34979SDavid Gibson interrupts = <0x5 0x1>; 13399192af0SSean MacLennan interrupt-parent = <&UIC1>; 13499192af0SSean MacLennan 13599192af0SSean MacLennan fpga@2,0 { 13699192af0SSean MacLennan compatible = "pika,fpga"; 137*71f34979SDavid Gibson reg = <0x00000002 0x00000000 0x00002200>; 138*71f34979SDavid Gibson interrupts = <0x18 0x8>; 13999192af0SSean MacLennan interrupt-parent = <&UIC0>; 14099192af0SSean MacLennan }; 14199192af0SSean MacLennan 14299192af0SSean MacLennan nor_flash@0,0 { 14399192af0SSean MacLennan compatible = "amd,s29gl512n", "cfi-flash"; 14499192af0SSean MacLennan bank-width = <2>; 145*71f34979SDavid Gibson reg = <0x00000000 0x00000000 0x04000000>; 14699192af0SSean MacLennan #address-cells = <1>; 14799192af0SSean MacLennan #size-cells = <1>; 14899192af0SSean MacLennan partition@0 { 14999192af0SSean MacLennan label = "kernel"; 150*71f34979SDavid Gibson reg = <0x00000000 0x00180000>; 15199192af0SSean MacLennan }; 15299192af0SSean MacLennan partition@180000 { 15399192af0SSean MacLennan label = "root"; 154*71f34979SDavid Gibson reg = <0x00180000 0x03480000>; 15599192af0SSean MacLennan }; 15699192af0SSean MacLennan partition@3600000 { 15799192af0SSean MacLennan label = "user"; 158*71f34979SDavid Gibson reg = <0x03600000 0x00900000>; 15999192af0SSean MacLennan }; 16099192af0SSean MacLennan partition@3f00000 { 16199192af0SSean MacLennan label = "fpga"; 162*71f34979SDavid Gibson reg = <0x03f00000 0x00040000>; 16399192af0SSean MacLennan }; 16499192af0SSean MacLennan partition@3f40000 { 16599192af0SSean MacLennan label = "env"; 166*71f34979SDavid Gibson reg = <0x03f40000 0x00040000>; 16799192af0SSean MacLennan }; 16899192af0SSean MacLennan partition@3f80000 { 16999192af0SSean MacLennan label = "u-boot"; 170*71f34979SDavid Gibson reg = <0x03f80000 0x00080000>; 17199192af0SSean MacLennan }; 17299192af0SSean MacLennan }; 17399192af0SSean MacLennan }; 17499192af0SSean MacLennan 17599192af0SSean MacLennan UART0: serial@ef600300 { 17699192af0SSean MacLennan device_type = "serial"; 17799192af0SSean MacLennan compatible = "ns16550"; 178*71f34979SDavid Gibson reg = <0xef600300 0x00000008>; 179*71f34979SDavid Gibson virtual-reg = <0xef600300>; 18099192af0SSean MacLennan clock-frequency = <0>; /* Filled in by zImage */ 181*71f34979SDavid Gibson current-speed = <115200>; 18299192af0SSean MacLennan interrupt-parent = <&UIC0>; 183*71f34979SDavid Gibson interrupts = <0x0 0x4>; 18499192af0SSean MacLennan }; 18599192af0SSean MacLennan 18699192af0SSean MacLennan IIC0: i2c@ef600700 { 18799192af0SSean MacLennan compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; 188*71f34979SDavid Gibson reg = <0xef600700 0x00000014>; 18999192af0SSean MacLennan interrupt-parent = <&UIC0>; 190*71f34979SDavid Gibson interrupts = <0x2 0x4>; 19199192af0SSean MacLennan }; 19299192af0SSean MacLennan 19399192af0SSean MacLennan GPIO0: gpio@ef600b00 { 19499192af0SSean MacLennan compatible = "ibm,gpio-440ep"; 195*71f34979SDavid Gibson reg = <0xef600b00 0x00000048>; 19699192af0SSean MacLennan }; 19799192af0SSean MacLennan 19899192af0SSean MacLennan GPIO1: gpio@ef600c00 { 19999192af0SSean MacLennan compatible = "ibm,gpio-440ep"; 200*71f34979SDavid Gibson reg = <0xef600c00 0x00000048>; 20199192af0SSean MacLennan }; 20299192af0SSean MacLennan 20399192af0SSean MacLennan ZMII0: emac-zmii@ef600d00 { 20499192af0SSean MacLennan compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii"; 205*71f34979SDavid Gibson reg = <0xef600d00 0x0000000c>; 20699192af0SSean MacLennan }; 20799192af0SSean MacLennan 20899192af0SSean MacLennan EMAC0: ethernet@ef600e00 { 20999192af0SSean MacLennan device_type = "network"; 21099192af0SSean MacLennan compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; 21199192af0SSean MacLennan interrupt-parent = <&UIC1>; 212*71f34979SDavid Gibson interrupts = <0x1c 0x4 0x1d 0x4>; 213*71f34979SDavid Gibson reg = <0xef600e00 0x00000070>; 21499192af0SSean MacLennan local-mac-address = [000000000000]; 21599192af0SSean MacLennan mal-device = <&MAL0>; 21699192af0SSean MacLennan mal-tx-channel = <0 1>; 21799192af0SSean MacLennan mal-rx-channel = <0>; 21899192af0SSean MacLennan cell-index = <0>; 219*71f34979SDavid Gibson max-frame-size = <1500>; 220*71f34979SDavid Gibson rx-fifo-size = <4096>; 221*71f34979SDavid Gibson tx-fifo-size = <2048>; 22299192af0SSean MacLennan phy-mode = "rmii"; 223*71f34979SDavid Gibson phy-map = <0x00000000>; 22499192af0SSean MacLennan zmii-device = <&ZMII0>; 22599192af0SSean MacLennan zmii-channel = <0>; 22699192af0SSean MacLennan }; 22799192af0SSean MacLennan 22899192af0SSean MacLennan usb@ef601000 { 22999192af0SSean MacLennan compatible = "ohci-be"; 230*71f34979SDavid Gibson reg = <0xef601000 0x00000080>; 231*71f34979SDavid Gibson interrupts = <0x8 0x1 0x9 0x1>; 23299192af0SSean MacLennan interrupt-parent = < &UIC1 >; 23399192af0SSean MacLennan }; 23499192af0SSean MacLennan }; 23599192af0SSean MacLennan }; 23699192af0SSean MacLennan 23799192af0SSean MacLennan chosen { 23899192af0SSean MacLennan linux,stdout-path = "/plb/opb/serial@ef600300"; 23999192af0SSean MacLennan }; 24099192af0SSean MacLennan}; 241