1b6014e15SGiuseppe Coviello/* 2b6014e15SGiuseppe Coviello * Device Tree Source for ACube Sam440ep based off bamboo.dts code 3b6014e15SGiuseppe Coviello * original copyrights below 4b6014e15SGiuseppe Coviello * 5b6014e15SGiuseppe Coviello * Copyright (c) 2006, 2007 IBM Corp. 6b6014e15SGiuseppe Coviello * Josh Boyer <jwboyer@linux.vnet.ibm.com> 7b6014e15SGiuseppe Coviello * 8b6014e15SGiuseppe Coviello * Modified from bamboo.dts for sam440ep: 9b6014e15SGiuseppe Coviello * Copyright 2008 Giuseppe Coviello <gicoviello@gmail.com> 10b6014e15SGiuseppe Coviello * 11b6014e15SGiuseppe Coviello * This file is licensed under the terms of the GNU General Public 12b6014e15SGiuseppe Coviello * License version 2. This program is licensed "as is" without 13b6014e15SGiuseppe Coviello * any warranty of any kind, whether express or implied. 14b6014e15SGiuseppe Coviello */ 15b6014e15SGiuseppe Coviello 16d2146cb2SGiuseppe Coviello/dts-v1/; 17d2146cb2SGiuseppe Coviello 18b6014e15SGiuseppe Coviello/ { 19b6014e15SGiuseppe Coviello #address-cells = <2>; 20b6014e15SGiuseppe Coviello #size-cells = <1>; 21b6014e15SGiuseppe Coviello model = "acube,sam440ep"; 22b6014e15SGiuseppe Coviello compatible = "acube,sam440ep"; 23b6014e15SGiuseppe Coviello 24b6014e15SGiuseppe Coviello aliases { 25b6014e15SGiuseppe Coviello ethernet0 = &EMAC0; 26b6014e15SGiuseppe Coviello ethernet1 = &EMAC1; 27b6014e15SGiuseppe Coviello serial0 = &UART0; 28b6014e15SGiuseppe Coviello serial1 = &UART1; 29b6014e15SGiuseppe Coviello serial2 = &UART2; 30b6014e15SGiuseppe Coviello serial3 = &UART3; 31b6014e15SGiuseppe Coviello }; 32b6014e15SGiuseppe Coviello 33b6014e15SGiuseppe Coviello cpus { 34b6014e15SGiuseppe Coviello #address-cells = <1>; 35b6014e15SGiuseppe Coviello #size-cells = <0>; 36b6014e15SGiuseppe Coviello 37b6014e15SGiuseppe Coviello cpu@0 { 38b6014e15SGiuseppe Coviello device_type = "cpu"; 39b6014e15SGiuseppe Coviello model = "PowerPC,440EP"; 40b6014e15SGiuseppe Coviello reg = <0>; 41b6014e15SGiuseppe Coviello clock-frequency = <0>; /* Filled in by zImage */ 42b6014e15SGiuseppe Coviello timebase-frequency = <0>; /* Filled in by zImage */ 43d2146cb2SGiuseppe Coviello i-cache-line-size = <32>; 44d2146cb2SGiuseppe Coviello d-cache-line-size = <32>; 45d2146cb2SGiuseppe Coviello i-cache-size = <32768>; 46d2146cb2SGiuseppe Coviello d-cache-size = <32768>; 47b6014e15SGiuseppe Coviello dcr-controller; 48b6014e15SGiuseppe Coviello dcr-access-method = "native"; 49b6014e15SGiuseppe Coviello }; 50b6014e15SGiuseppe Coviello }; 51b6014e15SGiuseppe Coviello 52b6014e15SGiuseppe Coviello memory { 53b6014e15SGiuseppe Coviello device_type = "memory"; 54b6014e15SGiuseppe Coviello reg = <0 0 0>; /* Filled in by zImage */ 55b6014e15SGiuseppe Coviello }; 56b6014e15SGiuseppe Coviello 57b6014e15SGiuseppe Coviello UIC0: interrupt-controller0 { 58b6014e15SGiuseppe Coviello compatible = "ibm,uic-440ep","ibm,uic"; 59b6014e15SGiuseppe Coviello interrupt-controller; 60b6014e15SGiuseppe Coviello cell-index = <0>; 61d2146cb2SGiuseppe Coviello dcr-reg = <0x0c0 9>; 62b6014e15SGiuseppe Coviello #address-cells = <0>; 63b6014e15SGiuseppe Coviello #size-cells = <0>; 64b6014e15SGiuseppe Coviello #interrupt-cells = <2>; 65b6014e15SGiuseppe Coviello }; 66b6014e15SGiuseppe Coviello 67b6014e15SGiuseppe Coviello UIC1: interrupt-controller1 { 68b6014e15SGiuseppe Coviello compatible = "ibm,uic-440ep","ibm,uic"; 69b6014e15SGiuseppe Coviello interrupt-controller; 70b6014e15SGiuseppe Coviello cell-index = <1>; 71d2146cb2SGiuseppe Coviello dcr-reg = <0x0d0 9>; 72b6014e15SGiuseppe Coviello #address-cells = <0>; 73b6014e15SGiuseppe Coviello #size-cells = <0>; 74b6014e15SGiuseppe Coviello #interrupt-cells = <2>; 75d2146cb2SGiuseppe Coviello interrupts = <0x1e 4 0x1f 4>; /* cascade */ 76b6014e15SGiuseppe Coviello interrupt-parent = <&UIC0>; 77b6014e15SGiuseppe Coviello }; 78b6014e15SGiuseppe Coviello 79b6014e15SGiuseppe Coviello SDR0: sdr { 80b6014e15SGiuseppe Coviello compatible = "ibm,sdr-440ep"; 81d2146cb2SGiuseppe Coviello dcr-reg = <0x00e 2>; 82b6014e15SGiuseppe Coviello }; 83b6014e15SGiuseppe Coviello 84b6014e15SGiuseppe Coviello CPR0: cpr { 85b6014e15SGiuseppe Coviello compatible = "ibm,cpr-440ep"; 86d2146cb2SGiuseppe Coviello dcr-reg = <0x00c 2>; 87b6014e15SGiuseppe Coviello }; 88b6014e15SGiuseppe Coviello 89b6014e15SGiuseppe Coviello plb { 90b6014e15SGiuseppe Coviello compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4"; 91b6014e15SGiuseppe Coviello #address-cells = <2>; 92b6014e15SGiuseppe Coviello #size-cells = <1>; 93b6014e15SGiuseppe Coviello ranges; 94b6014e15SGiuseppe Coviello clock-frequency = <0>; /* Filled in by zImage */ 95b6014e15SGiuseppe Coviello 96b6014e15SGiuseppe Coviello SDRAM0: sdram { 97b6014e15SGiuseppe Coviello compatible = "ibm,sdram-440ep", "ibm,sdram-405gp"; 98d2146cb2SGiuseppe Coviello dcr-reg = <0x010 2>; 99b6014e15SGiuseppe Coviello }; 100b6014e15SGiuseppe Coviello 101b6014e15SGiuseppe Coviello DMA0: dma { 102b6014e15SGiuseppe Coviello compatible = "ibm,dma-440ep", "ibm,dma-440gp"; 103d2146cb2SGiuseppe Coviello dcr-reg = <0x100 0x027>; 104b6014e15SGiuseppe Coviello }; 105b6014e15SGiuseppe Coviello 106b6014e15SGiuseppe Coviello MAL0: mcmal { 107b6014e15SGiuseppe Coviello compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal"; 108d2146cb2SGiuseppe Coviello dcr-reg = <0x180 0x062>; 109b6014e15SGiuseppe Coviello num-tx-chans = <4>; 110b6014e15SGiuseppe Coviello num-rx-chans = <2>; 111b6014e15SGiuseppe Coviello interrupt-parent = <&MAL0>; 112b6014e15SGiuseppe Coviello interrupts = <0 1 2 3 4>; 113b6014e15SGiuseppe Coviello #interrupt-cells = <1>; 114b6014e15SGiuseppe Coviello #address-cells = <0>; 115b6014e15SGiuseppe Coviello #size-cells = <0>; 116d2146cb2SGiuseppe Coviello interrupt-map = </*TXEOB*/ 0 &UIC0 10 4 117d2146cb2SGiuseppe Coviello /*RXEOB*/ 1 &UIC0 11 4 118b6014e15SGiuseppe Coviello /*SERR*/ 2 &UIC1 0 4 119b6014e15SGiuseppe Coviello /*TXDE*/ 3 &UIC1 1 4 120b6014e15SGiuseppe Coviello /*RXDE*/ 4 &UIC1 2 4>; 121b6014e15SGiuseppe Coviello }; 122b6014e15SGiuseppe Coviello 123b6014e15SGiuseppe Coviello POB0: opb { 124b6014e15SGiuseppe Coviello compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb"; 125b6014e15SGiuseppe Coviello #address-cells = <1>; 126b6014e15SGiuseppe Coviello #size-cells = <1>; 127b6014e15SGiuseppe Coviello /* Bamboo is oddball in the 44x world and doesn't use the ERPN 128b6014e15SGiuseppe Coviello * bits. 129b6014e15SGiuseppe Coviello */ 130d2146cb2SGiuseppe Coviello ranges = <0x00000000 0 0x00000000 0x80000000 131d2146cb2SGiuseppe Coviello 0x80000000 0 0x80000000 0x80000000>; 132b6014e15SGiuseppe Coviello interrupt-parent = <&UIC1>; 133b6014e15SGiuseppe Coviello interrupts = <7 4>; 134b6014e15SGiuseppe Coviello clock-frequency = <0>; /* Filled in by zImage */ 135b6014e15SGiuseppe Coviello 136b6014e15SGiuseppe Coviello EBC0: ebc { 137b6014e15SGiuseppe Coviello compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc"; 138d2146cb2SGiuseppe Coviello dcr-reg = <0x012 2>; 139b6014e15SGiuseppe Coviello #address-cells = <2>; 140b6014e15SGiuseppe Coviello #size-cells = <1>; 141b6014e15SGiuseppe Coviello clock-frequency = <0>; /* Filled in by zImage */ 142b6014e15SGiuseppe Coviello interrupts = <5 1>; 143b6014e15SGiuseppe Coviello interrupt-parent = <&UIC1>; 144b6014e15SGiuseppe Coviello }; 145b6014e15SGiuseppe Coviello 146b6014e15SGiuseppe Coviello UART0: serial@ef600300 { 147b6014e15SGiuseppe Coviello device_type = "serial"; 148b6014e15SGiuseppe Coviello compatible = "ns16550"; 149d2146cb2SGiuseppe Coviello reg = <0xef600300 8>; 150d2146cb2SGiuseppe Coviello virtual-reg = <0xef600300>; 151b6014e15SGiuseppe Coviello clock-frequency = <0>; /* Filled in by zImage */ 152d2146cb2SGiuseppe Coviello current-speed = <0x1c200>; 153b6014e15SGiuseppe Coviello interrupt-parent = <&UIC0>; 154b6014e15SGiuseppe Coviello interrupts = <0 4>; 155b6014e15SGiuseppe Coviello }; 156b6014e15SGiuseppe Coviello 157b6014e15SGiuseppe Coviello UART1: serial@ef600400 { 158b6014e15SGiuseppe Coviello device_type = "serial"; 159b6014e15SGiuseppe Coviello compatible = "ns16550"; 160d2146cb2SGiuseppe Coviello reg = <0xef600400 8>; 161d2146cb2SGiuseppe Coviello virtual-reg = <0xef600400>; 162b6014e15SGiuseppe Coviello clock-frequency = <0>; 163b6014e15SGiuseppe Coviello current-speed = <0>; 164b6014e15SGiuseppe Coviello interrupt-parent = <&UIC0>; 165b6014e15SGiuseppe Coviello interrupts = <1 4>; 166b6014e15SGiuseppe Coviello }; 167b6014e15SGiuseppe Coviello 168b6014e15SGiuseppe Coviello UART2: serial@ef600500 { 169b6014e15SGiuseppe Coviello device_type = "serial"; 170b6014e15SGiuseppe Coviello compatible = "ns16550"; 171d2146cb2SGiuseppe Coviello reg = <0xef600500 8>; 172d2146cb2SGiuseppe Coviello virtual-reg = <0xef600500>; 173b6014e15SGiuseppe Coviello clock-frequency = <0>; 174b6014e15SGiuseppe Coviello current-speed = <0>; 175b6014e15SGiuseppe Coviello interrupt-parent = <&UIC0>; 176b6014e15SGiuseppe Coviello interrupts = <3 4>; 177b6014e15SGiuseppe Coviello }; 178b6014e15SGiuseppe Coviello 179b6014e15SGiuseppe Coviello UART3: serial@ef600600 { 180b6014e15SGiuseppe Coviello device_type = "serial"; 181b6014e15SGiuseppe Coviello compatible = "ns16550"; 182d2146cb2SGiuseppe Coviello reg = <0xef600600 8>; 183d2146cb2SGiuseppe Coviello virtual-reg = <0xef600600>; 184b6014e15SGiuseppe Coviello clock-frequency = <0>; 185b6014e15SGiuseppe Coviello current-speed = <0>; 186b6014e15SGiuseppe Coviello interrupt-parent = <&UIC0>; 187b6014e15SGiuseppe Coviello interrupts = <4 4>; 188b6014e15SGiuseppe Coviello }; 189b6014e15SGiuseppe Coviello 190b6014e15SGiuseppe Coviello IIC0: i2c@ef600700 { 191b6014e15SGiuseppe Coviello #address-cells = <1>; 192b6014e15SGiuseppe Coviello #size-cells = <0>; 193b6014e15SGiuseppe Coviello compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; 194b6014e15SGiuseppe Coviello index = <0>; 195d2146cb2SGiuseppe Coviello reg = <0xef600700 0x14>; 196b6014e15SGiuseppe Coviello interrupt-parent = <&UIC0>; 197b6014e15SGiuseppe Coviello interrupts = <2 4>; 198b6014e15SGiuseppe Coviello rtc@68 { 1995edc2aaeSStefan Agner compatible = "st,m41t80"; 200d2146cb2SGiuseppe Coviello reg = <0x68>; 201b6014e15SGiuseppe Coviello }; 202b6014e15SGiuseppe Coviello }; 203b6014e15SGiuseppe Coviello 204b6014e15SGiuseppe Coviello IIC1: i2c@ef600800 { 205b6014e15SGiuseppe Coviello compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; 206b6014e15SGiuseppe Coviello index = <5>; 207d2146cb2SGiuseppe Coviello reg = <0xef600800 0x14>; 208b6014e15SGiuseppe Coviello interrupt-parent = <&UIC0>; 209b6014e15SGiuseppe Coviello interrupts = <7 4>; 210b6014e15SGiuseppe Coviello }; 211b6014e15SGiuseppe Coviello 212b6014e15SGiuseppe Coviello ZMII0: emac-zmii@ef600d00 { 213b6014e15SGiuseppe Coviello compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii"; 214d2146cb2SGiuseppe Coviello reg = <0xef600d00 0xc>; 215b6014e15SGiuseppe Coviello }; 216b6014e15SGiuseppe Coviello 217b6014e15SGiuseppe Coviello EMAC0: ethernet@ef600e00 { 218b6014e15SGiuseppe Coviello linux,network-index = <0>; 219b6014e15SGiuseppe Coviello device_type = "network"; 220b6014e15SGiuseppe Coviello compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; 221b6014e15SGiuseppe Coviello interrupt-parent = <&UIC1>; 222d2146cb2SGiuseppe Coviello interrupts = <0x1c 4 0x1d 4>; 223d2146cb2SGiuseppe Coviello reg = <0xef600e00 0x70>; 224b6014e15SGiuseppe Coviello local-mac-address = [000000000000]; 225b6014e15SGiuseppe Coviello mal-device = <&MAL0>; 226b6014e15SGiuseppe Coviello mal-tx-channel = <0 1>; 227b6014e15SGiuseppe Coviello mal-rx-channel = <0>; 228b6014e15SGiuseppe Coviello cell-index = <0>; 229d2146cb2SGiuseppe Coviello max-frame-size = <0x5dc>; 230d2146cb2SGiuseppe Coviello rx-fifo-size = <0x1000>; 231d2146cb2SGiuseppe Coviello tx-fifo-size = <0x800>; 232b6014e15SGiuseppe Coviello phy-mode = "rmii"; 233b6014e15SGiuseppe Coviello phy-map = <00000000>; 234b6014e15SGiuseppe Coviello zmii-device = <&ZMII0>; 235b6014e15SGiuseppe Coviello zmii-channel = <0>; 236b6014e15SGiuseppe Coviello }; 237b6014e15SGiuseppe Coviello 238b6014e15SGiuseppe Coviello EMAC1: ethernet@ef600f00 { 239b6014e15SGiuseppe Coviello linux,network-index = <1>; 240b6014e15SGiuseppe Coviello device_type = "network"; 241b6014e15SGiuseppe Coviello compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; 242b6014e15SGiuseppe Coviello interrupt-parent = <&UIC1>; 243d2146cb2SGiuseppe Coviello interrupts = <0x1e 4 0x1f 4>; 244d2146cb2SGiuseppe Coviello reg = <0xef600f00 0x70>; 245b6014e15SGiuseppe Coviello local-mac-address = [000000000000]; 246b6014e15SGiuseppe Coviello mal-device = <&MAL0>; 247b6014e15SGiuseppe Coviello mal-tx-channel = <2 3>; 248b6014e15SGiuseppe Coviello mal-rx-channel = <1>; 249b6014e15SGiuseppe Coviello cell-index = <1>; 250d2146cb2SGiuseppe Coviello max-frame-size = <0x5dc>; 251d2146cb2SGiuseppe Coviello rx-fifo-size = <0x1000>; 252d2146cb2SGiuseppe Coviello tx-fifo-size = <0x800>; 253b6014e15SGiuseppe Coviello phy-mode = "rmii"; 254b6014e15SGiuseppe Coviello phy-map = <00000000>; 255b6014e15SGiuseppe Coviello zmii-device = <&ZMII0>; 256b6014e15SGiuseppe Coviello zmii-channel = <1>; 257b6014e15SGiuseppe Coviello }; 258b6014e15SGiuseppe Coviello usb@ef601000 { 259b6014e15SGiuseppe Coviello compatible = "ohci-be"; 260d2146cb2SGiuseppe Coviello reg = <0xef601000 0x80>; 261b6014e15SGiuseppe Coviello interrupts = <8 4 9 4>; 262b6014e15SGiuseppe Coviello interrupt-parent = <&UIC1>; 263b6014e15SGiuseppe Coviello }; 264b6014e15SGiuseppe Coviello }; 265b6014e15SGiuseppe Coviello 266b6014e15SGiuseppe Coviello PCI0: pci@ec000000 { 267b6014e15SGiuseppe Coviello device_type = "pci"; 268b6014e15SGiuseppe Coviello #interrupt-cells = <1>; 269b6014e15SGiuseppe Coviello #size-cells = <2>; 270b6014e15SGiuseppe Coviello #address-cells = <3>; 271b6014e15SGiuseppe Coviello compatible = "ibm,plb440ep-pci", "ibm,plb-pci"; 272b6014e15SGiuseppe Coviello primary; 273d2146cb2SGiuseppe Coviello reg = <0 0xeec00000 8 /* Config space access */ 274d2146cb2SGiuseppe Coviello 0 0xeed00000 4 /* IACK */ 275d2146cb2SGiuseppe Coviello 0 0xeed00000 4 /* Special cycle */ 276d2146cb2SGiuseppe Coviello 0 0xef400000 0x40>; /* Internal registers */ 277b6014e15SGiuseppe Coviello 278b6014e15SGiuseppe Coviello /* Outbound ranges, one memory and one IO, 279b6014e15SGiuseppe Coviello * later cannot be changed. Chip supports a second 280b6014e15SGiuseppe Coviello * IO range but we don't use it for now 281b6014e15SGiuseppe Coviello */ 282d2146cb2SGiuseppe Coviello ranges = <0x02000000 0 0xa0000000 0 0xa0000000 0 0x20000000 283d2146cb2SGiuseppe Coviello 0x01000000 0 0x00000000 0 0xe8000000 0 0x00010000>; 284b6014e15SGiuseppe Coviello 285b6014e15SGiuseppe Coviello /* Inbound 2GB range starting at 0 */ 286d2146cb2SGiuseppe Coviello dma-ranges = <0x42000000 0 0 0 0 0 0x80000000>; 287b6014e15SGiuseppe Coviello }; 288b6014e15SGiuseppe Coviello }; 289b6014e15SGiuseppe Coviello 290b6014e15SGiuseppe Coviello chosen { 291*78e5dfeaSRob Herring stdout-path = "/plb/opb/serial@ef600300"; 292b6014e15SGiuseppe Coviello }; 293b6014e15SGiuseppe Coviello}; 294