1*23dd1cbfSKim Phillips/* 2*23dd1cbfSKim Phillips * MPC8378E RDB Device Tree Source 3*23dd1cbfSKim Phillips * 4*23dd1cbfSKim Phillips * Copyright 2007, 2008 Freescale Semiconductor Inc. 5*23dd1cbfSKim Phillips * 6*23dd1cbfSKim Phillips * This program is free software; you can redistribute it and/or modify it 7*23dd1cbfSKim Phillips * under the terms of the GNU General Public License as published by the 8*23dd1cbfSKim Phillips * Free Software Foundation; either version 2 of the License, or (at your 9*23dd1cbfSKim Phillips * option) any later version. 10*23dd1cbfSKim Phillips */ 11*23dd1cbfSKim Phillips 12*23dd1cbfSKim Phillips/dts-v1/; 13*23dd1cbfSKim Phillips 14*23dd1cbfSKim Phillips/ { 15*23dd1cbfSKim Phillips compatible = "fsl,mpc8378erdb"; 16*23dd1cbfSKim Phillips #address-cells = <1>; 17*23dd1cbfSKim Phillips #size-cells = <1>; 18*23dd1cbfSKim Phillips 19*23dd1cbfSKim Phillips aliases { 20*23dd1cbfSKim Phillips ethernet0 = &enet0; 21*23dd1cbfSKim Phillips ethernet1 = &enet1; 22*23dd1cbfSKim Phillips serial0 = &serial0; 23*23dd1cbfSKim Phillips serial1 = &serial1; 24*23dd1cbfSKim Phillips pci0 = &pci0; 25*23dd1cbfSKim Phillips }; 26*23dd1cbfSKim Phillips 27*23dd1cbfSKim Phillips cpus { 28*23dd1cbfSKim Phillips #address-cells = <1>; 29*23dd1cbfSKim Phillips #size-cells = <0>; 30*23dd1cbfSKim Phillips 31*23dd1cbfSKim Phillips PowerPC,8378@0 { 32*23dd1cbfSKim Phillips device_type = "cpu"; 33*23dd1cbfSKim Phillips reg = <0>; 34*23dd1cbfSKim Phillips d-cache-line-size = <32>; 35*23dd1cbfSKim Phillips i-cache-line-size = <32>; 36*23dd1cbfSKim Phillips d-cache-size = <32768>; 37*23dd1cbfSKim Phillips i-cache-size = <32768>; 38*23dd1cbfSKim Phillips timebase-frequency = <0>; 39*23dd1cbfSKim Phillips bus-frequency = <0>; 40*23dd1cbfSKim Phillips clock-frequency = <0>; 41*23dd1cbfSKim Phillips }; 42*23dd1cbfSKim Phillips }; 43*23dd1cbfSKim Phillips 44*23dd1cbfSKim Phillips memory { 45*23dd1cbfSKim Phillips device_type = "memory"; 46*23dd1cbfSKim Phillips reg = <0x00000000 0x10000000>; // 256MB at 0 47*23dd1cbfSKim Phillips }; 48*23dd1cbfSKim Phillips 49*23dd1cbfSKim Phillips localbus@e0005000 { 50*23dd1cbfSKim Phillips #address-cells = <2>; 51*23dd1cbfSKim Phillips #size-cells = <1>; 52*23dd1cbfSKim Phillips compatible = "fsl,mpc8378-elbc", "fsl,elbc", "simple-bus"; 53*23dd1cbfSKim Phillips reg = <0xe0005000 0x1000>; 54*23dd1cbfSKim Phillips interrupts = <77 8>; 55*23dd1cbfSKim Phillips interrupt-parent = <&ipic>; 56*23dd1cbfSKim Phillips 57*23dd1cbfSKim Phillips // CS0 and CS1 are swapped when 58*23dd1cbfSKim Phillips // booting from nand, but the 59*23dd1cbfSKim Phillips // addresses are the same. 60*23dd1cbfSKim Phillips ranges = <0 0 0xfe000000 0x00800000 61*23dd1cbfSKim Phillips 1 0 0xe0600000 0x00008000 62*23dd1cbfSKim Phillips 2 0 0xf0000000 0x00020000 63*23dd1cbfSKim Phillips 3 0 0xfa000000 0x00008000>; 64*23dd1cbfSKim Phillips 65*23dd1cbfSKim Phillips flash@0,0 { 66*23dd1cbfSKim Phillips #address-cells = <1>; 67*23dd1cbfSKim Phillips #size-cells = <1>; 68*23dd1cbfSKim Phillips compatible = "cfi-flash"; 69*23dd1cbfSKim Phillips reg = <0 0 0x800000>; 70*23dd1cbfSKim Phillips bank-width = <2>; 71*23dd1cbfSKim Phillips device-width = <1>; 72*23dd1cbfSKim Phillips }; 73*23dd1cbfSKim Phillips 74*23dd1cbfSKim Phillips nand@1,0 { 75*23dd1cbfSKim Phillips #address-cells = <1>; 76*23dd1cbfSKim Phillips #size-cells = <1>; 77*23dd1cbfSKim Phillips compatible = "fsl,mpc8378-fcm-nand", 78*23dd1cbfSKim Phillips "fsl,elbc-fcm-nand"; 79*23dd1cbfSKim Phillips reg = <1 0 0x8000>; 80*23dd1cbfSKim Phillips 81*23dd1cbfSKim Phillips u-boot@0 { 82*23dd1cbfSKim Phillips reg = <0x0 0x100000>; 83*23dd1cbfSKim Phillips read-only; 84*23dd1cbfSKim Phillips }; 85*23dd1cbfSKim Phillips 86*23dd1cbfSKim Phillips kernel@100000 { 87*23dd1cbfSKim Phillips reg = <0x100000 0x300000>; 88*23dd1cbfSKim Phillips }; 89*23dd1cbfSKim Phillips fs@400000 { 90*23dd1cbfSKim Phillips reg = <0x400000 0x1c00000>; 91*23dd1cbfSKim Phillips }; 92*23dd1cbfSKim Phillips }; 93*23dd1cbfSKim Phillips }; 94*23dd1cbfSKim Phillips 95*23dd1cbfSKim Phillips immr@e0000000 { 96*23dd1cbfSKim Phillips #address-cells = <1>; 97*23dd1cbfSKim Phillips #size-cells = <1>; 98*23dd1cbfSKim Phillips device_type = "soc"; 99*23dd1cbfSKim Phillips compatible = "simple-bus"; 100*23dd1cbfSKim Phillips ranges = <0 0xe0000000 0x00100000>; 101*23dd1cbfSKim Phillips reg = <0xe0000000 0x00000200>; 102*23dd1cbfSKim Phillips bus-frequency = <0>; 103*23dd1cbfSKim Phillips 104*23dd1cbfSKim Phillips wdt@200 { 105*23dd1cbfSKim Phillips device_type = "watchdog"; 106*23dd1cbfSKim Phillips compatible = "mpc83xx_wdt"; 107*23dd1cbfSKim Phillips reg = <0x200 0x100>; 108*23dd1cbfSKim Phillips }; 109*23dd1cbfSKim Phillips 110*23dd1cbfSKim Phillips i2c@3000 { 111*23dd1cbfSKim Phillips #address-cells = <1>; 112*23dd1cbfSKim Phillips #size-cells = <0>; 113*23dd1cbfSKim Phillips cell-index = <0>; 114*23dd1cbfSKim Phillips compatible = "fsl-i2c"; 115*23dd1cbfSKim Phillips reg = <0x3000 0x100>; 116*23dd1cbfSKim Phillips interrupts = <14 8>; 117*23dd1cbfSKim Phillips interrupt-parent = < &ipic >; 118*23dd1cbfSKim Phillips dfsrr; 119*23dd1cbfSKim Phillips rtc@68 { 120*23dd1cbfSKim Phillips device_type = "rtc"; 121*23dd1cbfSKim Phillips compatible = "dallas,ds1339"; 122*23dd1cbfSKim Phillips reg = <0x68>; 123*23dd1cbfSKim Phillips }; 124*23dd1cbfSKim Phillips }; 125*23dd1cbfSKim Phillips 126*23dd1cbfSKim Phillips i2c@3100 { 127*23dd1cbfSKim Phillips #address-cells = <1>; 128*23dd1cbfSKim Phillips #size-cells = <0>; 129*23dd1cbfSKim Phillips cell-index = <1>; 130*23dd1cbfSKim Phillips compatible = "fsl-i2c"; 131*23dd1cbfSKim Phillips reg = <0x3100 0x100>; 132*23dd1cbfSKim Phillips interrupts = <15 8>; 133*23dd1cbfSKim Phillips interrupt-parent = < &ipic >; 134*23dd1cbfSKim Phillips dfsrr; 135*23dd1cbfSKim Phillips }; 136*23dd1cbfSKim Phillips 137*23dd1cbfSKim Phillips spi@7000 { 138*23dd1cbfSKim Phillips cell-index = <0>; 139*23dd1cbfSKim Phillips compatible = "fsl,spi"; 140*23dd1cbfSKim Phillips reg = <0x7000 0x1000>; 141*23dd1cbfSKim Phillips interrupts = <16 8>; 142*23dd1cbfSKim Phillips interrupt-parent = < &ipic >; 143*23dd1cbfSKim Phillips mode = "cpu"; 144*23dd1cbfSKim Phillips }; 145*23dd1cbfSKim Phillips 146*23dd1cbfSKim Phillips /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ 147*23dd1cbfSKim Phillips usb@23000 { 148*23dd1cbfSKim Phillips compatible = "fsl-usb2-dr"; 149*23dd1cbfSKim Phillips reg = <0x23000 0x1000>; 150*23dd1cbfSKim Phillips #address-cells = <1>; 151*23dd1cbfSKim Phillips #size-cells = <0>; 152*23dd1cbfSKim Phillips interrupt-parent = < &ipic >; 153*23dd1cbfSKim Phillips interrupts = <38 8>; 154*23dd1cbfSKim Phillips phy_type = "utmi"; 155*23dd1cbfSKim Phillips }; 156*23dd1cbfSKim Phillips 157*23dd1cbfSKim Phillips mdio@24520 { 158*23dd1cbfSKim Phillips #address-cells = <1>; 159*23dd1cbfSKim Phillips #size-cells = <0>; 160*23dd1cbfSKim Phillips compatible = "fsl,gianfar-mdio"; 161*23dd1cbfSKim Phillips reg = <0x24520 0x20>; 162*23dd1cbfSKim Phillips phy2: ethernet-phy@2 { 163*23dd1cbfSKim Phillips interrupt-parent = < &ipic >; 164*23dd1cbfSKim Phillips interrupts = <17 8>; 165*23dd1cbfSKim Phillips reg = <2>; 166*23dd1cbfSKim Phillips device_type = "ethernet-phy"; 167*23dd1cbfSKim Phillips }; 168*23dd1cbfSKim Phillips phy3: ethernet-phy@3 { 169*23dd1cbfSKim Phillips interrupt-parent = < &ipic >; 170*23dd1cbfSKim Phillips interrupts = <18 8>; 171*23dd1cbfSKim Phillips reg = <3>; 172*23dd1cbfSKim Phillips device_type = "ethernet-phy"; 173*23dd1cbfSKim Phillips }; 174*23dd1cbfSKim Phillips }; 175*23dd1cbfSKim Phillips 176*23dd1cbfSKim Phillips enet0: ethernet@24000 { 177*23dd1cbfSKim Phillips cell-index = <0>; 178*23dd1cbfSKim Phillips device_type = "network"; 179*23dd1cbfSKim Phillips model = "eTSEC"; 180*23dd1cbfSKim Phillips compatible = "gianfar"; 181*23dd1cbfSKim Phillips reg = <0x24000 0x1000>; 182*23dd1cbfSKim Phillips local-mac-address = [ 00 00 00 00 00 00 ]; 183*23dd1cbfSKim Phillips interrupts = <32 8 33 8 34 8>; 184*23dd1cbfSKim Phillips phy-connection-type = "mii"; 185*23dd1cbfSKim Phillips interrupt-parent = < &ipic >; 186*23dd1cbfSKim Phillips phy-handle = < &phy2 >; 187*23dd1cbfSKim Phillips }; 188*23dd1cbfSKim Phillips 189*23dd1cbfSKim Phillips enet1: ethernet@25000 { 190*23dd1cbfSKim Phillips cell-index = <1>; 191*23dd1cbfSKim Phillips device_type = "network"; 192*23dd1cbfSKim Phillips model = "eTSEC"; 193*23dd1cbfSKim Phillips compatible = "gianfar"; 194*23dd1cbfSKim Phillips reg = <0x25000 0x1000>; 195*23dd1cbfSKim Phillips local-mac-address = [ 00 00 00 00 00 00 ]; 196*23dd1cbfSKim Phillips interrupts = <35 8 36 8 37 8>; 197*23dd1cbfSKim Phillips phy-connection-type = "mii"; 198*23dd1cbfSKim Phillips interrupt-parent = < &ipic >; 199*23dd1cbfSKim Phillips phy-handle = < &phy3 >; 200*23dd1cbfSKim Phillips }; 201*23dd1cbfSKim Phillips 202*23dd1cbfSKim Phillips serial0: serial@4500 { 203*23dd1cbfSKim Phillips cell-index = <0>; 204*23dd1cbfSKim Phillips device_type = "serial"; 205*23dd1cbfSKim Phillips compatible = "ns16550"; 206*23dd1cbfSKim Phillips reg = <0x4500 0x100>; 207*23dd1cbfSKim Phillips clock-frequency = <0>; 208*23dd1cbfSKim Phillips interrupts = <9 8>; 209*23dd1cbfSKim Phillips interrupt-parent = < &ipic >; 210*23dd1cbfSKim Phillips }; 211*23dd1cbfSKim Phillips 212*23dd1cbfSKim Phillips serial1: serial@4600 { 213*23dd1cbfSKim Phillips cell-index = <1>; 214*23dd1cbfSKim Phillips device_type = "serial"; 215*23dd1cbfSKim Phillips compatible = "ns16550"; 216*23dd1cbfSKim Phillips reg = <0x4600 0x100>; 217*23dd1cbfSKim Phillips clock-frequency = <0>; 218*23dd1cbfSKim Phillips interrupts = <10 8>; 219*23dd1cbfSKim Phillips interrupt-parent = < &ipic >; 220*23dd1cbfSKim Phillips }; 221*23dd1cbfSKim Phillips 222*23dd1cbfSKim Phillips crypto@30000 { 223*23dd1cbfSKim Phillips model = "SEC3"; 224*23dd1cbfSKim Phillips device_type = "crypto"; 225*23dd1cbfSKim Phillips compatible = "talitos"; 226*23dd1cbfSKim Phillips reg = <0x30000 0x10000>; 227*23dd1cbfSKim Phillips interrupts = <11 8>; 228*23dd1cbfSKim Phillips interrupt-parent = < &ipic >; 229*23dd1cbfSKim Phillips /* Rev. 3.0 geometry */ 230*23dd1cbfSKim Phillips num-channels = <4>; 231*23dd1cbfSKim Phillips channel-fifo-len = <24>; 232*23dd1cbfSKim Phillips exec-units-mask = <0x000001fe>; 233*23dd1cbfSKim Phillips descriptor-types-mask = <0x03ab0ebf>; 234*23dd1cbfSKim Phillips }; 235*23dd1cbfSKim Phillips 236*23dd1cbfSKim Phillips /* IPIC 237*23dd1cbfSKim Phillips * interrupts cell = <intr #, sense> 238*23dd1cbfSKim Phillips * sense values match linux IORESOURCE_IRQ_* defines: 239*23dd1cbfSKim Phillips * sense == 8: Level, low assertion 240*23dd1cbfSKim Phillips * sense == 2: Edge, high-to-low change 241*23dd1cbfSKim Phillips */ 242*23dd1cbfSKim Phillips ipic: interrupt-controller@700 { 243*23dd1cbfSKim Phillips compatible = "fsl,ipic"; 244*23dd1cbfSKim Phillips interrupt-controller; 245*23dd1cbfSKim Phillips #address-cells = <0>; 246*23dd1cbfSKim Phillips #interrupt-cells = <2>; 247*23dd1cbfSKim Phillips reg = <0x700 0x100>; 248*23dd1cbfSKim Phillips }; 249*23dd1cbfSKim Phillips }; 250*23dd1cbfSKim Phillips 251*23dd1cbfSKim Phillips pci0: pci@e0008500 { 252*23dd1cbfSKim Phillips interrupt-map-mask = <0xf800 0 0 7>; 253*23dd1cbfSKim Phillips interrupt-map = < 254*23dd1cbfSKim Phillips /* IRQ5 = 21 = 0x15, IRQ6 = 0x16, IRQ7 = 23 = 0x17 */ 255*23dd1cbfSKim Phillips 256*23dd1cbfSKim Phillips /* IDSEL AD14 IRQ6 inta */ 257*23dd1cbfSKim Phillips 0x7000 0 0 1 &ipic 22 8 258*23dd1cbfSKim Phillips 259*23dd1cbfSKim Phillips /* IDSEL AD15 IRQ5 inta, IRQ6 intb, IRQ7 intd */ 260*23dd1cbfSKim Phillips 0x7800 0 0 1 &ipic 21 8 261*23dd1cbfSKim Phillips 0x7800 0 0 2 &ipic 22 8 262*23dd1cbfSKim Phillips 0x7800 0 0 4 &ipic 23 8 263*23dd1cbfSKim Phillips 264*23dd1cbfSKim Phillips /* IDSEL AD28 IRQ7 inta, IRQ5 intb IRQ6 intc*/ 265*23dd1cbfSKim Phillips 0xE000 0 0 1 &ipic 23 8 266*23dd1cbfSKim Phillips 0xE000 0 0 2 &ipic 21 8 267*23dd1cbfSKim Phillips 0xE000 0 0 3 &ipic 22 8>; 268*23dd1cbfSKim Phillips interrupt-parent = < &ipic >; 269*23dd1cbfSKim Phillips interrupts = <66 8>; 270*23dd1cbfSKim Phillips bus-range = <0 0>; 271*23dd1cbfSKim Phillips ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000 272*23dd1cbfSKim Phillips 0x42000000 0 0x80000000 0x80000000 0 0x10000000 273*23dd1cbfSKim Phillips 0x01000000 0 0x00000000 0xe2000000 0 0x00100000>; 274*23dd1cbfSKim Phillips clock-frequency = <66666666>; 275*23dd1cbfSKim Phillips #interrupt-cells = <1>; 276*23dd1cbfSKim Phillips #size-cells = <2>; 277*23dd1cbfSKim Phillips #address-cells = <3>; 278*23dd1cbfSKim Phillips reg = <0xe0008500 0x100>; 279*23dd1cbfSKim Phillips compatible = "fsl,mpc8349-pci"; 280*23dd1cbfSKim Phillips device_type = "pci"; 281*23dd1cbfSKim Phillips }; 282*23dd1cbfSKim Phillips}; 283