1/* 2 * MPC8313E RDB Device Tree Source 3 * 4 * Copyright 2005, 2006, 2007 Freescale Semiconductor Inc. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License as published by the 8 * Free Software Foundation; either version 2 of the License, or (at your 9 * option) any later version. 10 */ 11 12/dts-v1/; 13 14/ { 15 model = "MPC8313ERDB"; 16 compatible = "MPC8313ERDB", "MPC831xRDB", "MPC83xxRDB"; 17 #address-cells = <1>; 18 #size-cells = <1>; 19 20 aliases { 21 ethernet0 = &enet0; 22 ethernet1 = &enet1; 23 serial0 = &serial0; 24 serial1 = &serial1; 25 pci0 = &pci0; 26 }; 27 28 cpus { 29 #address-cells = <1>; 30 #size-cells = <0>; 31 32 PowerPC,8313@0 { 33 device_type = "cpu"; 34 reg = <0x0>; 35 d-cache-line-size = <32>; 36 i-cache-line-size = <32>; 37 d-cache-size = <16384>; 38 i-cache-size = <16384>; 39 timebase-frequency = <0>; // from bootloader 40 bus-frequency = <0>; // from bootloader 41 clock-frequency = <0>; // from bootloader 42 }; 43 }; 44 45 memory { 46 device_type = "memory"; 47 reg = <0x00000000 0x08000000>; // 128MB at 0 48 }; 49 50 localbus@e0005000 { 51 #address-cells = <2>; 52 #size-cells = <1>; 53 compatible = "fsl,mpc8313-elbc", "fsl,elbc", "simple-bus"; 54 reg = <0xe0005000 0x1000>; 55 interrupts = <77 0x8>; 56 interrupt-parent = <&ipic>; 57 58 // CS0 and CS1 are swapped when 59 // booting from nand, but the 60 // addresses are the same. 61 ranges = <0x0 0x0 0xfe000000 0x00800000 62 0x1 0x0 0xe2800000 0x00008000 63 0x2 0x0 0xf0000000 0x00020000 64 0x3 0x0 0xfa000000 0x00008000>; 65 66 flash@0,0 { 67 #address-cells = <1>; 68 #size-cells = <1>; 69 compatible = "cfi-flash"; 70 reg = <0x0 0x0 0x800000>; 71 bank-width = <2>; 72 device-width = <1>; 73 }; 74 75 nand@1,0 { 76 #address-cells = <1>; 77 #size-cells = <1>; 78 compatible = "fsl,mpc8313-fcm-nand", 79 "fsl,elbc-fcm-nand"; 80 reg = <0x1 0x0 0x2000>; 81 82 u-boot@0 { 83 reg = <0x0 0x100000>; 84 read-only; 85 }; 86 87 kernel@100000 { 88 reg = <0x100000 0x300000>; 89 }; 90 91 fs@400000 { 92 reg = <0x400000 0x1c00000>; 93 }; 94 }; 95 }; 96 97 soc8313@e0000000 { 98 #address-cells = <1>; 99 #size-cells = <1>; 100 device_type = "soc"; 101 compatible = "simple-bus"; 102 ranges = <0x0 0xe0000000 0x00100000>; 103 reg = <0xe0000000 0x00000200>; 104 bus-frequency = <0>; 105 106 wdt@200 { 107 device_type = "watchdog"; 108 compatible = "mpc83xx_wdt"; 109 reg = <0x200 0x100>; 110 }; 111 112 i2c@3000 { 113 #address-cells = <1>; 114 #size-cells = <0>; 115 cell-index = <0>; 116 compatible = "fsl-i2c"; 117 reg = <0x3000 0x100>; 118 interrupts = <14 0x8>; 119 interrupt-parent = <&ipic>; 120 dfsrr; 121 }; 122 123 i2c@3100 { 124 #address-cells = <1>; 125 #size-cells = <0>; 126 cell-index = <1>; 127 compatible = "fsl-i2c"; 128 reg = <0x3100 0x100>; 129 interrupts = <15 0x8>; 130 interrupt-parent = <&ipic>; 131 dfsrr; 132 }; 133 134 spi@7000 { 135 cell-index = <0>; 136 compatible = "fsl,spi"; 137 reg = <0x7000 0x1000>; 138 interrupts = <16 0x8>; 139 interrupt-parent = <&ipic>; 140 mode = "cpu"; 141 }; 142 143 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ 144 usb@23000 { 145 compatible = "fsl-usb2-dr"; 146 reg = <0x23000 0x1000>; 147 #address-cells = <1>; 148 #size-cells = <0>; 149 interrupt-parent = <&ipic>; 150 interrupts = <38 0x8>; 151 phy_type = "utmi_wide"; 152 }; 153 154 mdio@24520 { 155 #address-cells = <1>; 156 #size-cells = <0>; 157 compatible = "fsl,gianfar-mdio"; 158 reg = <0x24520 0x20>; 159 phy1: ethernet-phy@1 { 160 interrupt-parent = <&ipic>; 161 interrupts = <19 0x8>; 162 reg = <0x1>; 163 device_type = "ethernet-phy"; 164 }; 165 phy4: ethernet-phy@4 { 166 interrupt-parent = <&ipic>; 167 interrupts = <20 0x8>; 168 reg = <0x4>; 169 device_type = "ethernet-phy"; 170 }; 171 }; 172 173 enet0: ethernet@24000 { 174 cell-index = <0>; 175 device_type = "network"; 176 model = "eTSEC"; 177 compatible = "gianfar"; 178 reg = <0x24000 0x1000>; 179 local-mac-address = [ 00 00 00 00 00 00 ]; 180 interrupts = <37 0x8 36 0x8 35 0x8>; 181 interrupt-parent = <&ipic>; 182 phy-handle = < &phy1 >; 183 }; 184 185 enet1: ethernet@25000 { 186 cell-index = <1>; 187 device_type = "network"; 188 model = "eTSEC"; 189 compatible = "gianfar"; 190 reg = <0x25000 0x1000>; 191 local-mac-address = [ 00 00 00 00 00 00 ]; 192 interrupts = <34 0x8 33 0x8 32 0x8>; 193 interrupt-parent = <&ipic>; 194 phy-handle = < &phy4 >; 195 }; 196 197 serial0: serial@4500 { 198 cell-index = <0>; 199 device_type = "serial"; 200 compatible = "ns16550"; 201 reg = <0x4500 0x100>; 202 clock-frequency = <0>; 203 interrupts = <9 0x8>; 204 interrupt-parent = <&ipic>; 205 }; 206 207 serial1: serial@4600 { 208 cell-index = <1>; 209 device_type = "serial"; 210 compatible = "ns16550"; 211 reg = <0x4600 0x100>; 212 clock-frequency = <0>; 213 interrupts = <10 0x8>; 214 interrupt-parent = <&ipic>; 215 }; 216 217 crypto@30000 { 218 device_type = "crypto"; 219 model = "SEC2"; 220 compatible = "talitos"; 221 reg = <0x30000 0x7000>; 222 interrupts = <11 0x8>; 223 interrupt-parent = <&ipic>; 224 /* Rev. 2.2 */ 225 num-channels = <1>; 226 channel-fifo-len = <24>; 227 exec-units-mask = <0x0000004c>; 228 descriptor-types-mask = <0x0122003f>; 229 }; 230 231 /* IPIC 232 * interrupts cell = <intr #, sense> 233 * sense values match linux IORESOURCE_IRQ_* defines: 234 * sense == 8: Level, low assertion 235 * sense == 2: Edge, high-to-low change 236 */ 237 ipic: pic@700 { 238 interrupt-controller; 239 #address-cells = <0>; 240 #interrupt-cells = <2>; 241 reg = <0x700 0x100>; 242 device_type = "ipic"; 243 }; 244 }; 245 246 pci0: pci@e0008500 { 247 cell-index = <1>; 248 interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 249 interrupt-map = < 250 251 /* IDSEL 0x0E -mini PCI */ 252 0x7000 0x0 0x0 0x1 &ipic 18 0x8 253 0x7000 0x0 0x0 0x2 &ipic 18 0x8 254 0x7000 0x0 0x0 0x3 &ipic 18 0x8 255 0x7000 0x0 0x0 0x4 &ipic 18 0x8 256 257 /* IDSEL 0x0F - PCI slot */ 258 0x7800 0x0 0x0 0x1 &ipic 17 0x8 259 0x7800 0x0 0x0 0x2 &ipic 18 0x8 260 0x7800 0x0 0x0 0x3 &ipic 17 0x8 261 0x7800 0x0 0x0 0x4 &ipic 18 0x8>; 262 interrupt-parent = <&ipic>; 263 interrupts = <66 0x8>; 264 bus-range = <0x0 0x0>; 265 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 266 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 267 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>; 268 clock-frequency = <66666666>; 269 #interrupt-cells = <1>; 270 #size-cells = <2>; 271 #address-cells = <3>; 272 reg = <0xe0008500 0x100>; 273 compatible = "fsl,mpc8349-pci"; 274 device_type = "pci"; 275 }; 276}; 277