1*6d854acdSMinghuan Lian/* 2*6d854acdSMinghuan Lian * QorIQ MPIC device tree stub [ controller @ offset 0x40000 ] 3*6d854acdSMinghuan Lian * 4*6d854acdSMinghuan Lian * Copyright 2013 Freescale Semiconductor Inc. 5*6d854acdSMinghuan Lian * 6*6d854acdSMinghuan Lian * Redistribution and use in source and binary forms, with or without 7*6d854acdSMinghuan Lian * modification, are permitted provided that the following conditions are met: 8*6d854acdSMinghuan Lian * * Redistributions of source code must retain the above copyright 9*6d854acdSMinghuan Lian * notice, this list of conditions and the following disclaimer. 10*6d854acdSMinghuan Lian * * Redistributions in binary form must reproduce the above copyright 11*6d854acdSMinghuan Lian * notice, this list of conditions and the following disclaimer in the 12*6d854acdSMinghuan Lian * documentation and/or other materials provided with the distribution. 13*6d854acdSMinghuan Lian * * Neither the name of Freescale Semiconductor nor the 14*6d854acdSMinghuan Lian * names of its contributors may be used to endorse or promote products 15*6d854acdSMinghuan Lian * derived from this software without specific prior written permission. 16*6d854acdSMinghuan Lian * 17*6d854acdSMinghuan Lian * 18*6d854acdSMinghuan Lian * ALTERNATIVELY, this software may be distributed under the terms of the 19*6d854acdSMinghuan Lian * GNU General Public License ("GPL") as published by the Free Software 20*6d854acdSMinghuan Lian * Foundation, either version 2 of that License or (at your option) any 21*6d854acdSMinghuan Lian * later version. 22*6d854acdSMinghuan Lian * 23*6d854acdSMinghuan Lian * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY 24*6d854acdSMinghuan Lian * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 25*6d854acdSMinghuan Lian * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 26*6d854acdSMinghuan Lian * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 27*6d854acdSMinghuan Lian * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28*6d854acdSMinghuan Lian * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 29*6d854acdSMinghuan Lian * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 30*6d854acdSMinghuan Lian * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31*6d854acdSMinghuan Lian * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 32*6d854acdSMinghuan Lian * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33*6d854acdSMinghuan Lian */ 34*6d854acdSMinghuan Lian 35*6d854acdSMinghuan Lianmpic: pic@40000 { 36*6d854acdSMinghuan Lian interrupt-controller; 37*6d854acdSMinghuan Lian #address-cells = <0>; 38*6d854acdSMinghuan Lian #interrupt-cells = <4>; 39*6d854acdSMinghuan Lian reg = <0x40000 0x40000>; 40*6d854acdSMinghuan Lian compatible = "fsl,mpic"; 41*6d854acdSMinghuan Lian device_type = "open-pic"; 42*6d854acdSMinghuan Lian clock-frequency = <0x0>; 43*6d854acdSMinghuan Lian}; 44*6d854acdSMinghuan Lian 45*6d854acdSMinghuan Liantimer@41100 { 46*6d854acdSMinghuan Lian compatible = "fsl,mpic-global-timer"; 47*6d854acdSMinghuan Lian reg = <0x41100 0x100 0x41300 4>; 48*6d854acdSMinghuan Lian interrupts = <0 0 3 0 49*6d854acdSMinghuan Lian 1 0 3 0 50*6d854acdSMinghuan Lian 2 0 3 0 51*6d854acdSMinghuan Lian 3 0 3 0>; 52*6d854acdSMinghuan Lian}; 53*6d854acdSMinghuan Lian 54*6d854acdSMinghuan Lianmsi0: msi@41600 { 55*6d854acdSMinghuan Lian compatible = "fsl,mpic-msi-v4.3"; 56*6d854acdSMinghuan Lian reg = <0x41600 0x200 0x44148 4>; 57*6d854acdSMinghuan Lian interrupts = < 58*6d854acdSMinghuan Lian 0xe0 0 0 0 59*6d854acdSMinghuan Lian 0xe1 0 0 0 60*6d854acdSMinghuan Lian 0xe2 0 0 0 61*6d854acdSMinghuan Lian 0xe3 0 0 0 62*6d854acdSMinghuan Lian 0xe4 0 0 0 63*6d854acdSMinghuan Lian 0xe5 0 0 0 64*6d854acdSMinghuan Lian 0xe6 0 0 0 65*6d854acdSMinghuan Lian 0xe7 0 0 0 66*6d854acdSMinghuan Lian 0x100 0 0 0 67*6d854acdSMinghuan Lian 0x101 0 0 0 68*6d854acdSMinghuan Lian 0x102 0 0 0 69*6d854acdSMinghuan Lian 0x103 0 0 0 70*6d854acdSMinghuan Lian 0x104 0 0 0 71*6d854acdSMinghuan Lian 0x105 0 0 0 72*6d854acdSMinghuan Lian 0x106 0 0 0 73*6d854acdSMinghuan Lian 0x107 0 0 0>; 74*6d854acdSMinghuan Lian}; 75*6d854acdSMinghuan Lian 76*6d854acdSMinghuan Lianmsi1: msi@41800 { 77*6d854acdSMinghuan Lian compatible = "fsl,mpic-msi-v4.3"; 78*6d854acdSMinghuan Lian reg = <0x41800 0x200 0x45148 4>; 79*6d854acdSMinghuan Lian interrupts = < 80*6d854acdSMinghuan Lian 0xe8 0 0 0 81*6d854acdSMinghuan Lian 0xe9 0 0 0 82*6d854acdSMinghuan Lian 0xea 0 0 0 83*6d854acdSMinghuan Lian 0xeb 0 0 0 84*6d854acdSMinghuan Lian 0xec 0 0 0 85*6d854acdSMinghuan Lian 0xed 0 0 0 86*6d854acdSMinghuan Lian 0xee 0 0 0 87*6d854acdSMinghuan Lian 0xef 0 0 0 88*6d854acdSMinghuan Lian 0x108 0 0 0 89*6d854acdSMinghuan Lian 0x109 0 0 0 90*6d854acdSMinghuan Lian 0x10a 0 0 0 91*6d854acdSMinghuan Lian 0x10b 0 0 0 92*6d854acdSMinghuan Lian 0x10c 0 0 0 93*6d854acdSMinghuan Lian 0x10d 0 0 0 94*6d854acdSMinghuan Lian 0x10e 0 0 0 95*6d854acdSMinghuan Lian 0x10f 0 0 0>; 96*6d854acdSMinghuan Lian}; 97*6d854acdSMinghuan Lian 98*6d854acdSMinghuan Lianmsi2: msi@41a00 { 99*6d854acdSMinghuan Lian compatible = "fsl,mpic-msi-v4.3"; 100*6d854acdSMinghuan Lian reg = <0x41a00 0x200 0x46148 4>; 101*6d854acdSMinghuan Lian interrupts = < 102*6d854acdSMinghuan Lian 0xf0 0 0 0 103*6d854acdSMinghuan Lian 0xf1 0 0 0 104*6d854acdSMinghuan Lian 0xf2 0 0 0 105*6d854acdSMinghuan Lian 0xf3 0 0 0 106*6d854acdSMinghuan Lian 0xf4 0 0 0 107*6d854acdSMinghuan Lian 0xf5 0 0 0 108*6d854acdSMinghuan Lian 0xf6 0 0 0 109*6d854acdSMinghuan Lian 0xf7 0 0 0 110*6d854acdSMinghuan Lian 0x110 0 0 0 111*6d854acdSMinghuan Lian 0x111 0 0 0 112*6d854acdSMinghuan Lian 0x112 0 0 0 113*6d854acdSMinghuan Lian 0x113 0 0 0 114*6d854acdSMinghuan Lian 0x114 0 0 0 115*6d854acdSMinghuan Lian 0x115 0 0 0 116*6d854acdSMinghuan Lian 0x116 0 0 0 117*6d854acdSMinghuan Lian 0x117 0 0 0>; 118*6d854acdSMinghuan Lian}; 119*6d854acdSMinghuan Lian 120*6d854acdSMinghuan Lianmsi3: msi@41c00 { 121*6d854acdSMinghuan Lian compatible = "fsl,mpic-msi-v4.3"; 122*6d854acdSMinghuan Lian reg = <0x41c00 0x200 0x47148 4>; 123*6d854acdSMinghuan Lian interrupts = < 124*6d854acdSMinghuan Lian 0xf8 0 0 0 125*6d854acdSMinghuan Lian 0xf9 0 0 0 126*6d854acdSMinghuan Lian 0xfa 0 0 0 127*6d854acdSMinghuan Lian 0xfb 0 0 0 128*6d854acdSMinghuan Lian 0xfc 0 0 0 129*6d854acdSMinghuan Lian 0xfd 0 0 0 130*6d854acdSMinghuan Lian 0xfe 0 0 0 131*6d854acdSMinghuan Lian 0xff 0 0 0 132*6d854acdSMinghuan Lian 0x118 0 0 0 133*6d854acdSMinghuan Lian 0x119 0 0 0 134*6d854acdSMinghuan Lian 0x11a 0 0 0 135*6d854acdSMinghuan Lian 0x11b 0 0 0 136*6d854acdSMinghuan Lian 0x11c 0 0 0 137*6d854acdSMinghuan Lian 0x11d 0 0 0 138*6d854acdSMinghuan Lian 0x11e 0 0 0 139*6d854acdSMinghuan Lian 0x11f 0 0 0>; 140*6d854acdSMinghuan Lian}; 141*6d854acdSMinghuan Lian 142*6d854acdSMinghuan Liantimer@42100 { 143*6d854acdSMinghuan Lian compatible = "fsl,mpic-global-timer"; 144*6d854acdSMinghuan Lian reg = <0x42100 0x100 0x42300 4>; 145*6d854acdSMinghuan Lian interrupts = <4 0 3 0 146*6d854acdSMinghuan Lian 5 0 3 0 147*6d854acdSMinghuan Lian 6 0 3 0 148*6d854acdSMinghuan Lian 7 0 3 0>; 149*6d854acdSMinghuan Lian}; 150