1*f4093e2eSShengzhou Liu/* 2*f4093e2eSShengzhou Liu * QorIQ Elo3 DMA device tree stub [ controller @ offset 0x102300 ] 3*f4093e2eSShengzhou Liu * 4*f4093e2eSShengzhou Liu * Copyright 2013 Freescale Semiconductor Inc. 5*f4093e2eSShengzhou Liu * 6*f4093e2eSShengzhou Liu * Redistribution and use in source and binary forms, with or without 7*f4093e2eSShengzhou Liu * modification, are permitted provided that the following conditions are met: 8*f4093e2eSShengzhou Liu * * Redistributions of source code must retain the above copyright 9*f4093e2eSShengzhou Liu * notice, this list of conditions and the following disclaimer. 10*f4093e2eSShengzhou Liu * * Redistributions in binary form must reproduce the above copyright 11*f4093e2eSShengzhou Liu * notice, this list of conditions and the following disclaimer in the 12*f4093e2eSShengzhou Liu * documentation and/or other materials provided with the distribution. 13*f4093e2eSShengzhou Liu * * Neither the name of Freescale Semiconductor nor the 14*f4093e2eSShengzhou Liu * names of its contributors may be used to endorse or promote products 15*f4093e2eSShengzhou Liu * derived from this software without specific prior written permission. 16*f4093e2eSShengzhou Liu * 17*f4093e2eSShengzhou Liu * 18*f4093e2eSShengzhou Liu * ALTERNATIVELY, this software may be distributed under the terms of the 19*f4093e2eSShengzhou Liu * GNU General Public License ("GPL") as published by the Free Software 20*f4093e2eSShengzhou Liu * Foundation, either version 2 of that License or (at your option) any 21*f4093e2eSShengzhou Liu * later version. 22*f4093e2eSShengzhou Liu * 23*f4093e2eSShengzhou Liu * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY 24*f4093e2eSShengzhou Liu * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 25*f4093e2eSShengzhou Liu * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 26*f4093e2eSShengzhou Liu * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 27*f4093e2eSShengzhou Liu * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28*f4093e2eSShengzhou Liu * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 29*f4093e2eSShengzhou Liu * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 30*f4093e2eSShengzhou Liu * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31*f4093e2eSShengzhou Liu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 32*f4093e2eSShengzhou Liu * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33*f4093e2eSShengzhou Liu */ 34*f4093e2eSShengzhou Liu 35*f4093e2eSShengzhou Liudma2: dma@102300 { 36*f4093e2eSShengzhou Liu #address-cells = <1>; 37*f4093e2eSShengzhou Liu #size-cells = <1>; 38*f4093e2eSShengzhou Liu compatible = "fsl,elo3-dma"; 39*f4093e2eSShengzhou Liu reg = <0x102300 0x4>, 40*f4093e2eSShengzhou Liu <0x102600 0x4>; 41*f4093e2eSShengzhou Liu ranges = <0x0 0x102100 0x500>; 42*f4093e2eSShengzhou Liu dma-channel@0 { 43*f4093e2eSShengzhou Liu compatible = "fsl,eloplus-dma-channel"; 44*f4093e2eSShengzhou Liu reg = <0x0 0x80>; 45*f4093e2eSShengzhou Liu interrupts = <464 2 0 0>; 46*f4093e2eSShengzhou Liu }; 47*f4093e2eSShengzhou Liu dma-channel@80 { 48*f4093e2eSShengzhou Liu compatible = "fsl,eloplus-dma-channel"; 49*f4093e2eSShengzhou Liu reg = <0x80 0x80>; 50*f4093e2eSShengzhou Liu interrupts = <465 2 0 0>; 51*f4093e2eSShengzhou Liu }; 52*f4093e2eSShengzhou Liu dma-channel@100 { 53*f4093e2eSShengzhou Liu compatible = "fsl,eloplus-dma-channel"; 54*f4093e2eSShengzhou Liu reg = <0x100 0x80>; 55*f4093e2eSShengzhou Liu interrupts = <466 2 0 0>; 56*f4093e2eSShengzhou Liu }; 57*f4093e2eSShengzhou Liu dma-channel@180 { 58*f4093e2eSShengzhou Liu compatible = "fsl,eloplus-dma-channel"; 59*f4093e2eSShengzhou Liu reg = <0x180 0x80>; 60*f4093e2eSShengzhou Liu interrupts = <467 2 0 0>; 61*f4093e2eSShengzhou Liu }; 62*f4093e2eSShengzhou Liu dma-channel@300 { 63*f4093e2eSShengzhou Liu compatible = "fsl,eloplus-dma-channel"; 64*f4093e2eSShengzhou Liu reg = <0x300 0x80>; 65*f4093e2eSShengzhou Liu interrupts = <468 2 0 0>; 66*f4093e2eSShengzhou Liu }; 67*f4093e2eSShengzhou Liu dma-channel@380 { 68*f4093e2eSShengzhou Liu compatible = "fsl,eloplus-dma-channel"; 69*f4093e2eSShengzhou Liu reg = <0x380 0x80>; 70*f4093e2eSShengzhou Liu interrupts = <469 2 0 0>; 71*f4093e2eSShengzhou Liu }; 72*f4093e2eSShengzhou Liu dma-channel@400 { 73*f4093e2eSShengzhou Liu compatible = "fsl,eloplus-dma-channel"; 74*f4093e2eSShengzhou Liu reg = <0x400 0x80>; 75*f4093e2eSShengzhou Liu interrupts = <470 2 0 0>; 76*f4093e2eSShengzhou Liu }; 77*f4093e2eSShengzhou Liu dma-channel@480 { 78*f4093e2eSShengzhou Liu compatible = "fsl,eloplus-dma-channel"; 79*f4093e2eSShengzhou Liu reg = <0x480 0x80>; 80*f4093e2eSShengzhou Liu interrupts = <471 2 0 0>; 81*f4093e2eSShengzhou Liu }; 82*f4093e2eSShengzhou Liu}; 83