1c9f75093Sfkan@amcc.com/* 2c9f75093Sfkan@amcc.com * Device Tree Source for AMCC (AppliedMicro) Eiger(460SX) 3c9f75093Sfkan@amcc.com * 4c9f75093Sfkan@amcc.com * Copyright 2009 AMCC (AppliedMicro) <ttnguyen@amcc.com> 5c9f75093Sfkan@amcc.com * 6c9f75093Sfkan@amcc.com * This file is licensed under the terms of the GNU General Public 7c9f75093Sfkan@amcc.com * License version 2. This program is licensed "as is" without 8c9f75093Sfkan@amcc.com * any warranty of any kind, whether express or implied. 9c9f75093Sfkan@amcc.com */ 10c9f75093Sfkan@amcc.com 11c9f75093Sfkan@amcc.com/dts-v1/; 12c9f75093Sfkan@amcc.com 13c9f75093Sfkan@amcc.com/ { 14c9f75093Sfkan@amcc.com #address-cells = <2>; 15c9f75093Sfkan@amcc.com #size-cells = <1>; 16c9f75093Sfkan@amcc.com model = "amcc,eiger"; 17c9f75093Sfkan@amcc.com compatible = "amcc,eiger"; 18c9f75093Sfkan@amcc.com dcr-parent = <&{/cpus/cpu@0}>; 19c9f75093Sfkan@amcc.com 20c9f75093Sfkan@amcc.com aliases { 21c9f75093Sfkan@amcc.com ethernet0 = &EMAC0; 22c9f75093Sfkan@amcc.com ethernet1 = &EMAC1; 23c9f75093Sfkan@amcc.com ethernet2 = &EMAC2; 24c9f75093Sfkan@amcc.com ethernet3 = &EMAC3; 25c9f75093Sfkan@amcc.com serial0 = &UART0; 26c9f75093Sfkan@amcc.com serial1 = &UART1; 27c9f75093Sfkan@amcc.com }; 28c9f75093Sfkan@amcc.com 29c9f75093Sfkan@amcc.com cpus { 30c9f75093Sfkan@amcc.com #address-cells = <1>; 31c9f75093Sfkan@amcc.com #size-cells = <0>; 32c9f75093Sfkan@amcc.com 33c9f75093Sfkan@amcc.com cpu@0 { 34c9f75093Sfkan@amcc.com device_type = "cpu"; 35c9f75093Sfkan@amcc.com model = "PowerPC,460SX"; 36c9f75093Sfkan@amcc.com reg = <0x00000000>; 37c9f75093Sfkan@amcc.com clock-frequency = <0>; /* Filled in by U-Boot */ 38c9f75093Sfkan@amcc.com timebase-frequency = <0>; /* Filled in by U-Boot */ 39c9f75093Sfkan@amcc.com i-cache-line-size = <32>; 40c9f75093Sfkan@amcc.com d-cache-line-size = <32>; 41c9f75093Sfkan@amcc.com i-cache-size = <32768>; 42c9f75093Sfkan@amcc.com d-cache-size = <32768>; 43c9f75093Sfkan@amcc.com dcr-controller; 44c9f75093Sfkan@amcc.com dcr-access-method = "native"; 45c9f75093Sfkan@amcc.com }; 46c9f75093Sfkan@amcc.com }; 47c9f75093Sfkan@amcc.com 48c9f75093Sfkan@amcc.com memory { 49c9f75093Sfkan@amcc.com device_type = "memory"; 50c9f75093Sfkan@amcc.com reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */ 51c9f75093Sfkan@amcc.com }; 52c9f75093Sfkan@amcc.com 53c9f75093Sfkan@amcc.com UIC0: interrupt-controller0 { 54c9f75093Sfkan@amcc.com compatible = "ibm,uic-460sx","ibm,uic"; 55c9f75093Sfkan@amcc.com interrupt-controller; 56c9f75093Sfkan@amcc.com cell-index = <0>; 57c9f75093Sfkan@amcc.com dcr-reg = <0x0c0 0x009>; 58c9f75093Sfkan@amcc.com #address-cells = <0>; 59c9f75093Sfkan@amcc.com #size-cells = <0>; 60c9f75093Sfkan@amcc.com #interrupt-cells = <2>; 61c9f75093Sfkan@amcc.com }; 62c9f75093Sfkan@amcc.com 63c9f75093Sfkan@amcc.com UIC1: interrupt-controller1 { 64c9f75093Sfkan@amcc.com compatible = "ibm,uic-460sx","ibm,uic"; 65c9f75093Sfkan@amcc.com interrupt-controller; 66c9f75093Sfkan@amcc.com cell-index = <1>; 67c9f75093Sfkan@amcc.com dcr-reg = <0x0d0 0x009>; 68c9f75093Sfkan@amcc.com #address-cells = <0>; 69c9f75093Sfkan@amcc.com #size-cells = <0>; 70c9f75093Sfkan@amcc.com #interrupt-cells = <2>; 71c9f75093Sfkan@amcc.com interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ 72c9f75093Sfkan@amcc.com interrupt-parent = <&UIC0>; 73c9f75093Sfkan@amcc.com }; 74c9f75093Sfkan@amcc.com 75c9f75093Sfkan@amcc.com UIC2: interrupt-controller2 { 76c9f75093Sfkan@amcc.com compatible = "ibm,uic-460sx","ibm,uic"; 77c9f75093Sfkan@amcc.com interrupt-controller; 78c9f75093Sfkan@amcc.com cell-index = <2>; 79c9f75093Sfkan@amcc.com dcr-reg = <0x0e0 0x009>; 80c9f75093Sfkan@amcc.com #address-cells = <0>; 81c9f75093Sfkan@amcc.com #size-cells = <0>; 82c9f75093Sfkan@amcc.com #interrupt-cells = <2>; 83c9f75093Sfkan@amcc.com interrupts = <0xa 0x4 0xb 0x4>; /* cascade */ 84c9f75093Sfkan@amcc.com interrupt-parent = <&UIC0>; 85c9f75093Sfkan@amcc.com }; 86c9f75093Sfkan@amcc.com 87c9f75093Sfkan@amcc.com UIC3: interrupt-controller3 { 88c9f75093Sfkan@amcc.com compatible = "ibm,uic-460sx","ibm,uic"; 89c9f75093Sfkan@amcc.com interrupt-controller; 90c9f75093Sfkan@amcc.com cell-index = <3>; 91c9f75093Sfkan@amcc.com dcr-reg = <0x0f0 0x009>; 92c9f75093Sfkan@amcc.com #address-cells = <0>; 93c9f75093Sfkan@amcc.com #size-cells = <0>; 94c9f75093Sfkan@amcc.com #interrupt-cells = <2>; 95c9f75093Sfkan@amcc.com interrupts = <0x10 0x4 0x11 0x4>; /* cascade */ 96c9f75093Sfkan@amcc.com interrupt-parent = <&UIC0>; 97c9f75093Sfkan@amcc.com }; 98c9f75093Sfkan@amcc.com 99c9f75093Sfkan@amcc.com SDR0: sdr { 100c9f75093Sfkan@amcc.com compatible = "ibm,sdr-460sx"; 101c9f75093Sfkan@amcc.com dcr-reg = <0x00e 0x002>; 102c9f75093Sfkan@amcc.com }; 103c9f75093Sfkan@amcc.com 104c9f75093Sfkan@amcc.com CPR0: cpr { 105c9f75093Sfkan@amcc.com compatible = "ibm,cpr-460sx"; 106c9f75093Sfkan@amcc.com dcr-reg = <0x00c 0x002>; 107c9f75093Sfkan@amcc.com }; 108c9f75093Sfkan@amcc.com 109c9f75093Sfkan@amcc.com plb { 110c9f75093Sfkan@amcc.com compatible = "ibm,plb-460sx", "ibm,plb4"; 111c9f75093Sfkan@amcc.com #address-cells = <2>; 112c9f75093Sfkan@amcc.com #size-cells = <1>; 113c9f75093Sfkan@amcc.com ranges; 114c9f75093Sfkan@amcc.com clock-frequency = <0>; /* Filled in by U-Boot */ 115c9f75093Sfkan@amcc.com 116c9f75093Sfkan@amcc.com SDRAM0: sdram { 117c9f75093Sfkan@amcc.com compatible = "ibm,sdram-460sx", "ibm,sdram-405gp"; 118c9f75093Sfkan@amcc.com dcr-reg = <0x010 0x002>; 119c9f75093Sfkan@amcc.com }; 120c9f75093Sfkan@amcc.com 121c9f75093Sfkan@amcc.com MAL0: mcmal { 122c9f75093Sfkan@amcc.com compatible = "ibm,mcmal-460sx", "ibm,mcmal2"; 123c9f75093Sfkan@amcc.com dcr-reg = <0x180 0x62>; 124c9f75093Sfkan@amcc.com num-tx-chans = <4>; 125c9f75093Sfkan@amcc.com num-rx-chans = <32>; 126c9f75093Sfkan@amcc.com #address-cells = <1>; 127c9f75093Sfkan@amcc.com #size-cells = <1>; 128c9f75093Sfkan@amcc.com interrupt-parent = <&UIC1>; 129c9f75093Sfkan@amcc.com interrupts = < /*TXEOB*/ 0x6 0x4 130c9f75093Sfkan@amcc.com /*RXEOB*/ 0x7 0x4 131c9f75093Sfkan@amcc.com /*SERR*/ 0x1 0x4 132c9f75093Sfkan@amcc.com /*TXDE*/ 0x2 0x4 133c9f75093Sfkan@amcc.com /*RXDE*/ 0x3 0x4 134c9f75093Sfkan@amcc.com /*COAL TX0*/ 0x18 0x2 135c9f75093Sfkan@amcc.com /*COAL TX1*/ 0x19 0x2 136c9f75093Sfkan@amcc.com /*COAL TX2*/ 0x1a 0x2 137c9f75093Sfkan@amcc.com /*COAL TX3*/ 0x1b 0x2 138c9f75093Sfkan@amcc.com /*COAL RX0*/ 0x1c 0x2 139c9f75093Sfkan@amcc.com /*COAL RX1*/ 0x1d 0x2 140c9f75093Sfkan@amcc.com /*COAL RX2*/ 0x1e 0x2 141c9f75093Sfkan@amcc.com /*COAL RX3*/ 0x1f 0x2>; 142c9f75093Sfkan@amcc.com }; 143c9f75093Sfkan@amcc.com 144c9f75093Sfkan@amcc.com POB0: opb { 145c9f75093Sfkan@amcc.com compatible = "ibm,opb-460sx", "ibm,opb"; 146c9f75093Sfkan@amcc.com #address-cells = <1>; 147c9f75093Sfkan@amcc.com #size-cells = <1>; 148c9f75093Sfkan@amcc.com ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>; 149c9f75093Sfkan@amcc.com clock-frequency = <0>; /* Filled in by U-Boot */ 150c9f75093Sfkan@amcc.com 151c9f75093Sfkan@amcc.com EBC0: ebc { 152c9f75093Sfkan@amcc.com compatible = "ibm,ebc-460sx", "ibm,ebc"; 153c9f75093Sfkan@amcc.com dcr-reg = <0x012 0x002>; 154c9f75093Sfkan@amcc.com #address-cells = <2>; 155c9f75093Sfkan@amcc.com #size-cells = <1>; 156c9f75093Sfkan@amcc.com clock-frequency = <0>; /* Filled in by U-Boot */ 157c9f75093Sfkan@amcc.com /* ranges property is supplied by U-Boot */ 158c9f75093Sfkan@amcc.com interrupts = <0x6 0x4>; 159c9f75093Sfkan@amcc.com interrupt-parent = <&UIC1>; 160c9f75093Sfkan@amcc.com 161c9f75093Sfkan@amcc.com nor_flash@0,0 { 162c9f75093Sfkan@amcc.com compatible = "amd,s29gl512n", "cfi-flash"; 163c9f75093Sfkan@amcc.com bank-width = <2>; 164c9f75093Sfkan@amcc.com /* reg property is supplied in by U-Boot */ 165c9f75093Sfkan@amcc.com #address-cells = <1>; 166c9f75093Sfkan@amcc.com #size-cells = <1>; 167c9f75093Sfkan@amcc.com partition@0 { 168c9f75093Sfkan@amcc.com label = "kernel"; 169c9f75093Sfkan@amcc.com reg = <0x00000000 0x001e0000>; 170c9f75093Sfkan@amcc.com }; 171c9f75093Sfkan@amcc.com partition@1e0000 { 172c9f75093Sfkan@amcc.com label = "dtb"; 173c9f75093Sfkan@amcc.com reg = <0x001e0000 0x00020000>; 174c9f75093Sfkan@amcc.com }; 175c9f75093Sfkan@amcc.com partition@200000 { 176c9f75093Sfkan@amcc.com label = "ramdisk"; 177c9f75093Sfkan@amcc.com reg = <0x00200000 0x01400000>; 178c9f75093Sfkan@amcc.com }; 179c9f75093Sfkan@amcc.com partition@1600000 { 180c9f75093Sfkan@amcc.com label = "jffs2"; 181c9f75093Sfkan@amcc.com reg = <0x01600000 0x00400000>; 182c9f75093Sfkan@amcc.com }; 183c9f75093Sfkan@amcc.com partition@1a00000 { 184c9f75093Sfkan@amcc.com label = "user"; 185c9f75093Sfkan@amcc.com reg = <0x01a00000 0x02560000>; 186c9f75093Sfkan@amcc.com }; 187c9f75093Sfkan@amcc.com partition@3f60000 { 188c9f75093Sfkan@amcc.com label = "env"; 189c9f75093Sfkan@amcc.com reg = <0x03f60000 0x00040000>; 190c9f75093Sfkan@amcc.com }; 191c9f75093Sfkan@amcc.com partition@3fa0000 { 192c9f75093Sfkan@amcc.com label = "u-boot"; 193c9f75093Sfkan@amcc.com reg = <0x03fa0000 0x00060000>; 194c9f75093Sfkan@amcc.com }; 195c9f75093Sfkan@amcc.com }; 196c9f75093Sfkan@amcc.com 197c9f75093Sfkan@amcc.com ndfc@1,0 { 198c9f75093Sfkan@amcc.com compatible = "ibm,ndfc"; 199c9f75093Sfkan@amcc.com /* reg property is supplied by U-boot */ 200c9f75093Sfkan@amcc.com ccr = <0x00003000>; 201c9f75093Sfkan@amcc.com bank-settings = <0x80002222>; 202c9f75093Sfkan@amcc.com #address-cells = <1>; 203c9f75093Sfkan@amcc.com #size-cells = <1>; 204c9f75093Sfkan@amcc.com 205c9f75093Sfkan@amcc.com nand { 206c9f75093Sfkan@amcc.com #address-cells = <1>; 207c9f75093Sfkan@amcc.com #size-cells = <1>; 208c9f75093Sfkan@amcc.com partition@0 { 209c9f75093Sfkan@amcc.com label = "uboot"; 210c9f75093Sfkan@amcc.com reg = <0x00000000 0x00200000>; 211c9f75093Sfkan@amcc.com }; 212c9f75093Sfkan@amcc.com partition@200000 { 213c9f75093Sfkan@amcc.com label = "uboot-environment"; 214c9f75093Sfkan@amcc.com reg = <0x00200000 0x00100000>; 215c9f75093Sfkan@amcc.com }; 216c9f75093Sfkan@amcc.com partition@300000 { 217c9f75093Sfkan@amcc.com label = "linux"; 218c9f75093Sfkan@amcc.com reg = <0x00300000 0x00300000>; 219c9f75093Sfkan@amcc.com }; 220c9f75093Sfkan@amcc.com partition@600000 { 221c9f75093Sfkan@amcc.com label = "root-file-system"; 222c9f75093Sfkan@amcc.com reg = <0x00600000 0x01900000>; 223c9f75093Sfkan@amcc.com }; 224c9f75093Sfkan@amcc.com partition@1f00000 { 225c9f75093Sfkan@amcc.com label = "device-tree"; 226c9f75093Sfkan@amcc.com reg = <0x01f00000 0x00020000>; 227c9f75093Sfkan@amcc.com }; 228c9f75093Sfkan@amcc.com partition@1f20000 { 229c9f75093Sfkan@amcc.com label = "data"; 230c9f75093Sfkan@amcc.com reg = <0x01f20000 0x060E0000>; 231c9f75093Sfkan@amcc.com }; 232c9f75093Sfkan@amcc.com }; 233c9f75093Sfkan@amcc.com }; 234c9f75093Sfkan@amcc.com }; 235c9f75093Sfkan@amcc.com 236c9f75093Sfkan@amcc.com UART0: serial@ef600200 { 237c9f75093Sfkan@amcc.com device_type = "serial"; 238c9f75093Sfkan@amcc.com compatible = "ns16550"; 239c9f75093Sfkan@amcc.com reg = <0xef600200 0x00000008>; 240c9f75093Sfkan@amcc.com virtual-reg = <0xef600200>; 241c9f75093Sfkan@amcc.com clock-frequency = <0>; /* Filled in by U-Boot */ 242c9f75093Sfkan@amcc.com current-speed = <0>; /* Filled in by U-Boot */ 243c9f75093Sfkan@amcc.com interrupt-parent = <&UIC0>; 244c9f75093Sfkan@amcc.com interrupts = <0x0 0x4>; 245c9f75093Sfkan@amcc.com }; 246c9f75093Sfkan@amcc.com 247c9f75093Sfkan@amcc.com UART1: serial@ef600300 { 248c9f75093Sfkan@amcc.com device_type = "serial"; 249c9f75093Sfkan@amcc.com compatible = "ns16550"; 250c9f75093Sfkan@amcc.com reg = <0xef600300 0x00000008>; 251c9f75093Sfkan@amcc.com virtual-reg = <0xef600300>; 252c9f75093Sfkan@amcc.com clock-frequency = <0>; /* Filled in by U-Boot */ 253c9f75093Sfkan@amcc.com current-speed = <0>; /* Filled in by U-Boot */ 254c9f75093Sfkan@amcc.com interrupt-parent = <&UIC0>; 255c9f75093Sfkan@amcc.com interrupts = <0x1 0x4>; 256c9f75093Sfkan@amcc.com }; 257c9f75093Sfkan@amcc.com 258c9f75093Sfkan@amcc.com IIC0: i2c@ef600400 { 259c9f75093Sfkan@amcc.com compatible = "ibm,iic-460sx", "ibm,iic"; 260c9f75093Sfkan@amcc.com reg = <0xef600400 0x00000014>; 261c9f75093Sfkan@amcc.com interrupt-parent = <&UIC0>; 262c9f75093Sfkan@amcc.com interrupts = <0x2 0x4>; 263c9f75093Sfkan@amcc.com #address-cells = <1>; 264c9f75093Sfkan@amcc.com #size-cells = <0>; 265c9f75093Sfkan@amcc.com index = <0>; 266c9f75093Sfkan@amcc.com }; 267c9f75093Sfkan@amcc.com 268c9f75093Sfkan@amcc.com IIC1: i2c@ef600500 { 269c9f75093Sfkan@amcc.com compatible = "ibm,iic-460sx", "ibm,iic"; 270c9f75093Sfkan@amcc.com reg = <0xef600500 0x00000014>; 271c9f75093Sfkan@amcc.com interrupt-parent = <&UIC0>; 272c9f75093Sfkan@amcc.com interrupts = <0x3 0x4>; 273c9f75093Sfkan@amcc.com #address-cells = <1>; 274c9f75093Sfkan@amcc.com #size-cells = <0>; 275c9f75093Sfkan@amcc.com index = <1>; 276c9f75093Sfkan@amcc.com }; 277c9f75093Sfkan@amcc.com 278c9f75093Sfkan@amcc.com RGMII0: emac-rgmii@ef600900 { 279c9f75093Sfkan@amcc.com compatible = "ibm,rgmii-460sx", "ibm,rgmii"; 280c9f75093Sfkan@amcc.com reg = <0xef600900 0x00000008>; 281c9f75093Sfkan@amcc.com has-mdio; 282c9f75093Sfkan@amcc.com }; 283c9f75093Sfkan@amcc.com 284c9f75093Sfkan@amcc.com RGMII1: emac-rgmii@ef600920 { 285c9f75093Sfkan@amcc.com compatible = "ibm,rgmii-460sx", "ibm,rgmii"; 286c9f75093Sfkan@amcc.com reg = <0xef600920 0x00000008>; 287c9f75093Sfkan@amcc.com has-mdio; 288c9f75093Sfkan@amcc.com }; 289c9f75093Sfkan@amcc.com 290c9f75093Sfkan@amcc.com TAH0: emac-tah@ef600e50 { 291c9f75093Sfkan@amcc.com compatible = "ibm,tah-460sx", "ibm,tah"; 292c9f75093Sfkan@amcc.com reg = <0xef600e50 0x00000030>; 293c9f75093Sfkan@amcc.com }; 294c9f75093Sfkan@amcc.com 295c9f75093Sfkan@amcc.com TAH1: emac-tah@ef600f50 { 296c9f75093Sfkan@amcc.com compatible = "ibm,tah-460sx", "ibm,tah"; 297c9f75093Sfkan@amcc.com reg = <0xef600f50 0x00000030>; 298c9f75093Sfkan@amcc.com }; 299c9f75093Sfkan@amcc.com 300c9f75093Sfkan@amcc.com EMAC0: ethernet@ef600a00 { 301c9f75093Sfkan@amcc.com device_type = "network"; 302c9f75093Sfkan@amcc.com compatible = "ibm,emac-460sx", "ibm,emac4"; 303c9f75093Sfkan@amcc.com interrupt-parent = <&EMAC0>; 304c9f75093Sfkan@amcc.com interrupts = <0x0 0x1>; 305c9f75093Sfkan@amcc.com #interrupt-cells = <1>; 306c9f75093Sfkan@amcc.com #address-cells = <0>; 307c9f75093Sfkan@amcc.com #size-cells = <0>; 308c9f75093Sfkan@amcc.com interrupt-map = </*Status*/ 0x0 &UIC0 0x13 0x4 309c9f75093Sfkan@amcc.com /*Wake*/ 0x1 &UIC2 0x1d 0x4>; 310c9f75093Sfkan@amcc.com reg = <0xef600a00 0x00000070>; 311c9f75093Sfkan@amcc.com local-mac-address = [000000000000]; /* Filled in by U-Boot */ 312c9f75093Sfkan@amcc.com mal-device = <&MAL0>; 313c9f75093Sfkan@amcc.com mal-tx-channel = <0>; 314c9f75093Sfkan@amcc.com mal-rx-channel = <0>; 315c9f75093Sfkan@amcc.com cell-index = <0>; 316c9f75093Sfkan@amcc.com max-frame-size = <9000>; 317c9f75093Sfkan@amcc.com rx-fifo-size = <4096>; 318c9f75093Sfkan@amcc.com tx-fifo-size = <2048>; 319835ad8e7SDave Mitchell rx-fifo-size-gige = <16384>; 320c9f75093Sfkan@amcc.com phy-mode = "rgmii"; 321c9f75093Sfkan@amcc.com phy-map = <0x00000000>; 322c9f75093Sfkan@amcc.com rgmii-device = <&RGMII0>; 323c9f75093Sfkan@amcc.com rgmii-channel = <0>; 324c9f75093Sfkan@amcc.com tah-device = <&TAH0>; 325c9f75093Sfkan@amcc.com tah-channel = <0>; 326c9f75093Sfkan@amcc.com has-inverted-stacr-oc; 327c9f75093Sfkan@amcc.com has-new-stacr-staopc; 328c9f75093Sfkan@amcc.com }; 329c9f75093Sfkan@amcc.com 330c9f75093Sfkan@amcc.com EMAC1: ethernet@ef600b00 { 331c9f75093Sfkan@amcc.com device_type = "network"; 332c9f75093Sfkan@amcc.com compatible = "ibm,emac-460sx", "ibm,emac4"; 333c9f75093Sfkan@amcc.com interrupt-parent = <&EMAC1>; 334c9f75093Sfkan@amcc.com interrupts = <0x0 0x1>; 335c9f75093Sfkan@amcc.com #interrupt-cells = <1>; 336c9f75093Sfkan@amcc.com #address-cells = <0>; 337c9f75093Sfkan@amcc.com #size-cells = <0>; 338c9f75093Sfkan@amcc.com interrupt-map = </*Status*/ 0x0 &UIC0 0x14 0x4 339c9f75093Sfkan@amcc.com /*Wake*/ 0x1 &UIC2 0x1d 0x4>; 340c9f75093Sfkan@amcc.com reg = <0xef600b00 0x00000070>; 341c9f75093Sfkan@amcc.com local-mac-address = [000000000000]; /* Filled in by U-Boot */ 342c9f75093Sfkan@amcc.com mal-device = <&MAL0>; 343c9f75093Sfkan@amcc.com mal-tx-channel = <1>; 344c9f75093Sfkan@amcc.com mal-rx-channel = <8>; 345c9f75093Sfkan@amcc.com cell-index = <1>; 346c9f75093Sfkan@amcc.com max-frame-size = <9000>; 347c9f75093Sfkan@amcc.com rx-fifo-size = <4096>; 348c9f75093Sfkan@amcc.com tx-fifo-size = <2048>; 349835ad8e7SDave Mitchell rx-fifo-size-gige = <16384>; 350c9f75093Sfkan@amcc.com phy-mode = "rgmii"; 351c9f75093Sfkan@amcc.com phy-map = <0x00000000>; 352c9f75093Sfkan@amcc.com rgmii-device = <&RGMII0>; 353c9f75093Sfkan@amcc.com rgmii-channel = <1>; 354c9f75093Sfkan@amcc.com tah-device = <&TAH1>; 355c9f75093Sfkan@amcc.com tah-channel = <1>; 356c9f75093Sfkan@amcc.com has-inverted-stacr-oc; 357c9f75093Sfkan@amcc.com has-new-stacr-staopc; 358c9f75093Sfkan@amcc.com mdio-device = <&EMAC0>; 359c9f75093Sfkan@amcc.com }; 360c9f75093Sfkan@amcc.com 361c9f75093Sfkan@amcc.com EMAC2: ethernet@ef600c00 { 362c9f75093Sfkan@amcc.com device_type = "network"; 363c9f75093Sfkan@amcc.com compatible = "ibm,emac-460sx", "ibm,emac4"; 364c9f75093Sfkan@amcc.com interrupt-parent = <&EMAC2>; 365c9f75093Sfkan@amcc.com interrupts = <0x0 0x1>; 366c9f75093Sfkan@amcc.com #interrupt-cells = <1>; 367c9f75093Sfkan@amcc.com #address-cells = <0>; 368c9f75093Sfkan@amcc.com #size-cells = <0>; 369c9f75093Sfkan@amcc.com interrupt-map = </*Status*/ 0x0 &UIC0 0x15 0x4 370c9f75093Sfkan@amcc.com /*Wake*/ 0x1 &UIC2 0x1d 0x4>; 371c9f75093Sfkan@amcc.com reg = <0xef600c00 0x00000070>; 372c9f75093Sfkan@amcc.com local-mac-address = [000000000000]; /* Filled in by U-Boot */ 373c9f75093Sfkan@amcc.com mal-device = <&MAL0>; 374c9f75093Sfkan@amcc.com mal-tx-channel = <2>; 375c9f75093Sfkan@amcc.com mal-rx-channel = <16>; 376c9f75093Sfkan@amcc.com cell-index = <2>; 377c9f75093Sfkan@amcc.com max-frame-size = <9000>; 378c9f75093Sfkan@amcc.com rx-fifo-size = <4096>; 379c9f75093Sfkan@amcc.com tx-fifo-size = <2048>; 380835ad8e7SDave Mitchell rx-fifo-size-gige = <16384>; 381835ad8e7SDave Mitchell tx-fifo-size-gige = <16384>; /* emac2&3 only */ 382c9f75093Sfkan@amcc.com phy-mode = "rgmii"; 383c9f75093Sfkan@amcc.com phy-map = <0x00000000>; 384c9f75093Sfkan@amcc.com rgmii-device = <&RGMII1>; 385c9f75093Sfkan@amcc.com rgmii-channel = <0>; 386c9f75093Sfkan@amcc.com has-inverted-stacr-oc; 387c9f75093Sfkan@amcc.com has-new-stacr-staopc; 388c9f75093Sfkan@amcc.com mdio-device = <&EMAC0>; 389c9f75093Sfkan@amcc.com }; 390c9f75093Sfkan@amcc.com 391c9f75093Sfkan@amcc.com EMAC3: ethernet@ef600d00 { 392c9f75093Sfkan@amcc.com device_type = "network"; 393c9f75093Sfkan@amcc.com compatible = "ibm,emac-460sx", "ibm,emac4"; 394c9f75093Sfkan@amcc.com interrupt-parent = <&EMAC3>; 395c9f75093Sfkan@amcc.com interrupts = <0x0 0x1>; 396c9f75093Sfkan@amcc.com #interrupt-cells = <1>; 397c9f75093Sfkan@amcc.com #address-cells = <0>; 398c9f75093Sfkan@amcc.com #size-cells = <0>; 399c9f75093Sfkan@amcc.com interrupt-map = </*Status*/ 0x0 &UIC0 0x16 0x4 400c9f75093Sfkan@amcc.com /*Wake*/ 0x1 &UIC2 0x1d 0x4>; 401c9f75093Sfkan@amcc.com reg = <0xef600d00 0x00000070>; 402c9f75093Sfkan@amcc.com local-mac-address = [000000000000]; /* Filled in by U-Boot */ 403c9f75093Sfkan@amcc.com mal-device = <&MAL0>; 404c9f75093Sfkan@amcc.com mal-tx-channel = <3>; 405c9f75093Sfkan@amcc.com mal-rx-channel = <24>; 406c9f75093Sfkan@amcc.com cell-index = <3>; 407c9f75093Sfkan@amcc.com max-frame-size = <9000>; 408c9f75093Sfkan@amcc.com rx-fifo-size = <4096>; 409c9f75093Sfkan@amcc.com tx-fifo-size = <2048>; 410835ad8e7SDave Mitchell rx-fifo-size-gige = <16384>; 411835ad8e7SDave Mitchell tx-fifo-size-gige = <16384>; /* emac2&3 only */ 412c9f75093Sfkan@amcc.com phy-mode = "rgmii"; 413c9f75093Sfkan@amcc.com phy-map = <0x00000000>; 414c9f75093Sfkan@amcc.com rgmii-device = <&RGMII1>; 415c9f75093Sfkan@amcc.com rgmii-channel = <1>; 416c9f75093Sfkan@amcc.com has-inverted-stacr-oc; 417c9f75093Sfkan@amcc.com has-new-stacr-staopc; 418c9f75093Sfkan@amcc.com mdio-device = <&EMAC0>; 419c9f75093Sfkan@amcc.com }; 420c9f75093Sfkan@amcc.com }; 421c9f75093Sfkan@amcc.com 422c9f75093Sfkan@amcc.com }; 423c9f75093Sfkan@amcc.com chosen { 424*78e5dfeaSRob Herring stdout-path = "/plb/opb/serial@ef600200"; 425c9f75093Sfkan@amcc.com }; 426c9f75093Sfkan@amcc.com 427c9f75093Sfkan@amcc.com}; 428