1*95acd4c7SLey Foon Tan/* 2*95acd4c7SLey Foon Tan * Copyright (C) 2013 Altera Corporation 3*95acd4c7SLey Foon Tan * 4*95acd4c7SLey Foon Tan * This program is free software; you can redistribute it and/or modify 5*95acd4c7SLey Foon Tan * it under the terms of the GNU General Public License as published by 6*95acd4c7SLey Foon Tan * the Free Software Foundation; either version 2 of the License, or 7*95acd4c7SLey Foon Tan * (at your option) any later version. 8*95acd4c7SLey Foon Tan * 9*95acd4c7SLey Foon Tan * This program is distributed in the hope that it will be useful, 10*95acd4c7SLey Foon Tan * but WITHOUT ANY WARRANTY; without even the implied warranty of 11*95acd4c7SLey Foon Tan * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12*95acd4c7SLey Foon Tan * GNU General Public License for more details. 13*95acd4c7SLey Foon Tan * 14*95acd4c7SLey Foon Tan * You should have received a copy of the GNU General Public License 15*95acd4c7SLey Foon Tan * along with this program. If not, see <http://www.gnu.org/licenses/>. 16*95acd4c7SLey Foon Tan * 17*95acd4c7SLey Foon Tan * This file is generated by sopc2dts. 18*95acd4c7SLey Foon Tan */ 19*95acd4c7SLey Foon Tan 20*95acd4c7SLey Foon Tan/dts-v1/; 21*95acd4c7SLey Foon Tan 22*95acd4c7SLey Foon Tan/ { 23*95acd4c7SLey Foon Tan model = "altr,qsys_ghrd_3c120"; 24*95acd4c7SLey Foon Tan compatible = "altr,qsys_ghrd_3c120"; 25*95acd4c7SLey Foon Tan #address-cells = <1>; 26*95acd4c7SLey Foon Tan #size-cells = <1>; 27*95acd4c7SLey Foon Tan 28*95acd4c7SLey Foon Tan cpus { 29*95acd4c7SLey Foon Tan #address-cells = <1>; 30*95acd4c7SLey Foon Tan #size-cells = <0>; 31*95acd4c7SLey Foon Tan 32*95acd4c7SLey Foon Tan cpu: cpu@0x0 { 33*95acd4c7SLey Foon Tan device_type = "cpu"; 34*95acd4c7SLey Foon Tan compatible = "altr,nios2-1.0"; 35*95acd4c7SLey Foon Tan reg = <0x00000000>; 36*95acd4c7SLey Foon Tan interrupt-controller; 37*95acd4c7SLey Foon Tan #interrupt-cells = <1>; 38*95acd4c7SLey Foon Tan clock-frequency = <125000000>; 39*95acd4c7SLey Foon Tan dcache-line-size = <32>; 40*95acd4c7SLey Foon Tan icache-line-size = <32>; 41*95acd4c7SLey Foon Tan dcache-size = <32768>; 42*95acd4c7SLey Foon Tan icache-size = <32768>; 43*95acd4c7SLey Foon Tan altr,implementation = "fast"; 44*95acd4c7SLey Foon Tan altr,pid-num-bits = <8>; 45*95acd4c7SLey Foon Tan altr,tlb-num-ways = <16>; 46*95acd4c7SLey Foon Tan altr,tlb-num-entries = <128>; 47*95acd4c7SLey Foon Tan altr,tlb-ptr-sz = <7>; 48*95acd4c7SLey Foon Tan altr,has-div = <1>; 49*95acd4c7SLey Foon Tan altr,has-mul = <1>; 50*95acd4c7SLey Foon Tan altr,reset-addr = <0xc2800000>; 51*95acd4c7SLey Foon Tan altr,fast-tlb-miss-addr = <0xc7fff400>; 52*95acd4c7SLey Foon Tan altr,exception-addr = <0xd0000020>; 53*95acd4c7SLey Foon Tan altr,has-initda = <1>; 54*95acd4c7SLey Foon Tan altr,has-mmu = <1>; 55*95acd4c7SLey Foon Tan }; 56*95acd4c7SLey Foon Tan }; 57*95acd4c7SLey Foon Tan 58*95acd4c7SLey Foon Tan memory@0 { 59*95acd4c7SLey Foon Tan device_type = "memory"; 60*95acd4c7SLey Foon Tan reg = <0x10000000 0x08000000>, 61*95acd4c7SLey Foon Tan <0x07fff400 0x00000400>; 62*95acd4c7SLey Foon Tan }; 63*95acd4c7SLey Foon Tan 64*95acd4c7SLey Foon Tan sopc@0 { 65*95acd4c7SLey Foon Tan device_type = "soc"; 66*95acd4c7SLey Foon Tan ranges; 67*95acd4c7SLey Foon Tan #address-cells = <1>; 68*95acd4c7SLey Foon Tan #size-cells = <1>; 69*95acd4c7SLey Foon Tan compatible = "altr,avalon", "simple-bus"; 70*95acd4c7SLey Foon Tan bus-frequency = <125000000>; 71*95acd4c7SLey Foon Tan 72*95acd4c7SLey Foon Tan pb_cpu_to_io: bridge@0x8000000 { 73*95acd4c7SLey Foon Tan compatible = "simple-bus"; 74*95acd4c7SLey Foon Tan reg = <0x08000000 0x00800000>; 75*95acd4c7SLey Foon Tan #address-cells = <1>; 76*95acd4c7SLey Foon Tan #size-cells = <1>; 77*95acd4c7SLey Foon Tan ranges = <0x00002000 0x08002000 0x00002000>, 78*95acd4c7SLey Foon Tan <0x00004000 0x08004000 0x00000400>, 79*95acd4c7SLey Foon Tan <0x00004400 0x08004400 0x00000040>, 80*95acd4c7SLey Foon Tan <0x00004800 0x08004800 0x00000040>, 81*95acd4c7SLey Foon Tan <0x00004c80 0x08004c80 0x00000020>, 82*95acd4c7SLey Foon Tan <0x00004d50 0x08004d50 0x00000008>, 83*95acd4c7SLey Foon Tan <0x00008000 0x08008000 0x00000020>, 84*95acd4c7SLey Foon Tan <0x00400000 0x08400000 0x00000020>; 85*95acd4c7SLey Foon Tan 86*95acd4c7SLey Foon Tan timer_1ms: timer@0x400000 { 87*95acd4c7SLey Foon Tan compatible = "altr,timer-1.0"; 88*95acd4c7SLey Foon Tan reg = <0x00400000 0x00000020>; 89*95acd4c7SLey Foon Tan interrupt-parent = <&cpu>; 90*95acd4c7SLey Foon Tan interrupts = <11>; 91*95acd4c7SLey Foon Tan clock-frequency = <125000000>; 92*95acd4c7SLey Foon Tan }; 93*95acd4c7SLey Foon Tan 94*95acd4c7SLey Foon Tan timer_0: timer@0x8000 { 95*95acd4c7SLey Foon Tan compatible = "altr,timer-1.0"; 96*95acd4c7SLey Foon Tan reg = < 0x00008000 0x00000020 >; 97*95acd4c7SLey Foon Tan interrupt-parent = < &cpu >; 98*95acd4c7SLey Foon Tan interrupts = < 5 >; 99*95acd4c7SLey Foon Tan clock-frequency = < 125000000 >; 100*95acd4c7SLey Foon Tan }; 101*95acd4c7SLey Foon Tan 102*95acd4c7SLey Foon Tan jtag_uart: serial@0x4d50 { 103*95acd4c7SLey Foon Tan compatible = "altr,juart-1.0"; 104*95acd4c7SLey Foon Tan reg = <0x00004d50 0x00000008>; 105*95acd4c7SLey Foon Tan interrupt-parent = <&cpu>; 106*95acd4c7SLey Foon Tan interrupts = <1>; 107*95acd4c7SLey Foon Tan }; 108*95acd4c7SLey Foon Tan 109*95acd4c7SLey Foon Tan tse_mac: ethernet@0x4000 { 110*95acd4c7SLey Foon Tan compatible = "altr,tse-1.0"; 111*95acd4c7SLey Foon Tan reg = <0x00004000 0x00000400>, 112*95acd4c7SLey Foon Tan <0x00004400 0x00000040>, 113*95acd4c7SLey Foon Tan <0x00004800 0x00000040>, 114*95acd4c7SLey Foon Tan <0x00002000 0x00002000>; 115*95acd4c7SLey Foon Tan reg-names = "control_port", "rx_csr", "tx_csr", "s1"; 116*95acd4c7SLey Foon Tan interrupt-parent = <&cpu>; 117*95acd4c7SLey Foon Tan interrupts = <2 3>; 118*95acd4c7SLey Foon Tan interrupt-names = "rx_irq", "tx_irq"; 119*95acd4c7SLey Foon Tan rx-fifo-depth = <8192>; 120*95acd4c7SLey Foon Tan tx-fifo-depth = <8192>; 121*95acd4c7SLey Foon Tan max-frame-size = <1518>; 122*95acd4c7SLey Foon Tan local-mac-address = [ 00 00 00 00 00 00 ]; 123*95acd4c7SLey Foon Tan phy-mode = "rgmii-id"; 124*95acd4c7SLey Foon Tan phy-handle = <&phy0>; 125*95acd4c7SLey Foon Tan tse_mac_mdio: mdio { 126*95acd4c7SLey Foon Tan compatible = "altr,tse-mdio"; 127*95acd4c7SLey Foon Tan #address-cells = <1>; 128*95acd4c7SLey Foon Tan #size-cells = <0>; 129*95acd4c7SLey Foon Tan phy0: ethernet-phy@18 { 130*95acd4c7SLey Foon Tan reg = <18>; 131*95acd4c7SLey Foon Tan device_type = "ethernet-phy"; 132*95acd4c7SLey Foon Tan }; 133*95acd4c7SLey Foon Tan }; 134*95acd4c7SLey Foon Tan }; 135*95acd4c7SLey Foon Tan 136*95acd4c7SLey Foon Tan uart: serial@0x4c80 { 137*95acd4c7SLey Foon Tan compatible = "altr,uart-1.0"; 138*95acd4c7SLey Foon Tan reg = <0x00004c80 0x00000020>; 139*95acd4c7SLey Foon Tan interrupt-parent = <&cpu>; 140*95acd4c7SLey Foon Tan interrupts = <10>; 141*95acd4c7SLey Foon Tan current-speed = <115200>; 142*95acd4c7SLey Foon Tan clock-frequency = <62500000>; 143*95acd4c7SLey Foon Tan }; 144*95acd4c7SLey Foon Tan }; 145*95acd4c7SLey Foon Tan 146*95acd4c7SLey Foon Tan cfi_flash_64m: flash@0x0 { 147*95acd4c7SLey Foon Tan compatible = "cfi-flash"; 148*95acd4c7SLey Foon Tan reg = <0x00000000 0x04000000>; 149*95acd4c7SLey Foon Tan bank-width = <2>; 150*95acd4c7SLey Foon Tan device-width = <1>; 151*95acd4c7SLey Foon Tan #address-cells = <1>; 152*95acd4c7SLey Foon Tan #size-cells = <1>; 153*95acd4c7SLey Foon Tan 154*95acd4c7SLey Foon Tan partition@800000 { 155*95acd4c7SLey Foon Tan reg = <0x00800000 0x01e00000>; 156*95acd4c7SLey Foon Tan label = "JFFS2 Filesystem"; 157*95acd4c7SLey Foon Tan }; 158*95acd4c7SLey Foon Tan }; 159*95acd4c7SLey Foon Tan }; 160*95acd4c7SLey Foon Tan 161*95acd4c7SLey Foon Tan chosen { 162*95acd4c7SLey Foon Tan bootargs = "debug console=ttyJ0,115200"; 163*95acd4c7SLey Foon Tan }; 164*95acd4c7SLey Foon Tan}; 165