xref: /linux/scripts/dtc/include-prefixes/mips/econet/en751221.dtsi (revision 67faad74352d1ce0c1f411f92fdb1e0c0f3c9380)
1*0ec48870SCaleb James DeLisle// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*0ec48870SCaleb James DeLisle/dts-v1/;
3*0ec48870SCaleb James DeLisle
4*0ec48870SCaleb James DeLisle/ {
5*0ec48870SCaleb James DeLisle	compatible = "econet,en751221";
6*0ec48870SCaleb James DeLisle	#address-cells = <1>;
7*0ec48870SCaleb James DeLisle	#size-cells = <1>;
8*0ec48870SCaleb James DeLisle
9*0ec48870SCaleb James DeLisle	hpt_clock: clock {
10*0ec48870SCaleb James DeLisle		compatible = "fixed-clock";
11*0ec48870SCaleb James DeLisle		#clock-cells = <0>;
12*0ec48870SCaleb James DeLisle		clock-frequency = <200000000>;  /* 200 MHz */
13*0ec48870SCaleb James DeLisle	};
14*0ec48870SCaleb James DeLisle
15*0ec48870SCaleb James DeLisle	cpus: cpus {
16*0ec48870SCaleb James DeLisle		#address-cells = <1>;
17*0ec48870SCaleb James DeLisle		#size-cells = <0>;
18*0ec48870SCaleb James DeLisle
19*0ec48870SCaleb James DeLisle		cpu@0 {
20*0ec48870SCaleb James DeLisle			device_type = "cpu";
21*0ec48870SCaleb James DeLisle			compatible = "mips,mips24KEc";
22*0ec48870SCaleb James DeLisle			reg = <0>;
23*0ec48870SCaleb James DeLisle		};
24*0ec48870SCaleb James DeLisle	};
25*0ec48870SCaleb James DeLisle
26*0ec48870SCaleb James DeLisle	cpuintc: interrupt-controller {
27*0ec48870SCaleb James DeLisle		compatible = "mti,cpu-interrupt-controller";
28*0ec48870SCaleb James DeLisle		interrupt-controller;
29*0ec48870SCaleb James DeLisle		#address-cells = <0>;
30*0ec48870SCaleb James DeLisle		#interrupt-cells = <1>;
31*0ec48870SCaleb James DeLisle	};
32*0ec48870SCaleb James DeLisle
33*0ec48870SCaleb James DeLisle	intc: interrupt-controller@1fb40000 {
34*0ec48870SCaleb James DeLisle		compatible = "econet,en751221-intc";
35*0ec48870SCaleb James DeLisle		reg = <0x1fb40000 0x100>;
36*0ec48870SCaleb James DeLisle		interrupt-parent = <&cpuintc>;
37*0ec48870SCaleb James DeLisle		interrupts = <2>;
38*0ec48870SCaleb James DeLisle
39*0ec48870SCaleb James DeLisle		interrupt-controller;
40*0ec48870SCaleb James DeLisle		#interrupt-cells = <1>;
41*0ec48870SCaleb James DeLisle		econet,shadow-interrupts = <7 2>, <8 3>, <13 12>, <30 29>;
42*0ec48870SCaleb James DeLisle	};
43*0ec48870SCaleb James DeLisle
44*0ec48870SCaleb James DeLisle	uart: serial@1fbf0000 {
45*0ec48870SCaleb James DeLisle		compatible = "ns16550";
46*0ec48870SCaleb James DeLisle		reg = <0x1fbf0000 0x30>;
47*0ec48870SCaleb James DeLisle		reg-io-width = <4>;
48*0ec48870SCaleb James DeLisle		reg-shift = <2>;
49*0ec48870SCaleb James DeLisle		interrupt-parent = <&intc>;
50*0ec48870SCaleb James DeLisle		interrupts = <0>;
51*0ec48870SCaleb James DeLisle		/*
52*0ec48870SCaleb James DeLisle		 * Conversion of baud rate to clock frequency requires a
53*0ec48870SCaleb James DeLisle		 * computation that is not in the ns16550 driver, so this
54*0ec48870SCaleb James DeLisle		 * uart is fixed at 115200 baud.
55*0ec48870SCaleb James DeLisle		 */
56*0ec48870SCaleb James DeLisle		clock-frequency = <1843200>;
57*0ec48870SCaleb James DeLisle	};
58*0ec48870SCaleb James DeLisle
59*0ec48870SCaleb James DeLisle	timer_hpt: timer@1fbf0400 {
60*0ec48870SCaleb James DeLisle		compatible = "econet,en751221-timer";
61*0ec48870SCaleb James DeLisle		reg = <0x1fbf0400 0x100>;
62*0ec48870SCaleb James DeLisle
63*0ec48870SCaleb James DeLisle		interrupt-parent = <&intc>;
64*0ec48870SCaleb James DeLisle		interrupts = <30>;
65*0ec48870SCaleb James DeLisle		clocks = <&hpt_clock>;
66*0ec48870SCaleb James DeLisle	};
67*0ec48870SCaleb James DeLisle};
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