xref: /linux/scripts/dtc/include-prefixes/dt-bindings/reset/cix,sky1-system-control.h (revision 31b43c079f9aa55754c20404a42bca9a49e01f60)
1*c76350e7SGary Yang /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2*c76350e7SGary Yang /* Author: Jerry Zhu <jerry.zhu@cixtech.com> */
3*c76350e7SGary Yang #ifndef DT_BINDING_RESET_CIX_SKY1_SYSTEM_CONTROL_H
4*c76350e7SGary Yang #define DT_BINDING_RESET_CIX_SKY1_SYSTEM_CONTROL_H
5*c76350e7SGary Yang 
6*c76350e7SGary Yang /* func reset for sky1 fch */
7*c76350e7SGary Yang #define SW_I3C0_RST_FUNC_G_N	0
8*c76350e7SGary Yang #define SW_I3C0_RST_FUNC_I_N	1
9*c76350e7SGary Yang #define SW_I3C1_RST_FUNC_G_N	2
10*c76350e7SGary Yang #define SW_I3C1_RST_FUNC_I_N	3
11*c76350e7SGary Yang #define SW_UART0_RST_FUNC_N	4
12*c76350e7SGary Yang #define SW_UART1_RST_FUNC_N	5
13*c76350e7SGary Yang #define SW_UART2_RST_FUNC_N	6
14*c76350e7SGary Yang #define SW_UART3_RST_FUNC_N	7
15*c76350e7SGary Yang #define SW_TIMER_RST_FUNC_N	8
16*c76350e7SGary Yang 
17*c76350e7SGary Yang /* apb reset for sky1 fch */
18*c76350e7SGary Yang #define SW_I3C0_RST_APB_N	9
19*c76350e7SGary Yang #define SW_I3C1_RST_APB_N	10
20*c76350e7SGary Yang #define SW_DMA_RST_AXI_N	11
21*c76350e7SGary Yang #define SW_UART0_RST_APB_N	12
22*c76350e7SGary Yang #define SW_UART1_RST_APB_N	13
23*c76350e7SGary Yang #define SW_UART2_RST_APB_N	14
24*c76350e7SGary Yang #define SW_UART3_RST_APB_N	15
25*c76350e7SGary Yang #define SW_SPI0_RST_APB_N	16
26*c76350e7SGary Yang #define SW_SPI1_RST_APB_N	17
27*c76350e7SGary Yang #define SW_I2C0_RST_APB_N	18
28*c76350e7SGary Yang #define SW_I2C1_RST_APB_N	19
29*c76350e7SGary Yang #define SW_I2C2_RST_APB_N	20
30*c76350e7SGary Yang #define SW_I2C3_RST_APB_N	21
31*c76350e7SGary Yang #define SW_I2C4_RST_APB_N	22
32*c76350e7SGary Yang #define SW_I2C5_RST_APB_N	23
33*c76350e7SGary Yang #define SW_I2C6_RST_APB_N	24
34*c76350e7SGary Yang #define SW_I2C7_RST_APB_N	25
35*c76350e7SGary Yang #define SW_GPIO_RST_APB_N	26
36*c76350e7SGary Yang 
37*c76350e7SGary Yang /* fch rst for xspi */
38*c76350e7SGary Yang #define SW_XSPI_REG_RST_N	27
39*c76350e7SGary Yang #define SW_XSPI_SYS_RST_N	28
40*c76350e7SGary Yang 
41*c76350e7SGary Yang #endif
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