1d6e0a660SJianlong Huang /* SPDX-License-Identifier: GPL-2.0 OR MIT */ 2d6e0a660SJianlong Huang /* 3d6e0a660SJianlong Huang * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk> 4d6e0a660SJianlong Huang * Copyright (C) 2022 StarFive Technology Co., Ltd. 5d6e0a660SJianlong Huang */ 6d6e0a660SJianlong Huang 7d6e0a660SJianlong Huang #ifndef __DT_BINDINGS_PINCTRL_STARFIVE_JH7110_H__ 8d6e0a660SJianlong Huang #define __DT_BINDINGS_PINCTRL_STARFIVE_JH7110_H__ 9d6e0a660SJianlong Huang 10d6e0a660SJianlong Huang /* sys_iomux pins */ 11d6e0a660SJianlong Huang #define PAD_GPIO0 0 12d6e0a660SJianlong Huang #define PAD_GPIO1 1 13d6e0a660SJianlong Huang #define PAD_GPIO2 2 14d6e0a660SJianlong Huang #define PAD_GPIO3 3 15d6e0a660SJianlong Huang #define PAD_GPIO4 4 16d6e0a660SJianlong Huang #define PAD_GPIO5 5 17d6e0a660SJianlong Huang #define PAD_GPIO6 6 18d6e0a660SJianlong Huang #define PAD_GPIO7 7 19d6e0a660SJianlong Huang #define PAD_GPIO8 8 20d6e0a660SJianlong Huang #define PAD_GPIO9 9 21d6e0a660SJianlong Huang #define PAD_GPIO10 10 22d6e0a660SJianlong Huang #define PAD_GPIO11 11 23d6e0a660SJianlong Huang #define PAD_GPIO12 12 24d6e0a660SJianlong Huang #define PAD_GPIO13 13 25d6e0a660SJianlong Huang #define PAD_GPIO14 14 26d6e0a660SJianlong Huang #define PAD_GPIO15 15 27d6e0a660SJianlong Huang #define PAD_GPIO16 16 28d6e0a660SJianlong Huang #define PAD_GPIO17 17 29d6e0a660SJianlong Huang #define PAD_GPIO18 18 30d6e0a660SJianlong Huang #define PAD_GPIO19 19 31d6e0a660SJianlong Huang #define PAD_GPIO20 20 32d6e0a660SJianlong Huang #define PAD_GPIO21 21 33d6e0a660SJianlong Huang #define PAD_GPIO22 22 34d6e0a660SJianlong Huang #define PAD_GPIO23 23 35d6e0a660SJianlong Huang #define PAD_GPIO24 24 36d6e0a660SJianlong Huang #define PAD_GPIO25 25 37d6e0a660SJianlong Huang #define PAD_GPIO26 26 38d6e0a660SJianlong Huang #define PAD_GPIO27 27 39d6e0a660SJianlong Huang #define PAD_GPIO28 28 40d6e0a660SJianlong Huang #define PAD_GPIO29 29 41d6e0a660SJianlong Huang #define PAD_GPIO30 30 42d6e0a660SJianlong Huang #define PAD_GPIO31 31 43d6e0a660SJianlong Huang #define PAD_GPIO32 32 44d6e0a660SJianlong Huang #define PAD_GPIO33 33 45d6e0a660SJianlong Huang #define PAD_GPIO34 34 46d6e0a660SJianlong Huang #define PAD_GPIO35 35 47d6e0a660SJianlong Huang #define PAD_GPIO36 36 48d6e0a660SJianlong Huang #define PAD_GPIO37 37 49d6e0a660SJianlong Huang #define PAD_GPIO38 38 50d6e0a660SJianlong Huang #define PAD_GPIO39 39 51d6e0a660SJianlong Huang #define PAD_GPIO40 40 52d6e0a660SJianlong Huang #define PAD_GPIO41 41 53d6e0a660SJianlong Huang #define PAD_GPIO42 42 54d6e0a660SJianlong Huang #define PAD_GPIO43 43 55d6e0a660SJianlong Huang #define PAD_GPIO44 44 56d6e0a660SJianlong Huang #define PAD_GPIO45 45 57d6e0a660SJianlong Huang #define PAD_GPIO46 46 58d6e0a660SJianlong Huang #define PAD_GPIO47 47 59d6e0a660SJianlong Huang #define PAD_GPIO48 48 60d6e0a660SJianlong Huang #define PAD_GPIO49 49 61d6e0a660SJianlong Huang #define PAD_GPIO50 50 62d6e0a660SJianlong Huang #define PAD_GPIO51 51 63d6e0a660SJianlong Huang #define PAD_GPIO52 52 64d6e0a660SJianlong Huang #define PAD_GPIO53 53 65d6e0a660SJianlong Huang #define PAD_GPIO54 54 66d6e0a660SJianlong Huang #define PAD_GPIO55 55 67d6e0a660SJianlong Huang #define PAD_GPIO56 56 68d6e0a660SJianlong Huang #define PAD_GPIO57 57 69d6e0a660SJianlong Huang #define PAD_GPIO58 58 70d6e0a660SJianlong Huang #define PAD_GPIO59 59 71d6e0a660SJianlong Huang #define PAD_GPIO60 60 72d6e0a660SJianlong Huang #define PAD_GPIO61 61 73d6e0a660SJianlong Huang #define PAD_GPIO62 62 74d6e0a660SJianlong Huang #define PAD_GPIO63 63 75d6e0a660SJianlong Huang #define PAD_SD0_CLK 64 76d6e0a660SJianlong Huang #define PAD_SD0_CMD 65 77d6e0a660SJianlong Huang #define PAD_SD0_DATA0 66 78d6e0a660SJianlong Huang #define PAD_SD0_DATA1 67 79d6e0a660SJianlong Huang #define PAD_SD0_DATA2 68 80d6e0a660SJianlong Huang #define PAD_SD0_DATA3 69 81d6e0a660SJianlong Huang #define PAD_SD0_DATA4 70 82d6e0a660SJianlong Huang #define PAD_SD0_DATA5 71 83d6e0a660SJianlong Huang #define PAD_SD0_DATA6 72 84d6e0a660SJianlong Huang #define PAD_SD0_DATA7 73 85d6e0a660SJianlong Huang #define PAD_SD0_STRB 74 86d6e0a660SJianlong Huang #define PAD_GMAC1_MDC 75 87d6e0a660SJianlong Huang #define PAD_GMAC1_MDIO 76 88d6e0a660SJianlong Huang #define PAD_GMAC1_RXD0 77 89d6e0a660SJianlong Huang #define PAD_GMAC1_RXD1 78 90d6e0a660SJianlong Huang #define PAD_GMAC1_RXD2 79 91d6e0a660SJianlong Huang #define PAD_GMAC1_RXD3 80 92d6e0a660SJianlong Huang #define PAD_GMAC1_RXDV 81 93d6e0a660SJianlong Huang #define PAD_GMAC1_RXC 82 94d6e0a660SJianlong Huang #define PAD_GMAC1_TXD0 83 95d6e0a660SJianlong Huang #define PAD_GMAC1_TXD1 84 96d6e0a660SJianlong Huang #define PAD_GMAC1_TXD2 85 97d6e0a660SJianlong Huang #define PAD_GMAC1_TXD3 86 98d6e0a660SJianlong Huang #define PAD_GMAC1_TXEN 87 99d6e0a660SJianlong Huang #define PAD_GMAC1_TXC 88 100d6e0a660SJianlong Huang #define PAD_QSPI_SCLK 89 101d6e0a660SJianlong Huang #define PAD_QSPI_CS0 90 102d6e0a660SJianlong Huang #define PAD_QSPI_DATA0 91 103d6e0a660SJianlong Huang #define PAD_QSPI_DATA1 92 104d6e0a660SJianlong Huang #define PAD_QSPI_DATA2 93 105d6e0a660SJianlong Huang #define PAD_QSPI_DATA3 94 106d6e0a660SJianlong Huang 107*716129d3SJianlong Huang /* aon_iomux pins */ 108*716129d3SJianlong Huang #define PAD_TESTEN 0 109*716129d3SJianlong Huang #define PAD_RGPIO0 1 110*716129d3SJianlong Huang #define PAD_RGPIO1 2 111*716129d3SJianlong Huang #define PAD_RGPIO2 3 112*716129d3SJianlong Huang #define PAD_RGPIO3 4 113*716129d3SJianlong Huang #define PAD_RSTN 5 114*716129d3SJianlong Huang #define PAD_GMAC0_MDC 6 115*716129d3SJianlong Huang #define PAD_GMAC0_MDIO 7 116*716129d3SJianlong Huang #define PAD_GMAC0_RXD0 8 117*716129d3SJianlong Huang #define PAD_GMAC0_RXD1 9 118*716129d3SJianlong Huang #define PAD_GMAC0_RXD2 10 119*716129d3SJianlong Huang #define PAD_GMAC0_RXD3 11 120*716129d3SJianlong Huang #define PAD_GMAC0_RXDV 12 121*716129d3SJianlong Huang #define PAD_GMAC0_RXC 13 122*716129d3SJianlong Huang #define PAD_GMAC0_TXD0 14 123*716129d3SJianlong Huang #define PAD_GMAC0_TXD1 15 124*716129d3SJianlong Huang #define PAD_GMAC0_TXD2 16 125*716129d3SJianlong Huang #define PAD_GMAC0_TXD3 17 126*716129d3SJianlong Huang #define PAD_GMAC0_TXEN 18 127*716129d3SJianlong Huang #define PAD_GMAC0_TXC 19 128*716129d3SJianlong Huang 129d6e0a660SJianlong Huang #define GPOUT_LOW 0 130d6e0a660SJianlong Huang #define GPOUT_HIGH 1 131d6e0a660SJianlong Huang 132d6e0a660SJianlong Huang #define GPOEN_ENABLE 0 133d6e0a660SJianlong Huang #define GPOEN_DISABLE 1 134d6e0a660SJianlong Huang 135d6e0a660SJianlong Huang #define GPI_NONE 255 136d6e0a660SJianlong Huang 137d6e0a660SJianlong Huang #endif 138