1*b07b6162SHanks Chen /* SPDX-License-Identifier: GPL-2.0 */ 2*b07b6162SHanks Chen /* 3*b07b6162SHanks Chen * Copyright (C) 2019 MediaTek Inc. 4*b07b6162SHanks Chen * Author: Andy Teng <andy.teng@mediatek.com> 5*b07b6162SHanks Chen * 6*b07b6162SHanks Chen */ 7*b07b6162SHanks Chen 8*b07b6162SHanks Chen #ifndef __MT6779_PINFUNC_H 9*b07b6162SHanks Chen #define __MT6779_PINFUNC_H 10*b07b6162SHanks Chen 11*b07b6162SHanks Chen #include <dt-bindings/pinctrl/mt65xx.h> 12*b07b6162SHanks Chen 13*b07b6162SHanks Chen #define PINMUX_GPIO0__FUNC_GPIO0 (MTK_PIN_NO(0) | 0) 14*b07b6162SHanks Chen #define PINMUX_GPIO0__FUNC_SPI6_MI (MTK_PIN_NO(0) | 1) 15*b07b6162SHanks Chen #define PINMUX_GPIO0__FUNC_I2S5_LRCK (MTK_PIN_NO(0) | 2) 16*b07b6162SHanks Chen #define PINMUX_GPIO0__FUNC_TDM_LRCK_2ND (MTK_PIN_NO(0) | 3) 17*b07b6162SHanks Chen #define PINMUX_GPIO0__FUNC_PCM1_SYNC (MTK_PIN_NO(0) | 4) 18*b07b6162SHanks Chen #define PINMUX_GPIO0__FUNC_SCL_6306 (MTK_PIN_NO(0) | 5) 19*b07b6162SHanks Chen #define PINMUX_GPIO0__FUNC_TP_GPIO0_AO (MTK_PIN_NO(0) | 6) 20*b07b6162SHanks Chen #define PINMUX_GPIO0__FUNC_PTA_RXD (MTK_PIN_NO(0) | 7) 21*b07b6162SHanks Chen 22*b07b6162SHanks Chen #define PINMUX_GPIO1__FUNC_GPIO1 (MTK_PIN_NO(1) | 0) 23*b07b6162SHanks Chen #define PINMUX_GPIO1__FUNC_SPI6_CSB (MTK_PIN_NO(1) | 1) 24*b07b6162SHanks Chen #define PINMUX_GPIO1__FUNC_I2S5_DO (MTK_PIN_NO(1) | 2) 25*b07b6162SHanks Chen #define PINMUX_GPIO1__FUNC_TDM_DATA0_2ND (MTK_PIN_NO(1) | 3) 26*b07b6162SHanks Chen #define PINMUX_GPIO1__FUNC_PCM1_DO0 (MTK_PIN_NO(1) | 4) 27*b07b6162SHanks Chen #define PINMUX_GPIO1__FUNC_SDA_6306 (MTK_PIN_NO(1) | 5) 28*b07b6162SHanks Chen #define PINMUX_GPIO1__FUNC_TP_GPIO1_AO (MTK_PIN_NO(1) | 6) 29*b07b6162SHanks Chen #define PINMUX_GPIO1__FUNC_PTA_TXD (MTK_PIN_NO(1) | 7) 30*b07b6162SHanks Chen 31*b07b6162SHanks Chen #define PINMUX_GPIO2__FUNC_GPIO2 (MTK_PIN_NO(2) | 0) 32*b07b6162SHanks Chen #define PINMUX_GPIO2__FUNC_SPI6_MO (MTK_PIN_NO(2) | 1) 33*b07b6162SHanks Chen #define PINMUX_GPIO2__FUNC_I2S5_BCK (MTK_PIN_NO(2) | 2) 34*b07b6162SHanks Chen #define PINMUX_GPIO2__FUNC_TDM_BCK_2ND (MTK_PIN_NO(2) | 3) 35*b07b6162SHanks Chen #define PINMUX_GPIO2__FUNC_PCM1_CLK (MTK_PIN_NO(2) | 4) 36*b07b6162SHanks Chen #define PINMUX_GPIO2__FUNC_MD_INT1_C2K_UIM0_HOT_PLUG (MTK_PIN_NO(2) | 5) 37*b07b6162SHanks Chen #define PINMUX_GPIO2__FUNC_TP_GPIO2_AO (MTK_PIN_NO(2) | 6) 38*b07b6162SHanks Chen 39*b07b6162SHanks Chen #define PINMUX_GPIO3__FUNC_GPIO3 (MTK_PIN_NO(3) | 0) 40*b07b6162SHanks Chen #define PINMUX_GPIO3__FUNC_SPI6_CLK (MTK_PIN_NO(3) | 1) 41*b07b6162SHanks Chen #define PINMUX_GPIO3__FUNC_I2S5_MCK (MTK_PIN_NO(3) | 2) 42*b07b6162SHanks Chen #define PINMUX_GPIO3__FUNC_TDM_MCK_2ND (MTK_PIN_NO(3) | 3) 43*b07b6162SHanks Chen #define PINMUX_GPIO3__FUNC_EXT_FRAME_SYNC (MTK_PIN_NO(3) | 4) 44*b07b6162SHanks Chen #define PINMUX_GPIO3__FUNC_MD_INT2_C2K_UIM1_HOT_PLUG (MTK_PIN_NO(3) | 5) 45*b07b6162SHanks Chen #define PINMUX_GPIO3__FUNC_TP_GPIO3_AO (MTK_PIN_NO(3) | 6) 46*b07b6162SHanks Chen 47*b07b6162SHanks Chen #define PINMUX_GPIO4__FUNC_GPIO4 (MTK_PIN_NO(4) | 0) 48*b07b6162SHanks Chen #define PINMUX_GPIO4__FUNC_SPI7_MI (MTK_PIN_NO(4) | 1) 49*b07b6162SHanks Chen #define PINMUX_GPIO4__FUNC_I2S0_MCK (MTK_PIN_NO(4) | 2) 50*b07b6162SHanks Chen #define PINMUX_GPIO4__FUNC_TDM_DATA1_2ND (MTK_PIN_NO(4) | 3) 51*b07b6162SHanks Chen #define PINMUX_GPIO4__FUNC_PCM1_DO1 (MTK_PIN_NO(4) | 4) 52*b07b6162SHanks Chen #define PINMUX_GPIO4__FUNC_DMIC1_CLK (MTK_PIN_NO(4) | 5) 53*b07b6162SHanks Chen #define PINMUX_GPIO4__FUNC_TP_GPIO4_AO (MTK_PIN_NO(4) | 6) 54*b07b6162SHanks Chen #define PINMUX_GPIO4__FUNC_SCL8 (MTK_PIN_NO(4) | 7) 55*b07b6162SHanks Chen 56*b07b6162SHanks Chen #define PINMUX_GPIO5__FUNC_GPIO5 (MTK_PIN_NO(5) | 0) 57*b07b6162SHanks Chen #define PINMUX_GPIO5__FUNC_SPI7_CSB (MTK_PIN_NO(5) | 1) 58*b07b6162SHanks Chen #define PINMUX_GPIO5__FUNC_I2S0_BCK (MTK_PIN_NO(5) | 2) 59*b07b6162SHanks Chen #define PINMUX_GPIO5__FUNC_TDM_DATA2_2ND (MTK_PIN_NO(5) | 3) 60*b07b6162SHanks Chen #define PINMUX_GPIO5__FUNC_PCM1_DO2 (MTK_PIN_NO(5) | 4) 61*b07b6162SHanks Chen #define PINMUX_GPIO5__FUNC_DMIC1_DAT (MTK_PIN_NO(5) | 5) 62*b07b6162SHanks Chen #define PINMUX_GPIO5__FUNC_TP_GPIO5_AO (MTK_PIN_NO(5) | 6) 63*b07b6162SHanks Chen #define PINMUX_GPIO5__FUNC_SDA8 (MTK_PIN_NO(5) | 7) 64*b07b6162SHanks Chen 65*b07b6162SHanks Chen #define PINMUX_GPIO6__FUNC_GPIO6 (MTK_PIN_NO(6) | 0) 66*b07b6162SHanks Chen #define PINMUX_GPIO6__FUNC_SPI7_MO (MTK_PIN_NO(6) | 1) 67*b07b6162SHanks Chen #define PINMUX_GPIO6__FUNC_I2S0_LRCK (MTK_PIN_NO(6) | 2) 68*b07b6162SHanks Chen #define PINMUX_GPIO6__FUNC_TDM_DATA3_2ND (MTK_PIN_NO(6) | 3) 69*b07b6162SHanks Chen #define PINMUX_GPIO6__FUNC_PCM1_DI (MTK_PIN_NO(6) | 4) 70*b07b6162SHanks Chen #define PINMUX_GPIO6__FUNC_DMIC_CLK (MTK_PIN_NO(6) | 5) 71*b07b6162SHanks Chen #define PINMUX_GPIO6__FUNC_TP_GPIO6_AO (MTK_PIN_NO(6) | 6) 72*b07b6162SHanks Chen #define PINMUX_GPIO6__FUNC_SCL9 (MTK_PIN_NO(6) | 7) 73*b07b6162SHanks Chen 74*b07b6162SHanks Chen #define PINMUX_GPIO7__FUNC_GPIO7 (MTK_PIN_NO(7) | 0) 75*b07b6162SHanks Chen #define PINMUX_GPIO7__FUNC_SPI7_CLK (MTK_PIN_NO(7) | 1) 76*b07b6162SHanks Chen #define PINMUX_GPIO7__FUNC_I2S0_DI (MTK_PIN_NO(7) | 2) 77*b07b6162SHanks Chen #define PINMUX_GPIO7__FUNC_SRCLKENAI1 (MTK_PIN_NO(7) | 3) 78*b07b6162SHanks Chen #define PINMUX_GPIO7__FUNC_DVFSRC_EXT_REQ (MTK_PIN_NO(7) | 4) 79*b07b6162SHanks Chen #define PINMUX_GPIO7__FUNC_DMIC_DAT (MTK_PIN_NO(7) | 5) 80*b07b6162SHanks Chen #define PINMUX_GPIO7__FUNC_TP_GPIO7_AO (MTK_PIN_NO(7) | 6) 81*b07b6162SHanks Chen #define PINMUX_GPIO7__FUNC_SDA9 (MTK_PIN_NO(7) | 7) 82*b07b6162SHanks Chen 83*b07b6162SHanks Chen #define PINMUX_GPIO8__FUNC_GPIO8 (MTK_PIN_NO(8) | 0) 84*b07b6162SHanks Chen #define PINMUX_GPIO8__FUNC_PWM_0 (MTK_PIN_NO(8) | 1) 85*b07b6162SHanks Chen #define PINMUX_GPIO8__FUNC_I2S2_DI2 (MTK_PIN_NO(8) | 2) 86*b07b6162SHanks Chen #define PINMUX_GPIO8__FUNC_SRCLKENAI0 (MTK_PIN_NO(8) | 3) 87*b07b6162SHanks Chen #define PINMUX_GPIO8__FUNC_URXD1 (MTK_PIN_NO(8) | 4) 88*b07b6162SHanks Chen #define PINMUX_GPIO8__FUNC_I2S0_MCK (MTK_PIN_NO(8) | 5) 89*b07b6162SHanks Chen #define PINMUX_GPIO8__FUNC_CONN_MCU_DBGACK_N (MTK_PIN_NO(8) | 6) 90*b07b6162SHanks Chen #define PINMUX_GPIO8__FUNC_IDDIG (MTK_PIN_NO(8) | 7) 91*b07b6162SHanks Chen 92*b07b6162SHanks Chen #define PINMUX_GPIO9__FUNC_GPIO9 (MTK_PIN_NO(9) | 0) 93*b07b6162SHanks Chen #define PINMUX_GPIO9__FUNC_PWM_3 (MTK_PIN_NO(9) | 1) 94*b07b6162SHanks Chen #define PINMUX_GPIO9__FUNC_MD_INT0 (MTK_PIN_NO(9) | 2) 95*b07b6162SHanks Chen #define PINMUX_GPIO9__FUNC_SRCLKENAI1 (MTK_PIN_NO(9) | 3) 96*b07b6162SHanks Chen #define PINMUX_GPIO9__FUNC_UTXD1 (MTK_PIN_NO(9) | 4) 97*b07b6162SHanks Chen #define PINMUX_GPIO9__FUNC_I2S0_BCK (MTK_PIN_NO(9) | 5) 98*b07b6162SHanks Chen #define PINMUX_GPIO9__FUNC_CONN_MCU_TRST_B (MTK_PIN_NO(9) | 6) 99*b07b6162SHanks Chen #define PINMUX_GPIO9__FUNC_USB_DRVVBUS (MTK_PIN_NO(9) | 7) 100*b07b6162SHanks Chen 101*b07b6162SHanks Chen #define PINMUX_GPIO10__FUNC_GPIO10 (MTK_PIN_NO(10) | 0) 102*b07b6162SHanks Chen #define PINMUX_GPIO10__FUNC_MSDC1_CLK_A (MTK_PIN_NO(10) | 1) 103*b07b6162SHanks Chen #define PINMUX_GPIO10__FUNC_TP_URXD1_AO (MTK_PIN_NO(10) | 2) 104*b07b6162SHanks Chen #define PINMUX_GPIO10__FUNC_I2S1_LRCK (MTK_PIN_NO(10) | 3) 105*b07b6162SHanks Chen #define PINMUX_GPIO10__FUNC_UCTS0 (MTK_PIN_NO(10) | 4) 106*b07b6162SHanks Chen #define PINMUX_GPIO10__FUNC_DMIC1_CLK (MTK_PIN_NO(10) | 5) 107*b07b6162SHanks Chen #define PINMUX_GPIO10__FUNC_KPCOL2 (MTK_PIN_NO(10) | 6) 108*b07b6162SHanks Chen #define PINMUX_GPIO10__FUNC_SCL8 (MTK_PIN_NO(10) | 7) 109*b07b6162SHanks Chen 110*b07b6162SHanks Chen #define PINMUX_GPIO11__FUNC_GPIO11 (MTK_PIN_NO(11) | 0) 111*b07b6162SHanks Chen #define PINMUX_GPIO11__FUNC_MSDC1_CMD_A (MTK_PIN_NO(11) | 1) 112*b07b6162SHanks Chen #define PINMUX_GPIO11__FUNC_TP_UTXD1_AO (MTK_PIN_NO(11) | 2) 113*b07b6162SHanks Chen #define PINMUX_GPIO11__FUNC_I2S1_DO (MTK_PIN_NO(11) | 3) 114*b07b6162SHanks Chen #define PINMUX_GPIO11__FUNC_URTS0 (MTK_PIN_NO(11) | 4) 115*b07b6162SHanks Chen #define PINMUX_GPIO11__FUNC_DMIC1_DAT (MTK_PIN_NO(11) | 5) 116*b07b6162SHanks Chen #define PINMUX_GPIO11__FUNC_KPROW2 (MTK_PIN_NO(11) | 6) 117*b07b6162SHanks Chen #define PINMUX_GPIO11__FUNC_SDA8 (MTK_PIN_NO(11) | 7) 118*b07b6162SHanks Chen 119*b07b6162SHanks Chen #define PINMUX_GPIO12__FUNC_GPIO12 (MTK_PIN_NO(12) | 0) 120*b07b6162SHanks Chen #define PINMUX_GPIO12__FUNC_MSDC1_DAT3_A (MTK_PIN_NO(12) | 1) 121*b07b6162SHanks Chen #define PINMUX_GPIO12__FUNC_TP_URXD2_AO (MTK_PIN_NO(12) | 2) 122*b07b6162SHanks Chen #define PINMUX_GPIO12__FUNC_I2S1_MCK (MTK_PIN_NO(12) | 3) 123*b07b6162SHanks Chen #define PINMUX_GPIO12__FUNC_UCTS1 (MTK_PIN_NO(12) | 4) 124*b07b6162SHanks Chen #define PINMUX_GPIO12__FUNC_DMIC_CLK (MTK_PIN_NO(12) | 5) 125*b07b6162SHanks Chen #define PINMUX_GPIO12__FUNC_ANT_SEL9 (MTK_PIN_NO(12) | 6) 126*b07b6162SHanks Chen #define PINMUX_GPIO12__FUNC_SCL9 (MTK_PIN_NO(12) | 7) 127*b07b6162SHanks Chen 128*b07b6162SHanks Chen #define PINMUX_GPIO13__FUNC_GPIO13 (MTK_PIN_NO(13) | 0) 129*b07b6162SHanks Chen #define PINMUX_GPIO13__FUNC_MSDC1_DAT0_A (MTK_PIN_NO(13) | 1) 130*b07b6162SHanks Chen #define PINMUX_GPIO13__FUNC_TP_UTXD2_AO (MTK_PIN_NO(13) | 2) 131*b07b6162SHanks Chen #define PINMUX_GPIO13__FUNC_I2S1_BCK (MTK_PIN_NO(13) | 3) 132*b07b6162SHanks Chen #define PINMUX_GPIO13__FUNC_URTS1 (MTK_PIN_NO(13) | 4) 133*b07b6162SHanks Chen #define PINMUX_GPIO13__FUNC_DMIC_DAT (MTK_PIN_NO(13) | 5) 134*b07b6162SHanks Chen #define PINMUX_GPIO13__FUNC_ANT_SEL10 (MTK_PIN_NO(13) | 6) 135*b07b6162SHanks Chen #define PINMUX_GPIO13__FUNC_SDA9 (MTK_PIN_NO(13) | 7) 136*b07b6162SHanks Chen 137*b07b6162SHanks Chen #define PINMUX_GPIO14__FUNC_GPIO14 (MTK_PIN_NO(14) | 0) 138*b07b6162SHanks Chen #define PINMUX_GPIO14__FUNC_MSDC1_DAT2_A (MTK_PIN_NO(14) | 1) 139*b07b6162SHanks Chen #define PINMUX_GPIO14__FUNC_PWM_3 (MTK_PIN_NO(14) | 2) 140*b07b6162SHanks Chen #define PINMUX_GPIO14__FUNC_IDDIG (MTK_PIN_NO(14) | 3) 141*b07b6162SHanks Chen #define PINMUX_GPIO14__FUNC_MD_INT0 (MTK_PIN_NO(14) | 4) 142*b07b6162SHanks Chen #define PINMUX_GPIO14__FUNC_PTA_RXD (MTK_PIN_NO(14) | 5) 143*b07b6162SHanks Chen #define PINMUX_GPIO14__FUNC_ANT_SEL11 (MTK_PIN_NO(14) | 6) 144*b07b6162SHanks Chen 145*b07b6162SHanks Chen #define PINMUX_GPIO15__FUNC_GPIO15 (MTK_PIN_NO(15) | 0) 146*b07b6162SHanks Chen #define PINMUX_GPIO15__FUNC_MSDC1_DAT1_A (MTK_PIN_NO(15) | 1) 147*b07b6162SHanks Chen #define PINMUX_GPIO15__FUNC_DVFSRC_EXT_REQ (MTK_PIN_NO(15) | 2) 148*b07b6162SHanks Chen #define PINMUX_GPIO15__FUNC_USB_DRVVBUS (MTK_PIN_NO(15) | 3) 149*b07b6162SHanks Chen #define PINMUX_GPIO15__FUNC_MD_INT1_C2K_UIM0_HOT_PLUG (MTK_PIN_NO(15) | 4) 150*b07b6162SHanks Chen #define PINMUX_GPIO15__FUNC_PTA_TXD (MTK_PIN_NO(15) | 5) 151*b07b6162SHanks Chen #define PINMUX_GPIO15__FUNC_ANT_SEL12 (MTK_PIN_NO(15) | 6) 152*b07b6162SHanks Chen 153*b07b6162SHanks Chen #define PINMUX_GPIO16__FUNC_GPIO16 (MTK_PIN_NO(16) | 0) 154*b07b6162SHanks Chen #define PINMUX_GPIO16__FUNC_SRCLKENAI0 (MTK_PIN_NO(16) | 1) 155*b07b6162SHanks Chen #define PINMUX_GPIO16__FUNC_EXT_FRAME_SYNC (MTK_PIN_NO(16) | 2) 156*b07b6162SHanks Chen #define PINMUX_GPIO16__FUNC_MFG_EJTAG_TRSTN (MTK_PIN_NO(16) | 3) 157*b07b6162SHanks Chen #define PINMUX_GPIO16__FUNC_MD_INT2_C2K_UIM1_HOT_PLUG (MTK_PIN_NO(16) | 4) 158*b07b6162SHanks Chen #define PINMUX_GPIO16__FUNC_CONN_TCXOENA_REQ (MTK_PIN_NO(16) | 5) 159*b07b6162SHanks Chen #define PINMUX_GPIO16__FUNC_PWM_2 (MTK_PIN_NO(16) | 6) 160*b07b6162SHanks Chen #define PINMUX_GPIO16__FUNC_JTRSTN_SEL1 (MTK_PIN_NO(16) | 7) 161*b07b6162SHanks Chen 162*b07b6162SHanks Chen #define PINMUX_GPIO17__FUNC_GPIO17 (MTK_PIN_NO(17) | 0) 163*b07b6162SHanks Chen #define PINMUX_GPIO17__FUNC_SPI0_A_MI (MTK_PIN_NO(17) | 1) 164*b07b6162SHanks Chen #define PINMUX_GPIO17__FUNC_SCP_SPI0_MI (MTK_PIN_NO(17) | 2) 165*b07b6162SHanks Chen #define PINMUX_GPIO17__FUNC_MFG_EJTAG_TDO (MTK_PIN_NO(17) | 3) 166*b07b6162SHanks Chen #define PINMUX_GPIO17__FUNC_DPI_HSYNC (MTK_PIN_NO(17) | 4) 167*b07b6162SHanks Chen #define PINMUX_GPIO17__FUNC_MFG_DFD_JTAG_TDO (MTK_PIN_NO(17) | 5) 168*b07b6162SHanks Chen #define PINMUX_GPIO17__FUNC_DFD_TDO (MTK_PIN_NO(17) | 6) 169*b07b6162SHanks Chen #define PINMUX_GPIO17__FUNC_JTDO_SEL1 (MTK_PIN_NO(17) | 7) 170*b07b6162SHanks Chen 171*b07b6162SHanks Chen #define PINMUX_GPIO18__FUNC_GPIO18 (MTK_PIN_NO(18) | 0) 172*b07b6162SHanks Chen #define PINMUX_GPIO18__FUNC_SPI0_A_MO (MTK_PIN_NO(18) | 1) 173*b07b6162SHanks Chen #define PINMUX_GPIO18__FUNC_SCP_SPI0_MO (MTK_PIN_NO(18) | 2) 174*b07b6162SHanks Chen #define PINMUX_GPIO18__FUNC_MFG_EJTAG_TDI (MTK_PIN_NO(18) | 3) 175*b07b6162SHanks Chen #define PINMUX_GPIO18__FUNC_DPI_VSYNC (MTK_PIN_NO(18) | 4) 176*b07b6162SHanks Chen #define PINMUX_GPIO18__FUNC_MFG_DFD_JTAG_TDI (MTK_PIN_NO(18) | 5) 177*b07b6162SHanks Chen #define PINMUX_GPIO18__FUNC_DFD_TDI (MTK_PIN_NO(18) | 6) 178*b07b6162SHanks Chen #define PINMUX_GPIO18__FUNC_JTDI_SEL1 (MTK_PIN_NO(18) | 7) 179*b07b6162SHanks Chen 180*b07b6162SHanks Chen #define PINMUX_GPIO19__FUNC_GPIO19 (MTK_PIN_NO(19) | 0) 181*b07b6162SHanks Chen #define PINMUX_GPIO19__FUNC_SPI0_A_CSB (MTK_PIN_NO(19) | 1) 182*b07b6162SHanks Chen #define PINMUX_GPIO19__FUNC_SCP_SPI0_CS (MTK_PIN_NO(19) | 2) 183*b07b6162SHanks Chen #define PINMUX_GPIO19__FUNC_MFG_EJTAG_TMS (MTK_PIN_NO(19) | 3) 184*b07b6162SHanks Chen #define PINMUX_GPIO19__FUNC_DPI_DE (MTK_PIN_NO(19) | 4) 185*b07b6162SHanks Chen #define PINMUX_GPIO19__FUNC_MFG_DFD_JTAG_TMS (MTK_PIN_NO(19) | 5) 186*b07b6162SHanks Chen #define PINMUX_GPIO19__FUNC_DFD_TMS (MTK_PIN_NO(19) | 6) 187*b07b6162SHanks Chen #define PINMUX_GPIO19__FUNC_JTMS_SEL1 (MTK_PIN_NO(19) | 7) 188*b07b6162SHanks Chen 189*b07b6162SHanks Chen #define PINMUX_GPIO20__FUNC_GPIO20 (MTK_PIN_NO(20) | 0) 190*b07b6162SHanks Chen #define PINMUX_GPIO20__FUNC_SPI0_A_CLK (MTK_PIN_NO(20) | 1) 191*b07b6162SHanks Chen #define PINMUX_GPIO20__FUNC_SCP_SPI0_CK (MTK_PIN_NO(20) | 2) 192*b07b6162SHanks Chen #define PINMUX_GPIO20__FUNC_MFG_EJTAG_TCK (MTK_PIN_NO(20) | 3) 193*b07b6162SHanks Chen #define PINMUX_GPIO20__FUNC_DPI_CK (MTK_PIN_NO(20) | 4) 194*b07b6162SHanks Chen #define PINMUX_GPIO20__FUNC_MFG_DFD_JTAG_TCK (MTK_PIN_NO(20) | 5) 195*b07b6162SHanks Chen #define PINMUX_GPIO20__FUNC_DFD_TCK_XI (MTK_PIN_NO(20) | 6) 196*b07b6162SHanks Chen #define PINMUX_GPIO20__FUNC_JTCK_SEL1 (MTK_PIN_NO(20) | 7) 197*b07b6162SHanks Chen 198*b07b6162SHanks Chen #define PINMUX_GPIO21__FUNC_GPIO21 (MTK_PIN_NO(21) | 0) 199*b07b6162SHanks Chen #define PINMUX_GPIO21__FUNC_PWM_0 (MTK_PIN_NO(21) | 1) 200*b07b6162SHanks Chen #define PINMUX_GPIO21__FUNC_CMFLASH0 (MTK_PIN_NO(21) | 2) 201*b07b6162SHanks Chen #define PINMUX_GPIO21__FUNC_CMVREF2 (MTK_PIN_NO(21) | 3) 202*b07b6162SHanks Chen #define PINMUX_GPIO21__FUNC_CLKM0 (MTK_PIN_NO(21) | 4) 203*b07b6162SHanks Chen #define PINMUX_GPIO21__FUNC_ANT_SEL9 (MTK_PIN_NO(21) | 5) 204*b07b6162SHanks Chen #define PINMUX_GPIO21__FUNC_CONN_TCXOENA_REQ (MTK_PIN_NO(21) | 6) 205*b07b6162SHanks Chen #define PINMUX_GPIO21__FUNC_DBG_MON_A27 (MTK_PIN_NO(21) | 7) 206*b07b6162SHanks Chen 207*b07b6162SHanks Chen #define PINMUX_GPIO22__FUNC_GPIO22 (MTK_PIN_NO(22) | 0) 208*b07b6162SHanks Chen #define PINMUX_GPIO22__FUNC_PWM_1 (MTK_PIN_NO(22) | 1) 209*b07b6162SHanks Chen #define PINMUX_GPIO22__FUNC_CMFLASH1 (MTK_PIN_NO(22) | 2) 210*b07b6162SHanks Chen #define PINMUX_GPIO22__FUNC_CMVREF3 (MTK_PIN_NO(22) | 3) 211*b07b6162SHanks Chen #define PINMUX_GPIO22__FUNC_CLKM1 (MTK_PIN_NO(22) | 4) 212*b07b6162SHanks Chen #define PINMUX_GPIO22__FUNC_ANT_SEL10 (MTK_PIN_NO(22) | 5) 213*b07b6162SHanks Chen #define PINMUX_GPIO22__FUNC_DBG_MON_A28 (MTK_PIN_NO(22) | 7) 214*b07b6162SHanks Chen 215*b07b6162SHanks Chen #define PINMUX_GPIO23__FUNC_GPIO23 (MTK_PIN_NO(23) | 0) 216*b07b6162SHanks Chen #define PINMUX_GPIO23__FUNC_PWM_2 (MTK_PIN_NO(23) | 1) 217*b07b6162SHanks Chen #define PINMUX_GPIO23__FUNC_CMFLASH2 (MTK_PIN_NO(23) | 2) 218*b07b6162SHanks Chen #define PINMUX_GPIO23__FUNC_CMVREF0 (MTK_PIN_NO(23) | 3) 219*b07b6162SHanks Chen #define PINMUX_GPIO23__FUNC_CLKM2 (MTK_PIN_NO(23) | 4) 220*b07b6162SHanks Chen #define PINMUX_GPIO23__FUNC_ANT_SEL11 (MTK_PIN_NO(23) | 5) 221*b07b6162SHanks Chen #define PINMUX_GPIO23__FUNC_DBG_MON_A29 (MTK_PIN_NO(23) | 7) 222*b07b6162SHanks Chen 223*b07b6162SHanks Chen #define PINMUX_GPIO24__FUNC_GPIO24 (MTK_PIN_NO(24) | 0) 224*b07b6162SHanks Chen #define PINMUX_GPIO24__FUNC_PWM_0 (MTK_PIN_NO(24) | 1) 225*b07b6162SHanks Chen #define PINMUX_GPIO24__FUNC_CMFLASH3 (MTK_PIN_NO(24) | 2) 226*b07b6162SHanks Chen #define PINMUX_GPIO24__FUNC_CMVREF1 (MTK_PIN_NO(24) | 3) 227*b07b6162SHanks Chen #define PINMUX_GPIO24__FUNC_CLKM3 (MTK_PIN_NO(24) | 4) 228*b07b6162SHanks Chen #define PINMUX_GPIO24__FUNC_ANT_SEL12 (MTK_PIN_NO(24) | 5) 229*b07b6162SHanks Chen #define PINMUX_GPIO24__FUNC_DBG_MON_A30 (MTK_PIN_NO(24) | 7) 230*b07b6162SHanks Chen 231*b07b6162SHanks Chen #define PINMUX_GPIO25__FUNC_GPIO25 (MTK_PIN_NO(25) | 0) 232*b07b6162SHanks Chen #define PINMUX_GPIO25__FUNC_SRCLKENAI0 (MTK_PIN_NO(25) | 1) 233*b07b6162SHanks Chen #define PINMUX_GPIO25__FUNC_UCTS0 (MTK_PIN_NO(25) | 2) 234*b07b6162SHanks Chen #define PINMUX_GPIO25__FUNC_SCL8 (MTK_PIN_NO(25) | 3) 235*b07b6162SHanks Chen #define PINMUX_GPIO25__FUNC_CMVREF4 (MTK_PIN_NO(25) | 4) 236*b07b6162SHanks Chen #define PINMUX_GPIO25__FUNC_I2S0_LRCK (MTK_PIN_NO(25) | 5) 237*b07b6162SHanks Chen #define PINMUX_GPIO25__FUNC_CONN_TCXOENA_REQ (MTK_PIN_NO(25) | 6) 238*b07b6162SHanks Chen #define PINMUX_GPIO25__FUNC_DBG_MON_A31 (MTK_PIN_NO(25) | 7) 239*b07b6162SHanks Chen 240*b07b6162SHanks Chen #define PINMUX_GPIO26__FUNC_GPIO26 (MTK_PIN_NO(26) | 0) 241*b07b6162SHanks Chen #define PINMUX_GPIO26__FUNC_PWM_0 (MTK_PIN_NO(26) | 1) 242*b07b6162SHanks Chen #define PINMUX_GPIO26__FUNC_URTS0 (MTK_PIN_NO(26) | 2) 243*b07b6162SHanks Chen #define PINMUX_GPIO26__FUNC_SDA8 (MTK_PIN_NO(26) | 3) 244*b07b6162SHanks Chen #define PINMUX_GPIO26__FUNC_CLKM0 (MTK_PIN_NO(26) | 4) 245*b07b6162SHanks Chen #define PINMUX_GPIO26__FUNC_I2S0_DI (MTK_PIN_NO(26) | 5) 246*b07b6162SHanks Chen #define PINMUX_GPIO26__FUNC_AGPS_SYNC (MTK_PIN_NO(26) | 6) 247*b07b6162SHanks Chen #define PINMUX_GPIO26__FUNC_DBG_MON_A32 (MTK_PIN_NO(26) | 7) 248*b07b6162SHanks Chen 249*b07b6162SHanks Chen #define PINMUX_GPIO27__FUNC_GPIO27 (MTK_PIN_NO(27) | 0) 250*b07b6162SHanks Chen #define PINMUX_GPIO27__FUNC_AP_GOOD (MTK_PIN_NO(27) | 1) 251*b07b6162SHanks Chen 252*b07b6162SHanks Chen #define PINMUX_GPIO28__FUNC_GPIO28 (MTK_PIN_NO(28) | 0) 253*b07b6162SHanks Chen #define PINMUX_GPIO28__FUNC_SCL5 (MTK_PIN_NO(28) | 1) 254*b07b6162SHanks Chen 255*b07b6162SHanks Chen #define PINMUX_GPIO29__FUNC_GPIO29 (MTK_PIN_NO(29) | 0) 256*b07b6162SHanks Chen #define PINMUX_GPIO29__FUNC_SDA5 (MTK_PIN_NO(29) | 1) 257*b07b6162SHanks Chen 258*b07b6162SHanks Chen #define PINMUX_GPIO30__FUNC_GPIO30 (MTK_PIN_NO(30) | 0) 259*b07b6162SHanks Chen #define PINMUX_GPIO30__FUNC_I2S1_MCK (MTK_PIN_NO(30) | 1) 260*b07b6162SHanks Chen #define PINMUX_GPIO30__FUNC_I2S3_MCK (MTK_PIN_NO(30) | 2) 261*b07b6162SHanks Chen #define PINMUX_GPIO30__FUNC_I2S2_MCK (MTK_PIN_NO(30) | 3) 262*b07b6162SHanks Chen #define PINMUX_GPIO30__FUNC_DPI_D0 (MTK_PIN_NO(30) | 4) 263*b07b6162SHanks Chen #define PINMUX_GPIO30__FUNC_SPI4_MI (MTK_PIN_NO(30) | 5) 264*b07b6162SHanks Chen #define PINMUX_GPIO30__FUNC_CONN_MCU_DBGI_N (MTK_PIN_NO(30) | 6) 265*b07b6162SHanks Chen 266*b07b6162SHanks Chen #define PINMUX_GPIO31__FUNC_GPIO31 (MTK_PIN_NO(31) | 0) 267*b07b6162SHanks Chen #define PINMUX_GPIO31__FUNC_I2S1_BCK (MTK_PIN_NO(31) | 1) 268*b07b6162SHanks Chen #define PINMUX_GPIO31__FUNC_I2S3_BCK (MTK_PIN_NO(31) | 2) 269*b07b6162SHanks Chen #define PINMUX_GPIO31__FUNC_I2S2_BCK (MTK_PIN_NO(31) | 3) 270*b07b6162SHanks Chen #define PINMUX_GPIO31__FUNC_DPI_D1 (MTK_PIN_NO(31) | 4) 271*b07b6162SHanks Chen #define PINMUX_GPIO31__FUNC_SPI4_CSB (MTK_PIN_NO(31) | 5) 272*b07b6162SHanks Chen #define PINMUX_GPIO31__FUNC_CONN_MCU_TDO (MTK_PIN_NO(31) | 6) 273*b07b6162SHanks Chen 274*b07b6162SHanks Chen #define PINMUX_GPIO32__FUNC_GPIO32 (MTK_PIN_NO(32) | 0) 275*b07b6162SHanks Chen #define PINMUX_GPIO32__FUNC_I2S1_LRCK (MTK_PIN_NO(32) | 1) 276*b07b6162SHanks Chen #define PINMUX_GPIO32__FUNC_I2S3_LRCK (MTK_PIN_NO(32) | 2) 277*b07b6162SHanks Chen #define PINMUX_GPIO32__FUNC_I2S2_LRCK (MTK_PIN_NO(32) | 3) 278*b07b6162SHanks Chen #define PINMUX_GPIO32__FUNC_DPI_D2 (MTK_PIN_NO(32) | 4) 279*b07b6162SHanks Chen #define PINMUX_GPIO32__FUNC_SPI4_MO (MTK_PIN_NO(32) | 5) 280*b07b6162SHanks Chen #define PINMUX_GPIO32__FUNC_CONN_MCU_TDI (MTK_PIN_NO(32) | 6) 281*b07b6162SHanks Chen 282*b07b6162SHanks Chen #define PINMUX_GPIO33__FUNC_GPIO33 (MTK_PIN_NO(33) | 0) 283*b07b6162SHanks Chen #define PINMUX_GPIO33__FUNC_I2S2_DI (MTK_PIN_NO(33) | 1) 284*b07b6162SHanks Chen #define PINMUX_GPIO33__FUNC_I2S0_DI (MTK_PIN_NO(33) | 2) 285*b07b6162SHanks Chen #define PINMUX_GPIO33__FUNC_I2S5_DO (MTK_PIN_NO(33) | 3) 286*b07b6162SHanks Chen #define PINMUX_GPIO33__FUNC_DPI_D3 (MTK_PIN_NO(33) | 4) 287*b07b6162SHanks Chen #define PINMUX_GPIO33__FUNC_SPI4_CLK (MTK_PIN_NO(33) | 5) 288*b07b6162SHanks Chen #define PINMUX_GPIO33__FUNC_CONN_MCU_TMS (MTK_PIN_NO(33) | 6) 289*b07b6162SHanks Chen 290*b07b6162SHanks Chen #define PINMUX_GPIO34__FUNC_GPIO34 (MTK_PIN_NO(34) | 0) 291*b07b6162SHanks Chen #define PINMUX_GPIO34__FUNC_I2S1_DO (MTK_PIN_NO(34) | 1) 292*b07b6162SHanks Chen #define PINMUX_GPIO34__FUNC_I2S3_DO (MTK_PIN_NO(34) | 2) 293*b07b6162SHanks Chen #define PINMUX_GPIO34__FUNC_I2S2_DI2 (MTK_PIN_NO(34) | 3) 294*b07b6162SHanks Chen #define PINMUX_GPIO34__FUNC_DPI_D4 (MTK_PIN_NO(34) | 4) 295*b07b6162SHanks Chen #define PINMUX_GPIO34__FUNC_AGPS_SYNC (MTK_PIN_NO(34) | 5) 296*b07b6162SHanks Chen #define PINMUX_GPIO34__FUNC_CONN_MCU_TCK (MTK_PIN_NO(34) | 6) 297*b07b6162SHanks Chen 298*b07b6162SHanks Chen #define PINMUX_GPIO35__FUNC_GPIO35 (MTK_PIN_NO(35) | 0) 299*b07b6162SHanks Chen #define PINMUX_GPIO35__FUNC_TDM_LRCK (MTK_PIN_NO(35) | 1) 300*b07b6162SHanks Chen #define PINMUX_GPIO35__FUNC_I2S1_LRCK (MTK_PIN_NO(35) | 2) 301*b07b6162SHanks Chen #define PINMUX_GPIO35__FUNC_I2S5_LRCK (MTK_PIN_NO(35) | 3) 302*b07b6162SHanks Chen #define PINMUX_GPIO35__FUNC_DPI_D5 (MTK_PIN_NO(35) | 4) 303*b07b6162SHanks Chen #define PINMUX_GPIO35__FUNC_SPI5_A_MO (MTK_PIN_NO(35) | 5) 304*b07b6162SHanks Chen #define PINMUX_GPIO35__FUNC_IO_JTAG_TDI (MTK_PIN_NO(35) | 6) 305*b07b6162SHanks Chen #define PINMUX_GPIO35__FUNC_PWM_2 (MTK_PIN_NO(35) | 7) 306*b07b6162SHanks Chen 307*b07b6162SHanks Chen #define PINMUX_GPIO36__FUNC_GPIO36 (MTK_PIN_NO(36) | 0) 308*b07b6162SHanks Chen #define PINMUX_GPIO36__FUNC_TDM_BCK (MTK_PIN_NO(36) | 1) 309*b07b6162SHanks Chen #define PINMUX_GPIO36__FUNC_I2S1_BCK (MTK_PIN_NO(36) | 2) 310*b07b6162SHanks Chen #define PINMUX_GPIO36__FUNC_I2S5_BCK (MTK_PIN_NO(36) | 3) 311*b07b6162SHanks Chen #define PINMUX_GPIO36__FUNC_DPI_D6 (MTK_PIN_NO(36) | 4) 312*b07b6162SHanks Chen #define PINMUX_GPIO36__FUNC_SPI5_A_CSB (MTK_PIN_NO(36) | 5) 313*b07b6162SHanks Chen #define PINMUX_GPIO36__FUNC_IO_JTAG_TRSTN (MTK_PIN_NO(36) | 6) 314*b07b6162SHanks Chen #define PINMUX_GPIO36__FUNC_SRCLKENAI1 (MTK_PIN_NO(36) | 7) 315*b07b6162SHanks Chen 316*b07b6162SHanks Chen #define PINMUX_GPIO37__FUNC_GPIO37 (MTK_PIN_NO(37) | 0) 317*b07b6162SHanks Chen #define PINMUX_GPIO37__FUNC_TDM_MCK (MTK_PIN_NO(37) | 1) 318*b07b6162SHanks Chen #define PINMUX_GPIO37__FUNC_I2S1_MCK (MTK_PIN_NO(37) | 2) 319*b07b6162SHanks Chen #define PINMUX_GPIO37__FUNC_I2S5_MCK (MTK_PIN_NO(37) | 3) 320*b07b6162SHanks Chen #define PINMUX_GPIO37__FUNC_DPI_D7 (MTK_PIN_NO(37) | 4) 321*b07b6162SHanks Chen #define PINMUX_GPIO37__FUNC_SPI5_A_MI (MTK_PIN_NO(37) | 5) 322*b07b6162SHanks Chen #define PINMUX_GPIO37__FUNC_IO_JTAG_TCK (MTK_PIN_NO(37) | 6) 323*b07b6162SHanks Chen #define PINMUX_GPIO37__FUNC_SRCLKENAI0 (MTK_PIN_NO(37) | 7) 324*b07b6162SHanks Chen 325*b07b6162SHanks Chen #define PINMUX_GPIO38__FUNC_GPIO38 (MTK_PIN_NO(38) | 0) 326*b07b6162SHanks Chen #define PINMUX_GPIO38__FUNC_TDM_DATA0 (MTK_PIN_NO(38) | 1) 327*b07b6162SHanks Chen #define PINMUX_GPIO38__FUNC_I2S2_DI (MTK_PIN_NO(38) | 2) 328*b07b6162SHanks Chen #define PINMUX_GPIO38__FUNC_I2S5_DO (MTK_PIN_NO(38) | 3) 329*b07b6162SHanks Chen #define PINMUX_GPIO38__FUNC_DPI_D8 (MTK_PIN_NO(38) | 4) 330*b07b6162SHanks Chen #define PINMUX_GPIO38__FUNC_SPI5_A_CLK (MTK_PIN_NO(38) | 5) 331*b07b6162SHanks Chen #define PINMUX_GPIO38__FUNC_IO_JTAG_TDO (MTK_PIN_NO(38) | 6) 332*b07b6162SHanks Chen #define PINMUX_GPIO38__FUNC_CONN_TCXOENA_REQ (MTK_PIN_NO(38) | 7) 333*b07b6162SHanks Chen 334*b07b6162SHanks Chen #define PINMUX_GPIO39__FUNC_GPIO39 (MTK_PIN_NO(39) | 0) 335*b07b6162SHanks Chen #define PINMUX_GPIO39__FUNC_TDM_DATA1 (MTK_PIN_NO(39) | 1) 336*b07b6162SHanks Chen #define PINMUX_GPIO39__FUNC_I2S1_DO (MTK_PIN_NO(39) | 2) 337*b07b6162SHanks Chen #define PINMUX_GPIO39__FUNC_I2S2_DI2 (MTK_PIN_NO(39) | 3) 338*b07b6162SHanks Chen #define PINMUX_GPIO39__FUNC_DPI_D9 (MTK_PIN_NO(39) | 4) 339*b07b6162SHanks Chen #define PINMUX_GPIO39__FUNC_DVFSRC_EXT_REQ (MTK_PIN_NO(39) | 5) 340*b07b6162SHanks Chen #define PINMUX_GPIO39__FUNC_IO_JTAG_TMS (MTK_PIN_NO(39) | 6) 341*b07b6162SHanks Chen #define PINMUX_GPIO39__FUNC_IDDIG (MTK_PIN_NO(39) | 7) 342*b07b6162SHanks Chen 343*b07b6162SHanks Chen #define PINMUX_GPIO40__FUNC_GPIO40 (MTK_PIN_NO(40) | 0) 344*b07b6162SHanks Chen #define PINMUX_GPIO40__FUNC_TDM_DATA2 (MTK_PIN_NO(40) | 1) 345*b07b6162SHanks Chen #define PINMUX_GPIO40__FUNC_SCL9 (MTK_PIN_NO(40) | 2) 346*b07b6162SHanks Chen #define PINMUX_GPIO40__FUNC_PWM_3 (MTK_PIN_NO(40) | 3) 347*b07b6162SHanks Chen #define PINMUX_GPIO40__FUNC_DPI_D10 (MTK_PIN_NO(40) | 4) 348*b07b6162SHanks Chen #define PINMUX_GPIO40__FUNC_SRCLKENAI0 (MTK_PIN_NO(40) | 5) 349*b07b6162SHanks Chen #define PINMUX_GPIO40__FUNC_DAP_MD32_SWD (MTK_PIN_NO(40) | 6) 350*b07b6162SHanks Chen #define PINMUX_GPIO40__FUNC_USB_DRVVBUS (MTK_PIN_NO(40) | 7) 351*b07b6162SHanks Chen 352*b07b6162SHanks Chen #define PINMUX_GPIO41__FUNC_GPIO41 (MTK_PIN_NO(41) | 0) 353*b07b6162SHanks Chen #define PINMUX_GPIO41__FUNC_TDM_DATA3 (MTK_PIN_NO(41) | 1) 354*b07b6162SHanks Chen #define PINMUX_GPIO41__FUNC_SDA9 (MTK_PIN_NO(41) | 2) 355*b07b6162SHanks Chen #define PINMUX_GPIO41__FUNC_PWM_1 (MTK_PIN_NO(41) | 3) 356*b07b6162SHanks Chen #define PINMUX_GPIO41__FUNC_DPI_D11 (MTK_PIN_NO(41) | 4) 357*b07b6162SHanks Chen #define PINMUX_GPIO41__FUNC_CLKM1 (MTK_PIN_NO(41) | 5) 358*b07b6162SHanks Chen #define PINMUX_GPIO41__FUNC_DAP_MD32_SWCK (MTK_PIN_NO(41) | 6) 359*b07b6162SHanks Chen 360*b07b6162SHanks Chen #define PINMUX_GPIO42__FUNC_GPIO42 (MTK_PIN_NO(42) | 0) 361*b07b6162SHanks Chen #define PINMUX_GPIO42__FUNC_DISP_PWM (MTK_PIN_NO(42) | 1) 362*b07b6162SHanks Chen 363*b07b6162SHanks Chen #define PINMUX_GPIO43__FUNC_GPIO43 (MTK_PIN_NO(43) | 0) 364*b07b6162SHanks Chen #define PINMUX_GPIO43__FUNC_DSI_TE (MTK_PIN_NO(43) | 1) 365*b07b6162SHanks Chen 366*b07b6162SHanks Chen #define PINMUX_GPIO44__FUNC_GPIO44 (MTK_PIN_NO(44) | 0) 367*b07b6162SHanks Chen #define PINMUX_GPIO44__FUNC_LCM_RST (MTK_PIN_NO(44) | 1) 368*b07b6162SHanks Chen 369*b07b6162SHanks Chen #define PINMUX_GPIO45__FUNC_GPIO45 (MTK_PIN_NO(45) | 0) 370*b07b6162SHanks Chen #define PINMUX_GPIO45__FUNC_SCL6 (MTK_PIN_NO(45) | 1) 371*b07b6162SHanks Chen #define PINMUX_GPIO45__FUNC_SCP_SCL0 (MTK_PIN_NO(45) | 2) 372*b07b6162SHanks Chen #define PINMUX_GPIO45__FUNC_SCP_SCL1 (MTK_PIN_NO(45) | 3) 373*b07b6162SHanks Chen #define PINMUX_GPIO45__FUNC_SCL_6306 (MTK_PIN_NO(45) | 4) 374*b07b6162SHanks Chen 375*b07b6162SHanks Chen #define PINMUX_GPIO46__FUNC_GPIO46 (MTK_PIN_NO(46) | 0) 376*b07b6162SHanks Chen #define PINMUX_GPIO46__FUNC_SDA6 (MTK_PIN_NO(46) | 1) 377*b07b6162SHanks Chen #define PINMUX_GPIO46__FUNC_SCP_SDA0 (MTK_PIN_NO(46) | 2) 378*b07b6162SHanks Chen #define PINMUX_GPIO46__FUNC_SCP_SDA1 (MTK_PIN_NO(46) | 3) 379*b07b6162SHanks Chen #define PINMUX_GPIO46__FUNC_SDA_6306 (MTK_PIN_NO(46) | 4) 380*b07b6162SHanks Chen 381*b07b6162SHanks Chen #define PINMUX_GPIO47__FUNC_GPIO47 (MTK_PIN_NO(47) | 0) 382*b07b6162SHanks Chen #define PINMUX_GPIO47__FUNC_SPI1_A_MI (MTK_PIN_NO(47) | 1) 383*b07b6162SHanks Chen #define PINMUX_GPIO47__FUNC_SCP_SPI1_A_MI (MTK_PIN_NO(47) | 2) 384*b07b6162SHanks Chen #define PINMUX_GPIO47__FUNC_KPCOL2 (MTK_PIN_NO(47) | 3) 385*b07b6162SHanks Chen #define PINMUX_GPIO47__FUNC_MD_URXD0 (MTK_PIN_NO(47) | 4) 386*b07b6162SHanks Chen #define PINMUX_GPIO47__FUNC_CONN_UART0_RXD (MTK_PIN_NO(47) | 5) 387*b07b6162SHanks Chen #define PINMUX_GPIO47__FUNC_SSPM_URXD_AO (MTK_PIN_NO(47) | 6) 388*b07b6162SHanks Chen #define PINMUX_GPIO47__FUNC_DBG_MON_B32 (MTK_PIN_NO(47) | 7) 389*b07b6162SHanks Chen 390*b07b6162SHanks Chen #define PINMUX_GPIO48__FUNC_GPIO48 (MTK_PIN_NO(48) | 0) 391*b07b6162SHanks Chen #define PINMUX_GPIO48__FUNC_SPI1_A_CSB (MTK_PIN_NO(48) | 1) 392*b07b6162SHanks Chen #define PINMUX_GPIO48__FUNC_SCP_SPI1_A_CS (MTK_PIN_NO(48) | 2) 393*b07b6162SHanks Chen #define PINMUX_GPIO48__FUNC_KPROW2 (MTK_PIN_NO(48) | 3) 394*b07b6162SHanks Chen #define PINMUX_GPIO48__FUNC_MD_UTXD0 (MTK_PIN_NO(48) | 4) 395*b07b6162SHanks Chen #define PINMUX_GPIO48__FUNC_CONN_UART0_TXD (MTK_PIN_NO(48) | 5) 396*b07b6162SHanks Chen #define PINMUX_GPIO48__FUNC_SSPM_UTXD_AO (MTK_PIN_NO(48) | 6) 397*b07b6162SHanks Chen #define PINMUX_GPIO48__FUNC_DBG_MON_B31 (MTK_PIN_NO(48) | 7) 398*b07b6162SHanks Chen 399*b07b6162SHanks Chen #define PINMUX_GPIO49__FUNC_GPIO49 (MTK_PIN_NO(49) | 0) 400*b07b6162SHanks Chen #define PINMUX_GPIO49__FUNC_SPI1_A_MO (MTK_PIN_NO(49) | 1) 401*b07b6162SHanks Chen #define PINMUX_GPIO49__FUNC_SCP_SPI1_A_MO (MTK_PIN_NO(49) | 2) 402*b07b6162SHanks Chen #define PINMUX_GPIO49__FUNC_UCTS0 (MTK_PIN_NO(49) | 3) 403*b07b6162SHanks Chen #define PINMUX_GPIO49__FUNC_MD_URXD1 (MTK_PIN_NO(49) | 4) 404*b07b6162SHanks Chen #define PINMUX_GPIO49__FUNC_PWM_1 (MTK_PIN_NO(49) | 5) 405*b07b6162SHanks Chen #define PINMUX_GPIO49__FUNC_TP_URXD2_AO (MTK_PIN_NO(49) | 6) 406*b07b6162SHanks Chen #define PINMUX_GPIO49__FUNC_DBG_MON_B30 (MTK_PIN_NO(49) | 7) 407*b07b6162SHanks Chen 408*b07b6162SHanks Chen #define PINMUX_GPIO50__FUNC_GPIO50 (MTK_PIN_NO(50) | 0) 409*b07b6162SHanks Chen #define PINMUX_GPIO50__FUNC_SPI1_A_CLK (MTK_PIN_NO(50) | 1) 410*b07b6162SHanks Chen #define PINMUX_GPIO50__FUNC_SCP_SPI1_A_CK (MTK_PIN_NO(50) | 2) 411*b07b6162SHanks Chen #define PINMUX_GPIO50__FUNC_URTS0 (MTK_PIN_NO(50) | 3) 412*b07b6162SHanks Chen #define PINMUX_GPIO50__FUNC_MD_UTXD1 (MTK_PIN_NO(50) | 4) 413*b07b6162SHanks Chen #define PINMUX_GPIO50__FUNC_WIFI_TXD (MTK_PIN_NO(50) | 5) 414*b07b6162SHanks Chen #define PINMUX_GPIO50__FUNC_TP_UTXD2_AO (MTK_PIN_NO(50) | 6) 415*b07b6162SHanks Chen #define PINMUX_GPIO50__FUNC_DBG_MON_B29 (MTK_PIN_NO(50) | 7) 416*b07b6162SHanks Chen 417*b07b6162SHanks Chen #define PINMUX_GPIO51__FUNC_GPIO51 (MTK_PIN_NO(51) | 0) 418*b07b6162SHanks Chen #define PINMUX_GPIO51__FUNC_SCL0 (MTK_PIN_NO(51) | 1) 419*b07b6162SHanks Chen 420*b07b6162SHanks Chen #define PINMUX_GPIO52__FUNC_GPIO52 (MTK_PIN_NO(52) | 0) 421*b07b6162SHanks Chen #define PINMUX_GPIO52__FUNC_SDA0 (MTK_PIN_NO(52) | 1) 422*b07b6162SHanks Chen 423*b07b6162SHanks Chen #define PINMUX_GPIO53__FUNC_GPIO53 (MTK_PIN_NO(53) | 0) 424*b07b6162SHanks Chen #define PINMUX_GPIO53__FUNC_URXD0 (MTK_PIN_NO(53) | 1) 425*b07b6162SHanks Chen #define PINMUX_GPIO53__FUNC_UTXD0 (MTK_PIN_NO(53) | 2) 426*b07b6162SHanks Chen #define PINMUX_GPIO53__FUNC_MD_URXD0 (MTK_PIN_NO(53) | 3) 427*b07b6162SHanks Chen #define PINMUX_GPIO53__FUNC_MD_URXD1 (MTK_PIN_NO(53) | 4) 428*b07b6162SHanks Chen #define PINMUX_GPIO53__FUNC_SSPM_URXD_AO (MTK_PIN_NO(53) | 5) 429*b07b6162SHanks Chen #define PINMUX_GPIO53__FUNC_CONN_UART0_RXD (MTK_PIN_NO(53) | 7) 430*b07b6162SHanks Chen 431*b07b6162SHanks Chen #define PINMUX_GPIO54__FUNC_GPIO54 (MTK_PIN_NO(54) | 0) 432*b07b6162SHanks Chen #define PINMUX_GPIO54__FUNC_UTXD0 (MTK_PIN_NO(54) | 1) 433*b07b6162SHanks Chen #define PINMUX_GPIO54__FUNC_URXD0 (MTK_PIN_NO(54) | 2) 434*b07b6162SHanks Chen #define PINMUX_GPIO54__FUNC_MD_UTXD0 (MTK_PIN_NO(54) | 3) 435*b07b6162SHanks Chen #define PINMUX_GPIO54__FUNC_MD_UTXD1 (MTK_PIN_NO(54) | 4) 436*b07b6162SHanks Chen #define PINMUX_GPIO54__FUNC_SSPM_UTXD_AO (MTK_PIN_NO(54) | 5) 437*b07b6162SHanks Chen #define PINMUX_GPIO54__FUNC_WIFI_TXD (MTK_PIN_NO(54) | 6) 438*b07b6162SHanks Chen #define PINMUX_GPIO54__FUNC_CONN_UART0_TXD (MTK_PIN_NO(54) | 7) 439*b07b6162SHanks Chen 440*b07b6162SHanks Chen #define PINMUX_GPIO55__FUNC_GPIO55 (MTK_PIN_NO(55) | 0) 441*b07b6162SHanks Chen #define PINMUX_GPIO55__FUNC_SCL3 (MTK_PIN_NO(55) | 1) 442*b07b6162SHanks Chen #define PINMUX_GPIO55__FUNC_SCP_SCL0 (MTK_PIN_NO(55) | 2) 443*b07b6162SHanks Chen #define PINMUX_GPIO55__FUNC_SCP_SCL1 (MTK_PIN_NO(55) | 3) 444*b07b6162SHanks Chen #define PINMUX_GPIO55__FUNC_SCL_6306 (MTK_PIN_NO(55) | 4) 445*b07b6162SHanks Chen 446*b07b6162SHanks Chen #define PINMUX_GPIO56__FUNC_GPIO56 (MTK_PIN_NO(56) | 0) 447*b07b6162SHanks Chen #define PINMUX_GPIO56__FUNC_SDA3 (MTK_PIN_NO(56) | 1) 448*b07b6162SHanks Chen #define PINMUX_GPIO56__FUNC_SCP_SDA0 (MTK_PIN_NO(56) | 2) 449*b07b6162SHanks Chen #define PINMUX_GPIO56__FUNC_SCP_SDA1 (MTK_PIN_NO(56) | 3) 450*b07b6162SHanks Chen #define PINMUX_GPIO56__FUNC_SDA_6306 (MTK_PIN_NO(56) | 4) 451*b07b6162SHanks Chen 452*b07b6162SHanks Chen #define PINMUX_GPIO57__FUNC_GPIO57 (MTK_PIN_NO(57) | 0) 453*b07b6162SHanks Chen #define PINMUX_GPIO57__FUNC_KPROW1 (MTK_PIN_NO(57) | 1) 454*b07b6162SHanks Chen #define PINMUX_GPIO57__FUNC_PWM_1 (MTK_PIN_NO(57) | 2) 455*b07b6162SHanks Chen #define PINMUX_GPIO57__FUNC_DVFSRC_EXT_REQ (MTK_PIN_NO(57) | 3) 456*b07b6162SHanks Chen #define PINMUX_GPIO57__FUNC_CLKM1 (MTK_PIN_NO(57) | 4) 457*b07b6162SHanks Chen #define PINMUX_GPIO57__FUNC_IDDIG (MTK_PIN_NO(57) | 5) 458*b07b6162SHanks Chen #define PINMUX_GPIO57__FUNC_CONN_TCXOENA_REQ (MTK_PIN_NO(57) | 6) 459*b07b6162SHanks Chen #define PINMUX_GPIO57__FUNC_MBISTREADEN_TRIGGER (MTK_PIN_NO(57) | 7) 460*b07b6162SHanks Chen 461*b07b6162SHanks Chen #define PINMUX_GPIO58__FUNC_GPIO58 (MTK_PIN_NO(58) | 0) 462*b07b6162SHanks Chen #define PINMUX_GPIO58__FUNC_KPROW0 (MTK_PIN_NO(58) | 1) 463*b07b6162SHanks Chen #define PINMUX_GPIO58__FUNC_DBG_MON_B28 (MTK_PIN_NO(58) | 7) 464*b07b6162SHanks Chen 465*b07b6162SHanks Chen #define PINMUX_GPIO59__FUNC_GPIO59 (MTK_PIN_NO(59) | 0) 466*b07b6162SHanks Chen #define PINMUX_GPIO59__FUNC_KPCOL0 (MTK_PIN_NO(59) | 1) 467*b07b6162SHanks Chen #define PINMUX_GPIO59__FUNC_DBG_MON_B27 (MTK_PIN_NO(59) | 7) 468*b07b6162SHanks Chen 469*b07b6162SHanks Chen #define PINMUX_GPIO60__FUNC_GPIO60 (MTK_PIN_NO(60) | 0) 470*b07b6162SHanks Chen #define PINMUX_GPIO60__FUNC_KPCOL1 (MTK_PIN_NO(60) | 1) 471*b07b6162SHanks Chen #define PINMUX_GPIO60__FUNC_PWM_2 (MTK_PIN_NO(60) | 2) 472*b07b6162SHanks Chen #define PINMUX_GPIO60__FUNC_UCTS1 (MTK_PIN_NO(60) | 3) 473*b07b6162SHanks Chen #define PINMUX_GPIO60__FUNC_CLKM2 (MTK_PIN_NO(60) | 4) 474*b07b6162SHanks Chen #define PINMUX_GPIO60__FUNC_USB_DRVVBUS (MTK_PIN_NO(60) | 5) 475*b07b6162SHanks Chen #define PINMUX_GPIO60__FUNC_MBISTWRITEEN_TRIGGER (MTK_PIN_NO(60) | 7) 476*b07b6162SHanks Chen 477*b07b6162SHanks Chen #define PINMUX_GPIO61__FUNC_GPIO61 (MTK_PIN_NO(61) | 0) 478*b07b6162SHanks Chen #define PINMUX_GPIO61__FUNC_SCL1 (MTK_PIN_NO(61) | 1) 479*b07b6162SHanks Chen #define PINMUX_GPIO61__FUNC_SCP_SCL0 (MTK_PIN_NO(61) | 2) 480*b07b6162SHanks Chen #define PINMUX_GPIO61__FUNC_SCP_SCL1 (MTK_PIN_NO(61) | 3) 481*b07b6162SHanks Chen 482*b07b6162SHanks Chen #define PINMUX_GPIO62__FUNC_GPIO62 (MTK_PIN_NO(62) | 0) 483*b07b6162SHanks Chen #define PINMUX_GPIO62__FUNC_SDA1 (MTK_PIN_NO(62) | 1) 484*b07b6162SHanks Chen #define PINMUX_GPIO62__FUNC_SCP_SDA0 (MTK_PIN_NO(62) | 2) 485*b07b6162SHanks Chen #define PINMUX_GPIO62__FUNC_SCP_SDA1 (MTK_PIN_NO(62) | 3) 486*b07b6162SHanks Chen 487*b07b6162SHanks Chen #define PINMUX_GPIO63__FUNC_GPIO63 (MTK_PIN_NO(63) | 0) 488*b07b6162SHanks Chen #define PINMUX_GPIO63__FUNC_SPI2_MI (MTK_PIN_NO(63) | 1) 489*b07b6162SHanks Chen #define PINMUX_GPIO63__FUNC_SCP_SPI2_MI (MTK_PIN_NO(63) | 2) 490*b07b6162SHanks Chen #define PINMUX_GPIO63__FUNC_KPCOL2 (MTK_PIN_NO(63) | 3) 491*b07b6162SHanks Chen #define PINMUX_GPIO63__FUNC_MRG_DI (MTK_PIN_NO(63) | 4) 492*b07b6162SHanks Chen #define PINMUX_GPIO63__FUNC_MD_URXD0 (MTK_PIN_NO(63) | 5) 493*b07b6162SHanks Chen #define PINMUX_GPIO63__FUNC_CONN_UART0_RXD (MTK_PIN_NO(63) | 6) 494*b07b6162SHanks Chen #define PINMUX_GPIO63__FUNC_DBG_MON_B26 (MTK_PIN_NO(63) | 7) 495*b07b6162SHanks Chen 496*b07b6162SHanks Chen #define PINMUX_GPIO64__FUNC_GPIO64 (MTK_PIN_NO(64) | 0) 497*b07b6162SHanks Chen #define PINMUX_GPIO64__FUNC_SPI2_CSB (MTK_PIN_NO(64) | 1) 498*b07b6162SHanks Chen #define PINMUX_GPIO64__FUNC_SCP_SPI2_CS (MTK_PIN_NO(64) | 2) 499*b07b6162SHanks Chen #define PINMUX_GPIO64__FUNC_KPROW2 (MTK_PIN_NO(64) | 3) 500*b07b6162SHanks Chen #define PINMUX_GPIO64__FUNC_MRG_SYNC (MTK_PIN_NO(64) | 4) 501*b07b6162SHanks Chen #define PINMUX_GPIO64__FUNC_MD_UTXD0 (MTK_PIN_NO(64) | 5) 502*b07b6162SHanks Chen #define PINMUX_GPIO64__FUNC_CONN_UART0_TXD (MTK_PIN_NO(64) | 6) 503*b07b6162SHanks Chen #define PINMUX_GPIO64__FUNC_DBG_MON_B25 (MTK_PIN_NO(64) | 7) 504*b07b6162SHanks Chen 505*b07b6162SHanks Chen #define PINMUX_GPIO65__FUNC_GPIO65 (MTK_PIN_NO(65) | 0) 506*b07b6162SHanks Chen #define PINMUX_GPIO65__FUNC_SPI2_MO (MTK_PIN_NO(65) | 1) 507*b07b6162SHanks Chen #define PINMUX_GPIO65__FUNC_SCP_SPI2_MO (MTK_PIN_NO(65) | 2) 508*b07b6162SHanks Chen #define PINMUX_GPIO65__FUNC_SCP_SDA1 (MTK_PIN_NO(65) | 3) 509*b07b6162SHanks Chen #define PINMUX_GPIO65__FUNC_MRG_DO (MTK_PIN_NO(65) | 4) 510*b07b6162SHanks Chen #define PINMUX_GPIO65__FUNC_MD_URXD1 (MTK_PIN_NO(65) | 5) 511*b07b6162SHanks Chen #define PINMUX_GPIO65__FUNC_PWM_3 (MTK_PIN_NO(65) | 6) 512*b07b6162SHanks Chen 513*b07b6162SHanks Chen #define PINMUX_GPIO66__FUNC_GPIO66 (MTK_PIN_NO(66) | 0) 514*b07b6162SHanks Chen #define PINMUX_GPIO66__FUNC_SPI2_CLK (MTK_PIN_NO(66) | 1) 515*b07b6162SHanks Chen #define PINMUX_GPIO66__FUNC_SCP_SPI2_CK (MTK_PIN_NO(66) | 2) 516*b07b6162SHanks Chen #define PINMUX_GPIO66__FUNC_SCP_SCL1 (MTK_PIN_NO(66) | 3) 517*b07b6162SHanks Chen #define PINMUX_GPIO66__FUNC_MRG_CLK (MTK_PIN_NO(66) | 4) 518*b07b6162SHanks Chen #define PINMUX_GPIO66__FUNC_MD_UTXD1 (MTK_PIN_NO(66) | 5) 519*b07b6162SHanks Chen #define PINMUX_GPIO66__FUNC_WIFI_TXD (MTK_PIN_NO(66) | 6) 520*b07b6162SHanks Chen 521*b07b6162SHanks Chen #define PINMUX_GPIO67__FUNC_GPIO67 (MTK_PIN_NO(67) | 0) 522*b07b6162SHanks Chen #define PINMUX_GPIO67__FUNC_I2S3_LRCK (MTK_PIN_NO(67) | 1) 523*b07b6162SHanks Chen #define PINMUX_GPIO67__FUNC_I2S1_LRCK (MTK_PIN_NO(67) | 2) 524*b07b6162SHanks Chen #define PINMUX_GPIO67__FUNC_URXD1 (MTK_PIN_NO(67) | 3) 525*b07b6162SHanks Chen #define PINMUX_GPIO67__FUNC_PCM0_SYNC (MTK_PIN_NO(67) | 4) 526*b07b6162SHanks Chen #define PINMUX_GPIO67__FUNC_I2S5_LRCK (MTK_PIN_NO(67) | 5) 527*b07b6162SHanks Chen #define PINMUX_GPIO67__FUNC_ANT_SEL9 (MTK_PIN_NO(67) | 6) 528*b07b6162SHanks Chen #define PINMUX_GPIO67__FUNC_DBG_MON_B10 (MTK_PIN_NO(67) | 7) 529*b07b6162SHanks Chen 530*b07b6162SHanks Chen #define PINMUX_GPIO68__FUNC_GPIO68 (MTK_PIN_NO(68) | 0) 531*b07b6162SHanks Chen #define PINMUX_GPIO68__FUNC_I2S3_DO (MTK_PIN_NO(68) | 1) 532*b07b6162SHanks Chen #define PINMUX_GPIO68__FUNC_I2S1_DO (MTK_PIN_NO(68) | 2) 533*b07b6162SHanks Chen #define PINMUX_GPIO68__FUNC_UTXD1 (MTK_PIN_NO(68) | 3) 534*b07b6162SHanks Chen #define PINMUX_GPIO68__FUNC_PCM0_DO (MTK_PIN_NO(68) | 4) 535*b07b6162SHanks Chen #define PINMUX_GPIO68__FUNC_I2S5_DO (MTK_PIN_NO(68) | 5) 536*b07b6162SHanks Chen #define PINMUX_GPIO68__FUNC_ANT_SEL10 (MTK_PIN_NO(68) | 6) 537*b07b6162SHanks Chen #define PINMUX_GPIO68__FUNC_DBG_MON_B9 (MTK_PIN_NO(68) | 7) 538*b07b6162SHanks Chen 539*b07b6162SHanks Chen #define PINMUX_GPIO69__FUNC_GPIO69 (MTK_PIN_NO(69) | 0) 540*b07b6162SHanks Chen #define PINMUX_GPIO69__FUNC_I2S3_MCK (MTK_PIN_NO(69) | 1) 541*b07b6162SHanks Chen #define PINMUX_GPIO69__FUNC_I2S1_MCK (MTK_PIN_NO(69) | 2) 542*b07b6162SHanks Chen #define PINMUX_GPIO69__FUNC_URTS1 (MTK_PIN_NO(69) | 3) 543*b07b6162SHanks Chen #define PINMUX_GPIO69__FUNC_AGPS_SYNC (MTK_PIN_NO(69) | 4) 544*b07b6162SHanks Chen #define PINMUX_GPIO69__FUNC_I2S5_MCK (MTK_PIN_NO(69) | 5) 545*b07b6162SHanks Chen #define PINMUX_GPIO69__FUNC_DVFSRC_EXT_REQ (MTK_PIN_NO(69) | 6) 546*b07b6162SHanks Chen #define PINMUX_GPIO69__FUNC_DBG_MON_B8 (MTK_PIN_NO(69) | 7) 547*b07b6162SHanks Chen 548*b07b6162SHanks Chen #define PINMUX_GPIO70__FUNC_GPIO70 (MTK_PIN_NO(70) | 0) 549*b07b6162SHanks Chen #define PINMUX_GPIO70__FUNC_I2S0_DI (MTK_PIN_NO(70) | 1) 550*b07b6162SHanks Chen #define PINMUX_GPIO70__FUNC_I2S2_DI (MTK_PIN_NO(70) | 2) 551*b07b6162SHanks Chen #define PINMUX_GPIO70__FUNC_KPCOL2 (MTK_PIN_NO(70) | 3) 552*b07b6162SHanks Chen #define PINMUX_GPIO70__FUNC_PCM0_DI (MTK_PIN_NO(70) | 4) 553*b07b6162SHanks Chen #define PINMUX_GPIO70__FUNC_I2S2_DI2 (MTK_PIN_NO(70) | 5) 554*b07b6162SHanks Chen #define PINMUX_GPIO70__FUNC_ANT_SEL11 (MTK_PIN_NO(70) | 6) 555*b07b6162SHanks Chen #define PINMUX_GPIO70__FUNC_DBG_MON_B7 (MTK_PIN_NO(70) | 7) 556*b07b6162SHanks Chen 557*b07b6162SHanks Chen #define PINMUX_GPIO71__FUNC_GPIO71 (MTK_PIN_NO(71) | 0) 558*b07b6162SHanks Chen #define PINMUX_GPIO71__FUNC_I2S3_BCK (MTK_PIN_NO(71) | 1) 559*b07b6162SHanks Chen #define PINMUX_GPIO71__FUNC_I2S1_BCK (MTK_PIN_NO(71) | 2) 560*b07b6162SHanks Chen #define PINMUX_GPIO71__FUNC_KPROW2 (MTK_PIN_NO(71) | 3) 561*b07b6162SHanks Chen #define PINMUX_GPIO71__FUNC_PCM0_CLK (MTK_PIN_NO(71) | 4) 562*b07b6162SHanks Chen #define PINMUX_GPIO71__FUNC_I2S5_BCK (MTK_PIN_NO(71) | 5) 563*b07b6162SHanks Chen #define PINMUX_GPIO71__FUNC_ANT_SEL12 (MTK_PIN_NO(71) | 6) 564*b07b6162SHanks Chen #define PINMUX_GPIO71__FUNC_DBG_MON_B6 (MTK_PIN_NO(71) | 7) 565*b07b6162SHanks Chen 566*b07b6162SHanks Chen #define PINMUX_GPIO72__FUNC_GPIO72 (MTK_PIN_NO(72) | 0) 567*b07b6162SHanks Chen #define PINMUX_GPIO72__FUNC_BPI_BUS19_OLAT0 (MTK_PIN_NO(72) | 1) 568*b07b6162SHanks Chen #define PINMUX_GPIO72__FUNC_CONN_BPI_BUS19_OLAT0 (MTK_PIN_NO(72) | 2) 569*b07b6162SHanks Chen 570*b07b6162SHanks Chen #define PINMUX_GPIO73__FUNC_GPIO73 (MTK_PIN_NO(73) | 0) 571*b07b6162SHanks Chen #define PINMUX_GPIO73__FUNC_BPI_BUS18_PA_VM1 (MTK_PIN_NO(73) | 1) 572*b07b6162SHanks Chen #define PINMUX_GPIO73__FUNC_CONN_MIPI5_SCLK (MTK_PIN_NO(73) | 2) 573*b07b6162SHanks Chen #define PINMUX_GPIO73__FUNC_MIPI5_SCLK (MTK_PIN_NO(73) | 3) 574*b07b6162SHanks Chen 575*b07b6162SHanks Chen #define PINMUX_GPIO74__FUNC_GPIO74 (MTK_PIN_NO(74) | 0) 576*b07b6162SHanks Chen #define PINMUX_GPIO74__FUNC_BPI_BUS17_PA_VM0 (MTK_PIN_NO(74) | 1) 577*b07b6162SHanks Chen #define PINMUX_GPIO74__FUNC_CONN_MIPI5_SDATA (MTK_PIN_NO(74) | 2) 578*b07b6162SHanks Chen #define PINMUX_GPIO74__FUNC_MIPI5_SDATA (MTK_PIN_NO(74) | 3) 579*b07b6162SHanks Chen 580*b07b6162SHanks Chen #define PINMUX_GPIO75__FUNC_GPIO75 (MTK_PIN_NO(75) | 0) 581*b07b6162SHanks Chen #define PINMUX_GPIO75__FUNC_BPI_BUS20_OLAT1 (MTK_PIN_NO(75) | 1) 582*b07b6162SHanks Chen #define PINMUX_GPIO75__FUNC_CONN_BPI_BUS20_OLAT1 (MTK_PIN_NO(75) | 2) 583*b07b6162SHanks Chen #define PINMUX_GPIO75__FUNC_RFIC0_BSI_D2 (MTK_PIN_NO(75) | 3) 584*b07b6162SHanks Chen 585*b07b6162SHanks Chen #define PINMUX_GPIO76__FUNC_GPIO76 (MTK_PIN_NO(76) | 0) 586*b07b6162SHanks Chen #define PINMUX_GPIO76__FUNC_RFIC0_BSI_D1 (MTK_PIN_NO(76) | 1) 587*b07b6162SHanks Chen 588*b07b6162SHanks Chen #define PINMUX_GPIO77__FUNC_GPIO77 (MTK_PIN_NO(77) | 0) 589*b07b6162SHanks Chen #define PINMUX_GPIO77__FUNC_RFIC0_BSI_D0 (MTK_PIN_NO(77) | 1) 590*b07b6162SHanks Chen 591*b07b6162SHanks Chen #define PINMUX_GPIO78__FUNC_GPIO78 (MTK_PIN_NO(78) | 0) 592*b07b6162SHanks Chen #define PINMUX_GPIO78__FUNC_BPI_BUS7 (MTK_PIN_NO(78) | 1) 593*b07b6162SHanks Chen #define PINMUX_GPIO78__FUNC_DBG_MON_B24 (MTK_PIN_NO(78) | 7) 594*b07b6162SHanks Chen 595*b07b6162SHanks Chen #define PINMUX_GPIO79__FUNC_GPIO79 (MTK_PIN_NO(79) | 0) 596*b07b6162SHanks Chen #define PINMUX_GPIO79__FUNC_BPI_BUS6 (MTK_PIN_NO(79) | 1) 597*b07b6162SHanks Chen #define PINMUX_GPIO79__FUNC_DBG_MON_B23 (MTK_PIN_NO(79) | 7) 598*b07b6162SHanks Chen 599*b07b6162SHanks Chen #define PINMUX_GPIO80__FUNC_GPIO80 (MTK_PIN_NO(80) | 0) 600*b07b6162SHanks Chen #define PINMUX_GPIO80__FUNC_BPI_BUS8 (MTK_PIN_NO(80) | 1) 601*b07b6162SHanks Chen #define PINMUX_GPIO80__FUNC_DBG_MON_B22 (MTK_PIN_NO(80) | 7) 602*b07b6162SHanks Chen 603*b07b6162SHanks Chen #define PINMUX_GPIO81__FUNC_GPIO81 (MTK_PIN_NO(81) | 0) 604*b07b6162SHanks Chen #define PINMUX_GPIO81__FUNC_BPI_BUS9 (MTK_PIN_NO(81) | 1) 605*b07b6162SHanks Chen #define PINMUX_GPIO81__FUNC_DBG_MON_B21 (MTK_PIN_NO(81) | 7) 606*b07b6162SHanks Chen 607*b07b6162SHanks Chen #define PINMUX_GPIO82__FUNC_GPIO82 (MTK_PIN_NO(82) | 0) 608*b07b6162SHanks Chen #define PINMUX_GPIO82__FUNC_BPI_BUS10 (MTK_PIN_NO(82) | 1) 609*b07b6162SHanks Chen #define PINMUX_GPIO82__FUNC_DBG_MON_B20 (MTK_PIN_NO(82) | 7) 610*b07b6162SHanks Chen 611*b07b6162SHanks Chen #define PINMUX_GPIO83__FUNC_GPIO83 (MTK_PIN_NO(83) | 0) 612*b07b6162SHanks Chen #define PINMUX_GPIO83__FUNC_BPI_BUS11 (MTK_PIN_NO(83) | 1) 613*b07b6162SHanks Chen #define PINMUX_GPIO83__FUNC_DBG_MON_B19 (MTK_PIN_NO(83) | 7) 614*b07b6162SHanks Chen 615*b07b6162SHanks Chen #define PINMUX_GPIO84__FUNC_GPIO84 (MTK_PIN_NO(84) | 0) 616*b07b6162SHanks Chen #define PINMUX_GPIO84__FUNC_BPI_BUS12 (MTK_PIN_NO(84) | 1) 617*b07b6162SHanks Chen #define PINMUX_GPIO84__FUNC_CONN_BPI_BUS12 (MTK_PIN_NO(84) | 2) 618*b07b6162SHanks Chen 619*b07b6162SHanks Chen #define PINMUX_GPIO85__FUNC_GPIO85 (MTK_PIN_NO(85) | 0) 620*b07b6162SHanks Chen #define PINMUX_GPIO85__FUNC_BPI_BUS13 (MTK_PIN_NO(85) | 1) 621*b07b6162SHanks Chen #define PINMUX_GPIO85__FUNC_CONN_BPI_BUS13 (MTK_PIN_NO(85) | 2) 622*b07b6162SHanks Chen 623*b07b6162SHanks Chen #define PINMUX_GPIO86__FUNC_GPIO86 (MTK_PIN_NO(86) | 0) 624*b07b6162SHanks Chen #define PINMUX_GPIO86__FUNC_BPI_BUS14 (MTK_PIN_NO(86) | 1) 625*b07b6162SHanks Chen #define PINMUX_GPIO86__FUNC_CONN_BPI_BUS14 (MTK_PIN_NO(86) | 2) 626*b07b6162SHanks Chen 627*b07b6162SHanks Chen #define PINMUX_GPIO87__FUNC_GPIO87 (MTK_PIN_NO(87) | 0) 628*b07b6162SHanks Chen #define PINMUX_GPIO87__FUNC_BPI_BUS15 (MTK_PIN_NO(87) | 1) 629*b07b6162SHanks Chen #define PINMUX_GPIO87__FUNC_CONN_BPI_BUS15 (MTK_PIN_NO(87) | 2) 630*b07b6162SHanks Chen 631*b07b6162SHanks Chen #define PINMUX_GPIO88__FUNC_GPIO88 (MTK_PIN_NO(88) | 0) 632*b07b6162SHanks Chen #define PINMUX_GPIO88__FUNC_BPI_BUS16 (MTK_PIN_NO(88) | 1) 633*b07b6162SHanks Chen #define PINMUX_GPIO88__FUNC_CONN_BPI_BUS16 (MTK_PIN_NO(88) | 2) 634*b07b6162SHanks Chen 635*b07b6162SHanks Chen #define PINMUX_GPIO89__FUNC_GPIO89 (MTK_PIN_NO(89) | 0) 636*b07b6162SHanks Chen #define PINMUX_GPIO89__FUNC_BPI_BUS5 (MTK_PIN_NO(89) | 1) 637*b07b6162SHanks Chen #define PINMUX_GPIO89__FUNC_DBG_MON_B18 (MTK_PIN_NO(89) | 7) 638*b07b6162SHanks Chen 639*b07b6162SHanks Chen #define PINMUX_GPIO90__FUNC_GPIO90 (MTK_PIN_NO(90) | 0) 640*b07b6162SHanks Chen #define PINMUX_GPIO90__FUNC_BPI_BUS4 (MTK_PIN_NO(90) | 1) 641*b07b6162SHanks Chen #define PINMUX_GPIO90__FUNC_DBG_MON_B17 (MTK_PIN_NO(90) | 7) 642*b07b6162SHanks Chen 643*b07b6162SHanks Chen #define PINMUX_GPIO91__FUNC_GPIO91 (MTK_PIN_NO(91) | 0) 644*b07b6162SHanks Chen #define PINMUX_GPIO91__FUNC_BPI_BUS3 (MTK_PIN_NO(91) | 1) 645*b07b6162SHanks Chen 646*b07b6162SHanks Chen #define PINMUX_GPIO92__FUNC_GPIO92 (MTK_PIN_NO(92) | 0) 647*b07b6162SHanks Chen #define PINMUX_GPIO92__FUNC_BPI_BUS2 (MTK_PIN_NO(92) | 1) 648*b07b6162SHanks Chen #define PINMUX_GPIO92__FUNC_DBG_MON_B16 (MTK_PIN_NO(92) | 7) 649*b07b6162SHanks Chen 650*b07b6162SHanks Chen #define PINMUX_GPIO93__FUNC_GPIO93 (MTK_PIN_NO(93) | 0) 651*b07b6162SHanks Chen #define PINMUX_GPIO93__FUNC_BPI_BUS1 (MTK_PIN_NO(93) | 1) 652*b07b6162SHanks Chen 653*b07b6162SHanks Chen #define PINMUX_GPIO94__FUNC_GPIO94 (MTK_PIN_NO(94) | 0) 654*b07b6162SHanks Chen #define PINMUX_GPIO94__FUNC_BPI_BUS0 (MTK_PIN_NO(94) | 1) 655*b07b6162SHanks Chen #define PINMUX_GPIO94__FUNC_DBG_MON_B15 (MTK_PIN_NO(94) | 7) 656*b07b6162SHanks Chen 657*b07b6162SHanks Chen #define PINMUX_GPIO95__FUNC_GPIO95 (MTK_PIN_NO(95) | 0) 658*b07b6162SHanks Chen #define PINMUX_GPIO95__FUNC_MIPI0_SDATA (MTK_PIN_NO(95) | 1) 659*b07b6162SHanks Chen 660*b07b6162SHanks Chen #define PINMUX_GPIO96__FUNC_GPIO96 (MTK_PIN_NO(96) | 0) 661*b07b6162SHanks Chen #define PINMUX_GPIO96__FUNC_MIPI0_SCLK (MTK_PIN_NO(96) | 1) 662*b07b6162SHanks Chen 663*b07b6162SHanks Chen #define PINMUX_GPIO97__FUNC_GPIO97 (MTK_PIN_NO(97) | 0) 664*b07b6162SHanks Chen #define PINMUX_GPIO97__FUNC_MIPI1_SDATA (MTK_PIN_NO(97) | 1) 665*b07b6162SHanks Chen 666*b07b6162SHanks Chen #define PINMUX_GPIO98__FUNC_GPIO98 (MTK_PIN_NO(98) | 0) 667*b07b6162SHanks Chen #define PINMUX_GPIO98__FUNC_MIPI1_SCLK (MTK_PIN_NO(98) | 1) 668*b07b6162SHanks Chen 669*b07b6162SHanks Chen #define PINMUX_GPIO99__FUNC_GPIO99 (MTK_PIN_NO(99) | 0) 670*b07b6162SHanks Chen #define PINMUX_GPIO99__FUNC_MIPI2_SCLK (MTK_PIN_NO(99) | 1) 671*b07b6162SHanks Chen #define PINMUX_GPIO99__FUNC_DBG_MON_B14 (MTK_PIN_NO(99) | 7) 672*b07b6162SHanks Chen 673*b07b6162SHanks Chen #define PINMUX_GPIO100__FUNC_GPIO100 (MTK_PIN_NO(100) | 0) 674*b07b6162SHanks Chen #define PINMUX_GPIO100__FUNC_MIPI2_SDATA (MTK_PIN_NO(100) | 1) 675*b07b6162SHanks Chen #define PINMUX_GPIO100__FUNC_DBG_MON_B13 (MTK_PIN_NO(100) | 7) 676*b07b6162SHanks Chen 677*b07b6162SHanks Chen #define PINMUX_GPIO101__FUNC_GPIO101 (MTK_PIN_NO(101) | 0) 678*b07b6162SHanks Chen #define PINMUX_GPIO101__FUNC_MIPI3_SCLK (MTK_PIN_NO(101) | 1) 679*b07b6162SHanks Chen #define PINMUX_GPIO101__FUNC_DBG_MON_B12 (MTK_PIN_NO(101) | 7) 680*b07b6162SHanks Chen 681*b07b6162SHanks Chen #define PINMUX_GPIO102__FUNC_GPIO102 (MTK_PIN_NO(102) | 0) 682*b07b6162SHanks Chen #define PINMUX_GPIO102__FUNC_MIPI3_SDATA (MTK_PIN_NO(102) | 1) 683*b07b6162SHanks Chen #define PINMUX_GPIO102__FUNC_DBG_MON_B11 (MTK_PIN_NO(102) | 7) 684*b07b6162SHanks Chen 685*b07b6162SHanks Chen #define PINMUX_GPIO103__FUNC_GPIO103 (MTK_PIN_NO(103) | 0) 686*b07b6162SHanks Chen #define PINMUX_GPIO103__FUNC_MIPI4_SCLK (MTK_PIN_NO(103) | 1) 687*b07b6162SHanks Chen #define PINMUX_GPIO103__FUNC_CONN_MIPI4_SCLK (MTK_PIN_NO(103) | 2) 688*b07b6162SHanks Chen 689*b07b6162SHanks Chen #define PINMUX_GPIO104__FUNC_GPIO104 (MTK_PIN_NO(104) | 0) 690*b07b6162SHanks Chen #define PINMUX_GPIO104__FUNC_MIPI4_SDATA (MTK_PIN_NO(104) | 1) 691*b07b6162SHanks Chen #define PINMUX_GPIO104__FUNC_CONN_MIPI4_SDATA (MTK_PIN_NO(104) | 2) 692*b07b6162SHanks Chen 693*b07b6162SHanks Chen #define PINMUX_GPIO105__FUNC_GPIO105 (MTK_PIN_NO(105) | 0) 694*b07b6162SHanks Chen #define PINMUX_GPIO105__FUNC_BPI_BUS22_OLAT3 (MTK_PIN_NO(105) | 1) 695*b07b6162SHanks Chen #define PINMUX_GPIO105__FUNC_CONN_BPI_BUS22_OLAT3 (MTK_PIN_NO(105) | 2) 696*b07b6162SHanks Chen 697*b07b6162SHanks Chen #define PINMUX_GPIO106__FUNC_GPIO106 (MTK_PIN_NO(106) | 0) 698*b07b6162SHanks Chen #define PINMUX_GPIO106__FUNC_BPI_BUS21_OLAT2 (MTK_PIN_NO(106) | 1) 699*b07b6162SHanks Chen #define PINMUX_GPIO106__FUNC_CONN_BPI_BUS21_OLAT2 (MTK_PIN_NO(106) | 2) 700*b07b6162SHanks Chen 701*b07b6162SHanks Chen #define PINMUX_GPIO107__FUNC_GPIO107 (MTK_PIN_NO(107) | 0) 702*b07b6162SHanks Chen #define PINMUX_GPIO107__FUNC_BPI_BUS24_ANT1 (MTK_PIN_NO(107) | 1) 703*b07b6162SHanks Chen #define PINMUX_GPIO107__FUNC_CONN_BPI_BUS24_ANT1 (MTK_PIN_NO(107) | 2) 704*b07b6162SHanks Chen 705*b07b6162SHanks Chen #define PINMUX_GPIO108__FUNC_GPIO108 (MTK_PIN_NO(108) | 0) 706*b07b6162SHanks Chen #define PINMUX_GPIO108__FUNC_BPI_BUS25_ANT2 (MTK_PIN_NO(108) | 1) 707*b07b6162SHanks Chen #define PINMUX_GPIO108__FUNC_CONN_BPI_BUS25_ANT2 (MTK_PIN_NO(108) | 2) 708*b07b6162SHanks Chen 709*b07b6162SHanks Chen #define PINMUX_GPIO109__FUNC_GPIO109 (MTK_PIN_NO(109) | 0) 710*b07b6162SHanks Chen #define PINMUX_GPIO109__FUNC_BPI_BUS23_ANT0 (MTK_PIN_NO(109) | 1) 711*b07b6162SHanks Chen #define PINMUX_GPIO109__FUNC_CONN_BPI_BUS23_ANT0 (MTK_PIN_NO(109) | 2) 712*b07b6162SHanks Chen 713*b07b6162SHanks Chen #define PINMUX_GPIO110__FUNC_GPIO110 (MTK_PIN_NO(110) | 0) 714*b07b6162SHanks Chen #define PINMUX_GPIO110__FUNC_SCL4 (MTK_PIN_NO(110) | 1) 715*b07b6162SHanks Chen 716*b07b6162SHanks Chen #define PINMUX_GPIO111__FUNC_GPIO111 (MTK_PIN_NO(111) | 0) 717*b07b6162SHanks Chen #define PINMUX_GPIO111__FUNC_SDA4 (MTK_PIN_NO(111) | 1) 718*b07b6162SHanks Chen 719*b07b6162SHanks Chen #define PINMUX_GPIO112__FUNC_GPIO112 (MTK_PIN_NO(112) | 0) 720*b07b6162SHanks Chen #define PINMUX_GPIO112__FUNC_SCL2 (MTK_PIN_NO(112) | 1) 721*b07b6162SHanks Chen 722*b07b6162SHanks Chen #define PINMUX_GPIO113__FUNC_GPIO113 (MTK_PIN_NO(113) | 0) 723*b07b6162SHanks Chen #define PINMUX_GPIO113__FUNC_SDA2 (MTK_PIN_NO(113) | 1) 724*b07b6162SHanks Chen 725*b07b6162SHanks Chen #define PINMUX_GPIO114__FUNC_GPIO114 (MTK_PIN_NO(114) | 0) 726*b07b6162SHanks Chen #define PINMUX_GPIO114__FUNC_CLKM0 (MTK_PIN_NO(114) | 1) 727*b07b6162SHanks Chen #define PINMUX_GPIO114__FUNC_SPI3_MI (MTK_PIN_NO(114) | 2) 728*b07b6162SHanks Chen #define PINMUX_GPIO114__FUNC_DBG_MON_B5 (MTK_PIN_NO(114) | 7) 729*b07b6162SHanks Chen 730*b07b6162SHanks Chen #define PINMUX_GPIO115__FUNC_GPIO115 (MTK_PIN_NO(115) | 0) 731*b07b6162SHanks Chen #define PINMUX_GPIO115__FUNC_CLKM1 (MTK_PIN_NO(115) | 1) 732*b07b6162SHanks Chen #define PINMUX_GPIO115__FUNC_SPI3_CSB (MTK_PIN_NO(115) | 2) 733*b07b6162SHanks Chen #define PINMUX_GPIO115__FUNC_DBG_MON_B4 (MTK_PIN_NO(115) | 7) 734*b07b6162SHanks Chen 735*b07b6162SHanks Chen #define PINMUX_GPIO116__FUNC_GPIO116 (MTK_PIN_NO(116) | 0) 736*b07b6162SHanks Chen #define PINMUX_GPIO116__FUNC_CMMCLK0 (MTK_PIN_NO(116) | 1) 737*b07b6162SHanks Chen #define PINMUX_GPIO116__FUNC_DBG_MON_B3 (MTK_PIN_NO(116) | 7) 738*b07b6162SHanks Chen 739*b07b6162SHanks Chen #define PINMUX_GPIO117__FUNC_GPIO117 (MTK_PIN_NO(117) | 0) 740*b07b6162SHanks Chen #define PINMUX_GPIO117__FUNC_CMMCLK1 (MTK_PIN_NO(117) | 1) 741*b07b6162SHanks Chen #define PINMUX_GPIO117__FUNC_DVFSRC_EXT_REQ (MTK_PIN_NO(117) | 2) 742*b07b6162SHanks Chen #define PINMUX_GPIO117__FUNC_DBG_MON_B2 (MTK_PIN_NO(117) | 7) 743*b07b6162SHanks Chen 744*b07b6162SHanks Chen #define PINMUX_GPIO118__FUNC_GPIO118 (MTK_PIN_NO(118) | 0) 745*b07b6162SHanks Chen #define PINMUX_GPIO118__FUNC_CLKM2 (MTK_PIN_NO(118) | 1) 746*b07b6162SHanks Chen #define PINMUX_GPIO118__FUNC_SPI3_MO (MTK_PIN_NO(118) | 2) 747*b07b6162SHanks Chen #define PINMUX_GPIO118__FUNC_DBG_MON_B1 (MTK_PIN_NO(118) | 7) 748*b07b6162SHanks Chen 749*b07b6162SHanks Chen #define PINMUX_GPIO119__FUNC_GPIO119 (MTK_PIN_NO(119) | 0) 750*b07b6162SHanks Chen #define PINMUX_GPIO119__FUNC_CLKM3 (MTK_PIN_NO(119) | 1) 751*b07b6162SHanks Chen #define PINMUX_GPIO119__FUNC_SPI3_CLK (MTK_PIN_NO(119) | 2) 752*b07b6162SHanks Chen #define PINMUX_GPIO119__FUNC_DBG_MON_B0 (MTK_PIN_NO(119) | 7) 753*b07b6162SHanks Chen 754*b07b6162SHanks Chen #define PINMUX_GPIO120__FUNC_GPIO120 (MTK_PIN_NO(120) | 0) 755*b07b6162SHanks Chen #define PINMUX_GPIO120__FUNC_CMMCLK2 (MTK_PIN_NO(120) | 1) 756*b07b6162SHanks Chen #define PINMUX_GPIO120__FUNC_CLKM2 (MTK_PIN_NO(120) | 2) 757*b07b6162SHanks Chen #define PINMUX_GPIO120__FUNC_ANT_SEL12 (MTK_PIN_NO(120) | 6) 758*b07b6162SHanks Chen #define PINMUX_GPIO120__FUNC_TP_UCTS2_AO (MTK_PIN_NO(120) | 7) 759*b07b6162SHanks Chen 760*b07b6162SHanks Chen #define PINMUX_GPIO121__FUNC_GPIO121 (MTK_PIN_NO(121) | 0) 761*b07b6162SHanks Chen #define PINMUX_GPIO121__FUNC_CMMCLK3 (MTK_PIN_NO(121) | 1) 762*b07b6162SHanks Chen #define PINMUX_GPIO121__FUNC_CLKM3 (MTK_PIN_NO(121) | 2) 763*b07b6162SHanks Chen #define PINMUX_GPIO121__FUNC_DVFSRC_EXT_REQ (MTK_PIN_NO(121) | 3) 764*b07b6162SHanks Chen #define PINMUX_GPIO121__FUNC_ANT_SEL11 (MTK_PIN_NO(121) | 6) 765*b07b6162SHanks Chen #define PINMUX_GPIO121__FUNC_TP_URTS2_AO (MTK_PIN_NO(121) | 7) 766*b07b6162SHanks Chen 767*b07b6162SHanks Chen #define PINMUX_GPIO122__FUNC_GPIO122 (MTK_PIN_NO(122) | 0) 768*b07b6162SHanks Chen #define PINMUX_GPIO122__FUNC_CMVREF1 (MTK_PIN_NO(122) | 1) 769*b07b6162SHanks Chen #define PINMUX_GPIO122__FUNC_PCM0_SYNC (MTK_PIN_NO(122) | 2) 770*b07b6162SHanks Chen #define PINMUX_GPIO122__FUNC_SRCLKENAI1 (MTK_PIN_NO(122) | 3) 771*b07b6162SHanks Chen #define PINMUX_GPIO122__FUNC_AGPS_SYNC (MTK_PIN_NO(122) | 4) 772*b07b6162SHanks Chen #define PINMUX_GPIO122__FUNC_PWM_1 (MTK_PIN_NO(122) | 5) 773*b07b6162SHanks Chen #define PINMUX_GPIO122__FUNC_ANT_SEL9 (MTK_PIN_NO(122) | 6) 774*b07b6162SHanks Chen #define PINMUX_GPIO122__FUNC_TP_UCTS1_AO (MTK_PIN_NO(122) | 7) 775*b07b6162SHanks Chen 776*b07b6162SHanks Chen #define PINMUX_GPIO123__FUNC_GPIO123 (MTK_PIN_NO(123) | 0) 777*b07b6162SHanks Chen #define PINMUX_GPIO123__FUNC_PCM0_DI (MTK_PIN_NO(123) | 2) 778*b07b6162SHanks Chen #define PINMUX_GPIO123__FUNC_ADSP_JTAG_TRSTN (MTK_PIN_NO(123) | 3) 779*b07b6162SHanks Chen #define PINMUX_GPIO123__FUNC_VPU_UDI_NTRST (MTK_PIN_NO(123) | 4) 780*b07b6162SHanks Chen #define PINMUX_GPIO123__FUNC_SPM_JTAG_TRSTN (MTK_PIN_NO(123) | 5) 781*b07b6162SHanks Chen #define PINMUX_GPIO123__FUNC_SSPM_JTAG_TRSTN (MTK_PIN_NO(123) | 6) 782*b07b6162SHanks Chen 783*b07b6162SHanks Chen #define PINMUX_GPIO124__FUNC_GPIO124 (MTK_PIN_NO(124) | 0) 784*b07b6162SHanks Chen #define PINMUX_GPIO124__FUNC_CMVREF2 (MTK_PIN_NO(124) | 1) 785*b07b6162SHanks Chen #define PINMUX_GPIO124__FUNC_PCM0_CLK (MTK_PIN_NO(124) | 2) 786*b07b6162SHanks Chen #define PINMUX_GPIO124__FUNC_MD_INT0 (MTK_PIN_NO(124) | 3) 787*b07b6162SHanks Chen #define PINMUX_GPIO124__FUNC_EXT_FRAME_SYNC (MTK_PIN_NO(124) | 4) 788*b07b6162SHanks Chen #define PINMUX_GPIO124__FUNC_PWM_2 (MTK_PIN_NO(124) | 5) 789*b07b6162SHanks Chen #define PINMUX_GPIO124__FUNC_ANT_SEL10 (MTK_PIN_NO(124) | 6) 790*b07b6162SHanks Chen #define PINMUX_GPIO124__FUNC_TP_URTS1_AO (MTK_PIN_NO(124) | 7) 791*b07b6162SHanks Chen 792*b07b6162SHanks Chen #define PINMUX_GPIO125__FUNC_GPIO125 (MTK_PIN_NO(125) | 0) 793*b07b6162SHanks Chen #define PINMUX_GPIO125__FUNC_CMVREF3 (MTK_PIN_NO(125) | 1) 794*b07b6162SHanks Chen #define PINMUX_GPIO125__FUNC_PCM0_DO (MTK_PIN_NO(125) | 2) 795*b07b6162SHanks Chen #define PINMUX_GPIO125__FUNC_ADSP_JTAG_TMS (MTK_PIN_NO(125) | 3) 796*b07b6162SHanks Chen #define PINMUX_GPIO125__FUNC_VPU_UDI_TMS (MTK_PIN_NO(125) | 4) 797*b07b6162SHanks Chen #define PINMUX_GPIO125__FUNC_SPM_JTAG_TMS (MTK_PIN_NO(125) | 5) 798*b07b6162SHanks Chen #define PINMUX_GPIO125__FUNC_SSPM_JTAG_TMS (MTK_PIN_NO(125) | 6) 799*b07b6162SHanks Chen 800*b07b6162SHanks Chen #define PINMUX_GPIO126__FUNC_GPIO126 (MTK_PIN_NO(126) | 0) 801*b07b6162SHanks Chen #define PINMUX_GPIO126__FUNC_CMVREF4 (MTK_PIN_NO(126) | 1) 802*b07b6162SHanks Chen #define PINMUX_GPIO126__FUNC_CMFLASH0 (MTK_PIN_NO(126) | 2) 803*b07b6162SHanks Chen #define PINMUX_GPIO126__FUNC_CONN_MCU_AICE_TMSC (MTK_PIN_NO(126) | 6) 804*b07b6162SHanks Chen 805*b07b6162SHanks Chen #define PINMUX_GPIO127__FUNC_GPIO127 (MTK_PIN_NO(127) | 0) 806*b07b6162SHanks Chen #define PINMUX_GPIO127__FUNC_CMVREF0 (MTK_PIN_NO(127) | 1) 807*b07b6162SHanks Chen #define PINMUX_GPIO127__FUNC_CMFLASH1 (MTK_PIN_NO(127) | 2) 808*b07b6162SHanks Chen #define PINMUX_GPIO127__FUNC_CONN_MCU_AICE_TCKC (MTK_PIN_NO(127) | 6) 809*b07b6162SHanks Chen 810*b07b6162SHanks Chen #define PINMUX_GPIO128__FUNC_GPIO128 (MTK_PIN_NO(128) | 0) 811*b07b6162SHanks Chen #define PINMUX_GPIO128__FUNC_MD1_SIM1_SIO (MTK_PIN_NO(128) | 1) 812*b07b6162SHanks Chen #define PINMUX_GPIO128__FUNC_MD1_SIM2_SIO (MTK_PIN_NO(128) | 2) 813*b07b6162SHanks Chen #define PINMUX_GPIO128__FUNC_CCU_JTAG_TRST (MTK_PIN_NO(128) | 3) 814*b07b6162SHanks Chen #define PINMUX_GPIO128__FUNC_CONN_DSP_JINTP (MTK_PIN_NO(128) | 4) 815*b07b6162SHanks Chen #define PINMUX_GPIO128__FUNC_SCP_JTAG_TRSTN (MTK_PIN_NO(128) | 5) 816*b07b6162SHanks Chen #define PINMUX_GPIO128__FUNC_LVTS_FOUT (MTK_PIN_NO(128) | 6) 817*b07b6162SHanks Chen #define PINMUX_GPIO128__FUNC_DBG_MON_A3 (MTK_PIN_NO(128) | 7) 818*b07b6162SHanks Chen 819*b07b6162SHanks Chen #define PINMUX_GPIO129__FUNC_GPIO129 (MTK_PIN_NO(129) | 0) 820*b07b6162SHanks Chen #define PINMUX_GPIO129__FUNC_MD1_SIM1_SRST (MTK_PIN_NO(129) | 1) 821*b07b6162SHanks Chen #define PINMUX_GPIO129__FUNC_MD1_SIM2_SRST (MTK_PIN_NO(129) | 2) 822*b07b6162SHanks Chen #define PINMUX_GPIO129__FUNC_CCU_JTAG_TCK (MTK_PIN_NO(129) | 3) 823*b07b6162SHanks Chen #define PINMUX_GPIO129__FUNC_CONN_DSP_JCK (MTK_PIN_NO(129) | 4) 824*b07b6162SHanks Chen #define PINMUX_GPIO129__FUNC_SCP_JTAG_TCK (MTK_PIN_NO(129) | 5) 825*b07b6162SHanks Chen #define PINMUX_GPIO129__FUNC_LVTS_SDO (MTK_PIN_NO(129) | 6) 826*b07b6162SHanks Chen #define PINMUX_GPIO129__FUNC_DBG_MON_A4 (MTK_PIN_NO(129) | 7) 827*b07b6162SHanks Chen 828*b07b6162SHanks Chen #define PINMUX_GPIO130__FUNC_GPIO130 (MTK_PIN_NO(130) | 0) 829*b07b6162SHanks Chen #define PINMUX_GPIO130__FUNC_MD1_SIM1_SCLK (MTK_PIN_NO(130) | 1) 830*b07b6162SHanks Chen #define PINMUX_GPIO130__FUNC_MD1_SIM2_SCLK (MTK_PIN_NO(130) | 2) 831*b07b6162SHanks Chen #define PINMUX_GPIO130__FUNC_LVTS_26M (MTK_PIN_NO(130) | 6) 832*b07b6162SHanks Chen #define PINMUX_GPIO130__FUNC_DBG_MON_A5 (MTK_PIN_NO(130) | 7) 833*b07b6162SHanks Chen 834*b07b6162SHanks Chen #define PINMUX_GPIO131__FUNC_GPIO131 (MTK_PIN_NO(131) | 0) 835*b07b6162SHanks Chen #define PINMUX_GPIO131__FUNC_MD1_SIM2_SCLK (MTK_PIN_NO(131) | 1) 836*b07b6162SHanks Chen #define PINMUX_GPIO131__FUNC_MD1_SIM1_SCLK (MTK_PIN_NO(131) | 2) 837*b07b6162SHanks Chen #define PINMUX_GPIO131__FUNC_CCU_JTAG_TDI (MTK_PIN_NO(131) | 3) 838*b07b6162SHanks Chen #define PINMUX_GPIO131__FUNC_CONN_DSP_JDI (MTK_PIN_NO(131) | 4) 839*b07b6162SHanks Chen #define PINMUX_GPIO131__FUNC_SCP_JTAG_TDI (MTK_PIN_NO(131) | 5) 840*b07b6162SHanks Chen #define PINMUX_GPIO131__FUNC_LVTS_SCK (MTK_PIN_NO(131) | 6) 841*b07b6162SHanks Chen #define PINMUX_GPIO131__FUNC_DBG_MON_A0 (MTK_PIN_NO(131) | 7) 842*b07b6162SHanks Chen 843*b07b6162SHanks Chen #define PINMUX_GPIO132__FUNC_GPIO132 (MTK_PIN_NO(132) | 0) 844*b07b6162SHanks Chen #define PINMUX_GPIO132__FUNC_MD1_SIM2_SRST (MTK_PIN_NO(132) | 1) 845*b07b6162SHanks Chen #define PINMUX_GPIO132__FUNC_MD1_SIM1_SRST (MTK_PIN_NO(132) | 2) 846*b07b6162SHanks Chen #define PINMUX_GPIO132__FUNC_CCU_JTAG_TMS (MTK_PIN_NO(132) | 3) 847*b07b6162SHanks Chen #define PINMUX_GPIO132__FUNC_CONN_DSP_JMS (MTK_PIN_NO(132) | 4) 848*b07b6162SHanks Chen #define PINMUX_GPIO132__FUNC_SCP_JTAG_TMS (MTK_PIN_NO(132) | 5) 849*b07b6162SHanks Chen #define PINMUX_GPIO132__FUNC_LVTS_SDI (MTK_PIN_NO(132) | 6) 850*b07b6162SHanks Chen #define PINMUX_GPIO132__FUNC_DBG_MON_A1 (MTK_PIN_NO(132) | 7) 851*b07b6162SHanks Chen 852*b07b6162SHanks Chen #define PINMUX_GPIO133__FUNC_GPIO133 (MTK_PIN_NO(133) | 0) 853*b07b6162SHanks Chen #define PINMUX_GPIO133__FUNC_MD1_SIM2_SIO (MTK_PIN_NO(133) | 1) 854*b07b6162SHanks Chen #define PINMUX_GPIO133__FUNC_MD1_SIM1_SIO (MTK_PIN_NO(133) | 2) 855*b07b6162SHanks Chen #define PINMUX_GPIO133__FUNC_CCU_JTAG_TDO (MTK_PIN_NO(133) | 3) 856*b07b6162SHanks Chen #define PINMUX_GPIO133__FUNC_CONN_DSP_JDO (MTK_PIN_NO(133) | 4) 857*b07b6162SHanks Chen #define PINMUX_GPIO133__FUNC_SCP_JTAG_TDO (MTK_PIN_NO(133) | 5) 858*b07b6162SHanks Chen #define PINMUX_GPIO133__FUNC_LVTS_SCF (MTK_PIN_NO(133) | 6) 859*b07b6162SHanks Chen #define PINMUX_GPIO133__FUNC_DBG_MON_A2 (MTK_PIN_NO(133) | 7) 860*b07b6162SHanks Chen 861*b07b6162SHanks Chen #define PINMUX_GPIO134__FUNC_GPIO134 (MTK_PIN_NO(134) | 0) 862*b07b6162SHanks Chen #define PINMUX_GPIO134__FUNC_MSDC1_CLK (MTK_PIN_NO(134) | 1) 863*b07b6162SHanks Chen #define PINMUX_GPIO134__FUNC_PCM1_CLK (MTK_PIN_NO(134) | 2) 864*b07b6162SHanks Chen #define PINMUX_GPIO134__FUNC_SPI5_B_MI (MTK_PIN_NO(134) | 3) 865*b07b6162SHanks Chen #define PINMUX_GPIO134__FUNC_UDI_TCK (MTK_PIN_NO(134) | 4) 866*b07b6162SHanks Chen #define PINMUX_GPIO134__FUNC_CONN_DSP_JCK (MTK_PIN_NO(134) | 5) 867*b07b6162SHanks Chen #define PINMUX_GPIO134__FUNC_IPU_JTAG_TCK (MTK_PIN_NO(134) | 6) 868*b07b6162SHanks Chen #define PINMUX_GPIO134__FUNC_JTCK_SEL3 (MTK_PIN_NO(134) | 7) 869*b07b6162SHanks Chen 870*b07b6162SHanks Chen #define PINMUX_GPIO135__FUNC_GPIO135 (MTK_PIN_NO(135) | 0) 871*b07b6162SHanks Chen #define PINMUX_GPIO135__FUNC_MSDC1_CMD (MTK_PIN_NO(135) | 1) 872*b07b6162SHanks Chen #define PINMUX_GPIO135__FUNC_PCM1_SYNC (MTK_PIN_NO(135) | 2) 873*b07b6162SHanks Chen #define PINMUX_GPIO135__FUNC_SPI5_B_CSB (MTK_PIN_NO(135) | 3) 874*b07b6162SHanks Chen #define PINMUX_GPIO135__FUNC_UDI_TMS (MTK_PIN_NO(135) | 4) 875*b07b6162SHanks Chen #define PINMUX_GPIO135__FUNC_CONN_DSP_JMS (MTK_PIN_NO(135) | 5) 876*b07b6162SHanks Chen #define PINMUX_GPIO135__FUNC_IPU_JTAG_TMS (MTK_PIN_NO(135) | 6) 877*b07b6162SHanks Chen #define PINMUX_GPIO135__FUNC_JTMS_SEL3 (MTK_PIN_NO(135) | 7) 878*b07b6162SHanks Chen 879*b07b6162SHanks Chen #define PINMUX_GPIO136__FUNC_GPIO136 (MTK_PIN_NO(136) | 0) 880*b07b6162SHanks Chen #define PINMUX_GPIO136__FUNC_MSDC1_DAT3 (MTK_PIN_NO(136) | 1) 881*b07b6162SHanks Chen #define PINMUX_GPIO136__FUNC_PCM1_DI (MTK_PIN_NO(136) | 2) 882*b07b6162SHanks Chen #define PINMUX_GPIO136__FUNC_SPI5_B_MO (MTK_PIN_NO(136) | 3) 883*b07b6162SHanks Chen #define PINMUX_GPIO136__FUNC_CONN_TCXOENA_REQ (MTK_PIN_NO(136) | 4) 884*b07b6162SHanks Chen #define PINMUX_GPIO136__FUNC_CONN_DSP_JINTP (MTK_PIN_NO(136) | 5) 885*b07b6162SHanks Chen #define PINMUX_GPIO136__FUNC_CONN_MCU_AICE_TMSC (MTK_PIN_NO(136) | 6) 886*b07b6162SHanks Chen 887*b07b6162SHanks Chen #define PINMUX_GPIO137__FUNC_GPIO137 (MTK_PIN_NO(137) | 0) 888*b07b6162SHanks Chen #define PINMUX_GPIO137__FUNC_MSDC1_DAT0 (MTK_PIN_NO(137) | 1) 889*b07b6162SHanks Chen #define PINMUX_GPIO137__FUNC_PCM1_DO0 (MTK_PIN_NO(137) | 2) 890*b07b6162SHanks Chen #define PINMUX_GPIO137__FUNC_SPI5_B_CLK (MTK_PIN_NO(137) | 3) 891*b07b6162SHanks Chen #define PINMUX_GPIO137__FUNC_UDI_TDI (MTK_PIN_NO(137) | 4) 892*b07b6162SHanks Chen #define PINMUX_GPIO137__FUNC_CONN_DSP_JDI (MTK_PIN_NO(137) | 5) 893*b07b6162SHanks Chen #define PINMUX_GPIO137__FUNC_IPU_JTAG_TDI (MTK_PIN_NO(137) | 6) 894*b07b6162SHanks Chen #define PINMUX_GPIO137__FUNC_JTDI_SEL3 (MTK_PIN_NO(137) | 7) 895*b07b6162SHanks Chen 896*b07b6162SHanks Chen #define PINMUX_GPIO138__FUNC_GPIO138 (MTK_PIN_NO(138) | 0) 897*b07b6162SHanks Chen #define PINMUX_GPIO138__FUNC_MSDC1_DAT2 (MTK_PIN_NO(138) | 1) 898*b07b6162SHanks Chen #define PINMUX_GPIO138__FUNC_PCM1_DO2 (MTK_PIN_NO(138) | 2) 899*b07b6162SHanks Chen #define PINMUX_GPIO138__FUNC_ANT_SEL11 (MTK_PIN_NO(138) | 3) 900*b07b6162SHanks Chen #define PINMUX_GPIO138__FUNC_UDI_NTRST (MTK_PIN_NO(138) | 4) 901*b07b6162SHanks Chen #define PINMUX_GPIO138__FUNC_CONN_MCU_AICE_TCKC (MTK_PIN_NO(138) | 5) 902*b07b6162SHanks Chen #define PINMUX_GPIO138__FUNC_IPU_JTAG_TRST (MTK_PIN_NO(138) | 6) 903*b07b6162SHanks Chen #define PINMUX_GPIO138__FUNC_JTRSTN_SEL3 (MTK_PIN_NO(138) | 7) 904*b07b6162SHanks Chen 905*b07b6162SHanks Chen #define PINMUX_GPIO139__FUNC_GPIO139 (MTK_PIN_NO(139) | 0) 906*b07b6162SHanks Chen #define PINMUX_GPIO139__FUNC_MSDC1_DAT1 (MTK_PIN_NO(139) | 1) 907*b07b6162SHanks Chen #define PINMUX_GPIO139__FUNC_PCM1_DO1 (MTK_PIN_NO(139) | 2) 908*b07b6162SHanks Chen #define PINMUX_GPIO139__FUNC_ANT_SEL12 (MTK_PIN_NO(139) | 3) 909*b07b6162SHanks Chen #define PINMUX_GPIO139__FUNC_UDI_TDO (MTK_PIN_NO(139) | 4) 910*b07b6162SHanks Chen #define PINMUX_GPIO139__FUNC_CONN_DSP_JDO (MTK_PIN_NO(139) | 5) 911*b07b6162SHanks Chen #define PINMUX_GPIO139__FUNC_IPU_JTAG_TDO (MTK_PIN_NO(139) | 6) 912*b07b6162SHanks Chen #define PINMUX_GPIO139__FUNC_JTDO_SEL3 (MTK_PIN_NO(139) | 7) 913*b07b6162SHanks Chen 914*b07b6162SHanks Chen #define PINMUX_GPIO140__FUNC_GPIO140 (MTK_PIN_NO(140) | 0) 915*b07b6162SHanks Chen #define PINMUX_GPIO140__FUNC_MD_INT1_C2K_UIM0_HOT_PLUG (MTK_PIN_NO(140) | 1) 916*b07b6162SHanks Chen #define PINMUX_GPIO140__FUNC_MD_INT2_C2K_UIM1_HOT_PLUG (MTK_PIN_NO(140) | 2) 917*b07b6162SHanks Chen #define PINMUX_GPIO140__FUNC_ADSP_URXD0 (MTK_PIN_NO(140) | 3) 918*b07b6162SHanks Chen #define PINMUX_GPIO140__FUNC_SCL_6306 (MTK_PIN_NO(140) | 4) 919*b07b6162SHanks Chen #define PINMUX_GPIO140__FUNC_PTA_RXD (MTK_PIN_NO(140) | 5) 920*b07b6162SHanks Chen #define PINMUX_GPIO140__FUNC_SSPM_URXD_AO (MTK_PIN_NO(140) | 6) 921*b07b6162SHanks Chen 922*b07b6162SHanks Chen #define PINMUX_GPIO141__FUNC_GPIO141 (MTK_PIN_NO(141) | 0) 923*b07b6162SHanks Chen #define PINMUX_GPIO141__FUNC_MD_INT2_C2K_UIM1_HOT_PLUG (MTK_PIN_NO(141) | 1) 924*b07b6162SHanks Chen #define PINMUX_GPIO141__FUNC_MD_INT1_C2K_UIM0_HOT_PLUG (MTK_PIN_NO(141) | 2) 925*b07b6162SHanks Chen #define PINMUX_GPIO141__FUNC_ADSP_UTXD0 (MTK_PIN_NO(141) | 3) 926*b07b6162SHanks Chen #define PINMUX_GPIO141__FUNC_SDA_6306 (MTK_PIN_NO(141) | 4) 927*b07b6162SHanks Chen #define PINMUX_GPIO141__FUNC_PTA_TXD (MTK_PIN_NO(141) | 5) 928*b07b6162SHanks Chen #define PINMUX_GPIO141__FUNC_SSPM_UTXD_AO (MTK_PIN_NO(141) | 6) 929*b07b6162SHanks Chen 930*b07b6162SHanks Chen #define PINMUX_GPIO142__FUNC_GPIO142 (MTK_PIN_NO(142) | 0) 931*b07b6162SHanks Chen #define PINMUX_GPIO142__FUNC_SCP_VREQ_VAO (MTK_PIN_NO(142) | 1) 932*b07b6162SHanks Chen #define PINMUX_GPIO142__FUNC_DVFSRC_EXT_REQ (MTK_PIN_NO(142) | 2) 933*b07b6162SHanks Chen 934*b07b6162SHanks Chen #define PINMUX_GPIO143__FUNC_GPIO143 (MTK_PIN_NO(143) | 0) 935*b07b6162SHanks Chen #define PINMUX_GPIO143__FUNC_AUD_DAT_MOSI2 (MTK_PIN_NO(143) | 1) 936*b07b6162SHanks Chen #define PINMUX_GPIO143__FUNC_DBG_MON_A9 (MTK_PIN_NO(143) | 7) 937*b07b6162SHanks Chen 938*b07b6162SHanks Chen #define PINMUX_GPIO144__FUNC_GPIO144 (MTK_PIN_NO(144) | 0) 939*b07b6162SHanks Chen #define PINMUX_GPIO144__FUNC_AUD_NLE_MOSI1 (MTK_PIN_NO(144) | 1) 940*b07b6162SHanks Chen #define PINMUX_GPIO144__FUNC_AUD_CLK_MISO (MTK_PIN_NO(144) | 2) 941*b07b6162SHanks Chen #define PINMUX_GPIO144__FUNC_I2S2_MCK (MTK_PIN_NO(144) | 3) 942*b07b6162SHanks Chen #define PINMUX_GPIO144__FUNC_UDI_TCK (MTK_PIN_NO(144) | 5) 943*b07b6162SHanks Chen #define PINMUX_GPIO144__FUNC_UFS_UNIPRO_SDA (MTK_PIN_NO(144) | 6) 944*b07b6162SHanks Chen #define PINMUX_GPIO144__FUNC_DBG_MON_A10 (MTK_PIN_NO(144) | 7) 945*b07b6162SHanks Chen 946*b07b6162SHanks Chen #define PINMUX_GPIO145__FUNC_GPIO145 (MTK_PIN_NO(145) | 0) 947*b07b6162SHanks Chen #define PINMUX_GPIO145__FUNC_AUD_NLE_MOSI0 (MTK_PIN_NO(145) | 1) 948*b07b6162SHanks Chen #define PINMUX_GPIO145__FUNC_AUD_SYNC_MISO (MTK_PIN_NO(145) | 2) 949*b07b6162SHanks Chen #define PINMUX_GPIO145__FUNC_I2S2_BCK (MTK_PIN_NO(145) | 3) 950*b07b6162SHanks Chen #define PINMUX_GPIO145__FUNC_UDI_TMS (MTK_PIN_NO(145) | 5) 951*b07b6162SHanks Chen #define PINMUX_GPIO145__FUNC_DBG_MON_A11 (MTK_PIN_NO(145) | 7) 952*b07b6162SHanks Chen 953*b07b6162SHanks Chen #define PINMUX_GPIO146__FUNC_GPIO146 (MTK_PIN_NO(146) | 0) 954*b07b6162SHanks Chen #define PINMUX_GPIO146__FUNC_AUD_DAT_MISO2 (MTK_PIN_NO(146) | 1) 955*b07b6162SHanks Chen #define PINMUX_GPIO146__FUNC_I2S2_DI2 (MTK_PIN_NO(146) | 3) 956*b07b6162SHanks Chen #define PINMUX_GPIO146__FUNC_UDI_TDO (MTK_PIN_NO(146) | 5) 957*b07b6162SHanks Chen #define PINMUX_GPIO146__FUNC_DBG_MON_A14 (MTK_PIN_NO(146) | 7) 958*b07b6162SHanks Chen 959*b07b6162SHanks Chen #define PINMUX_GPIO147__FUNC_GPIO147 (MTK_PIN_NO(147) | 0) 960*b07b6162SHanks Chen #define PINMUX_GPIO147__FUNC_ANT_SEL0 (MTK_PIN_NO(147) | 1) 961*b07b6162SHanks Chen #define PINMUX_GPIO147__FUNC_PWM_3 (MTK_PIN_NO(147) | 2) 962*b07b6162SHanks Chen 963*b07b6162SHanks Chen #define PINMUX_GPIO148__FUNC_GPIO148 (MTK_PIN_NO(148) | 0) 964*b07b6162SHanks Chen #define PINMUX_GPIO148__FUNC_ANT_SEL1 (MTK_PIN_NO(148) | 1) 965*b07b6162SHanks Chen #define PINMUX_GPIO148__FUNC_SPI0_B_MI (MTK_PIN_NO(148) | 2) 966*b07b6162SHanks Chen #define PINMUX_GPIO148__FUNC_SSPM_URXD_AO (MTK_PIN_NO(148) | 3) 967*b07b6162SHanks Chen #define PINMUX_GPIO148__FUNC_TP_UCTS2_AO (MTK_PIN_NO(148) | 5) 968*b07b6162SHanks Chen #define PINMUX_GPIO148__FUNC_CLKM0 (MTK_PIN_NO(148) | 6) 969*b07b6162SHanks Chen 970*b07b6162SHanks Chen #define PINMUX_GPIO149__FUNC_GPIO149 (MTK_PIN_NO(149) | 0) 971*b07b6162SHanks Chen #define PINMUX_GPIO149__FUNC_ANT_SEL2 (MTK_PIN_NO(149) | 1) 972*b07b6162SHanks Chen #define PINMUX_GPIO149__FUNC_SPI0_B_CSB (MTK_PIN_NO(149) | 2) 973*b07b6162SHanks Chen #define PINMUX_GPIO149__FUNC_SSPM_UTXD_AO (MTK_PIN_NO(149) | 3) 974*b07b6162SHanks Chen #define PINMUX_GPIO149__FUNC_TP_URTS2_AO (MTK_PIN_NO(149) | 5) 975*b07b6162SHanks Chen #define PINMUX_GPIO149__FUNC_CONN_TCXOENA_REQ (MTK_PIN_NO(149) | 6) 976*b07b6162SHanks Chen 977*b07b6162SHanks Chen #define PINMUX_GPIO150__FUNC_GPIO150 (MTK_PIN_NO(150) | 0) 978*b07b6162SHanks Chen #define PINMUX_GPIO150__FUNC_ANT_SEL3 (MTK_PIN_NO(150) | 1) 979*b07b6162SHanks Chen #define PINMUX_GPIO150__FUNC_SPI0_B_MO (MTK_PIN_NO(150) | 2) 980*b07b6162SHanks Chen #define PINMUX_GPIO150__FUNC_UCTS1 (MTK_PIN_NO(150) | 3) 981*b07b6162SHanks Chen #define PINMUX_GPIO150__FUNC_TP_UCTS1_AO (MTK_PIN_NO(150) | 5) 982*b07b6162SHanks Chen #define PINMUX_GPIO150__FUNC_IDDIG (MTK_PIN_NO(150) | 6) 983*b07b6162SHanks Chen #define PINMUX_GPIO150__FUNC_SCL9 (MTK_PIN_NO(150) | 7) 984*b07b6162SHanks Chen 985*b07b6162SHanks Chen #define PINMUX_GPIO151__FUNC_GPIO151 (MTK_PIN_NO(151) | 0) 986*b07b6162SHanks Chen #define PINMUX_GPIO151__FUNC_ANT_SEL4 (MTK_PIN_NO(151) | 1) 987*b07b6162SHanks Chen #define PINMUX_GPIO151__FUNC_SPI0_B_CLK (MTK_PIN_NO(151) | 2) 988*b07b6162SHanks Chen #define PINMUX_GPIO151__FUNC_URTS1 (MTK_PIN_NO(151) | 3) 989*b07b6162SHanks Chen #define PINMUX_GPIO151__FUNC_TP_URTS1_AO (MTK_PIN_NO(151) | 5) 990*b07b6162SHanks Chen #define PINMUX_GPIO151__FUNC_USB_DRVVBUS (MTK_PIN_NO(151) | 6) 991*b07b6162SHanks Chen #define PINMUX_GPIO151__FUNC_SDA9 (MTK_PIN_NO(151) | 7) 992*b07b6162SHanks Chen 993*b07b6162SHanks Chen #define PINMUX_GPIO152__FUNC_GPIO152 (MTK_PIN_NO(152) | 0) 994*b07b6162SHanks Chen #define PINMUX_GPIO152__FUNC_ANT_SEL5 (MTK_PIN_NO(152) | 1) 995*b07b6162SHanks Chen #define PINMUX_GPIO152__FUNC_SPI1_B_MI (MTK_PIN_NO(152) | 2) 996*b07b6162SHanks Chen #define PINMUX_GPIO152__FUNC_CLKM3 (MTK_PIN_NO(152) | 3) 997*b07b6162SHanks Chen #define PINMUX_GPIO152__FUNC_TP_URXD1_AO (MTK_PIN_NO(152) | 5) 998*b07b6162SHanks Chen #define PINMUX_GPIO152__FUNC_SCP_SPI1_B_MI (MTK_PIN_NO(152) | 6) 999*b07b6162SHanks Chen #define PINMUX_GPIO152__FUNC_SCL8 (MTK_PIN_NO(152) | 7) 1000*b07b6162SHanks Chen 1001*b07b6162SHanks Chen #define PINMUX_GPIO153__FUNC_GPIO153 (MTK_PIN_NO(153) | 0) 1002*b07b6162SHanks Chen #define PINMUX_GPIO153__FUNC_ANT_SEL6 (MTK_PIN_NO(153) | 1) 1003*b07b6162SHanks Chen #define PINMUX_GPIO153__FUNC_SPI1_B_CSB (MTK_PIN_NO(153) | 2) 1004*b07b6162SHanks Chen #define PINMUX_GPIO153__FUNC_SRCLKENAI0 (MTK_PIN_NO(153) | 3) 1005*b07b6162SHanks Chen #define PINMUX_GPIO153__FUNC_PWM_0 (MTK_PIN_NO(153) | 4) 1006*b07b6162SHanks Chen #define PINMUX_GPIO153__FUNC_TP_UTXD1_AO (MTK_PIN_NO(153) | 5) 1007*b07b6162SHanks Chen #define PINMUX_GPIO153__FUNC_SCP_SPI1_B_CS (MTK_PIN_NO(153) | 6) 1008*b07b6162SHanks Chen #define PINMUX_GPIO153__FUNC_SDA8 (MTK_PIN_NO(153) | 7) 1009*b07b6162SHanks Chen 1010*b07b6162SHanks Chen #define PINMUX_GPIO154__FUNC_GPIO154 (MTK_PIN_NO(154) | 0) 1011*b07b6162SHanks Chen #define PINMUX_GPIO154__FUNC_ANT_SEL7 (MTK_PIN_NO(154) | 1) 1012*b07b6162SHanks Chen #define PINMUX_GPIO154__FUNC_SPI1_B_MO (MTK_PIN_NO(154) | 2) 1013*b07b6162SHanks Chen #define PINMUX_GPIO154__FUNC_SRCLKENAI1 (MTK_PIN_NO(154) | 3) 1014*b07b6162SHanks Chen #define PINMUX_GPIO154__FUNC_TP_URXD2_AO (MTK_PIN_NO(154) | 5) 1015*b07b6162SHanks Chen #define PINMUX_GPIO154__FUNC_SCP_SPI1_B_MO (MTK_PIN_NO(154) | 6) 1016*b07b6162SHanks Chen 1017*b07b6162SHanks Chen #define PINMUX_GPIO155__FUNC_GPIO155 (MTK_PIN_NO(155) | 0) 1018*b07b6162SHanks Chen #define PINMUX_GPIO155__FUNC_ANT_SEL8 (MTK_PIN_NO(155) | 1) 1019*b07b6162SHanks Chen #define PINMUX_GPIO155__FUNC_SPI1_B_CLK (MTK_PIN_NO(155) | 2) 1020*b07b6162SHanks Chen #define PINMUX_GPIO155__FUNC_MD_INT0 (MTK_PIN_NO(155) | 3) 1021*b07b6162SHanks Chen #define PINMUX_GPIO155__FUNC_TP_UTXD2_AO (MTK_PIN_NO(155) | 5) 1022*b07b6162SHanks Chen #define PINMUX_GPIO155__FUNC_SCP_SPI1_B_CK (MTK_PIN_NO(155) | 6) 1023*b07b6162SHanks Chen #define PINMUX_GPIO155__FUNC_DBG_MON_A15 (MTK_PIN_NO(155) | 7) 1024*b07b6162SHanks Chen 1025*b07b6162SHanks Chen #define PINMUX_GPIO156__FUNC_GPIO156 (MTK_PIN_NO(156) | 0) 1026*b07b6162SHanks Chen #define PINMUX_GPIO156__FUNC_CONN_TOP_CLK (MTK_PIN_NO(156) | 1) 1027*b07b6162SHanks Chen #define PINMUX_GPIO156__FUNC_AUXIF_CLK0 (MTK_PIN_NO(156) | 2) 1028*b07b6162SHanks Chen #define PINMUX_GPIO156__FUNC_DBG_MON_A16 (MTK_PIN_NO(156) | 7) 1029*b07b6162SHanks Chen 1030*b07b6162SHanks Chen #define PINMUX_GPIO157__FUNC_GPIO157 (MTK_PIN_NO(157) | 0) 1031*b07b6162SHanks Chen #define PINMUX_GPIO157__FUNC_CONN_TOP_DATA (MTK_PIN_NO(157) | 1) 1032*b07b6162SHanks Chen #define PINMUX_GPIO157__FUNC_AUXIF_ST0 (MTK_PIN_NO(157) | 2) 1033*b07b6162SHanks Chen #define PINMUX_GPIO157__FUNC_DBG_MON_A17 (MTK_PIN_NO(157) | 7) 1034*b07b6162SHanks Chen 1035*b07b6162SHanks Chen #define PINMUX_GPIO158__FUNC_GPIO158 (MTK_PIN_NO(158) | 0) 1036*b07b6162SHanks Chen #define PINMUX_GPIO158__FUNC_CONN_HRST_B (MTK_PIN_NO(158) | 1) 1037*b07b6162SHanks Chen #define PINMUX_GPIO158__FUNC_DBG_MON_A18 (MTK_PIN_NO(158) | 7) 1038*b07b6162SHanks Chen 1039*b07b6162SHanks Chen #define PINMUX_GPIO159__FUNC_GPIO159 (MTK_PIN_NO(159) | 0) 1040*b07b6162SHanks Chen #define PINMUX_GPIO159__FUNC_CONN_WB_PTA (MTK_PIN_NO(159) | 1) 1041*b07b6162SHanks Chen #define PINMUX_GPIO159__FUNC_DBG_MON_A19 (MTK_PIN_NO(159) | 7) 1042*b07b6162SHanks Chen 1043*b07b6162SHanks Chen #define PINMUX_GPIO160__FUNC_GPIO160 (MTK_PIN_NO(160) | 0) 1044*b07b6162SHanks Chen #define PINMUX_GPIO160__FUNC_CONN_BT_CLK (MTK_PIN_NO(160) | 1) 1045*b07b6162SHanks Chen #define PINMUX_GPIO160__FUNC_AUXIF_CLK1 (MTK_PIN_NO(160) | 2) 1046*b07b6162SHanks Chen #define PINMUX_GPIO160__FUNC_DBG_MON_A20 (MTK_PIN_NO(160) | 7) 1047*b07b6162SHanks Chen 1048*b07b6162SHanks Chen #define PINMUX_GPIO161__FUNC_GPIO161 (MTK_PIN_NO(161) | 0) 1049*b07b6162SHanks Chen #define PINMUX_GPIO161__FUNC_CONN_BT_DATA (MTK_PIN_NO(161) | 1) 1050*b07b6162SHanks Chen #define PINMUX_GPIO161__FUNC_AUXIF_ST1 (MTK_PIN_NO(161) | 2) 1051*b07b6162SHanks Chen #define PINMUX_GPIO161__FUNC_DBG_MON_A21 (MTK_PIN_NO(161) | 7) 1052*b07b6162SHanks Chen 1053*b07b6162SHanks Chen #define PINMUX_GPIO162__FUNC_GPIO162 (MTK_PIN_NO(162) | 0) 1054*b07b6162SHanks Chen #define PINMUX_GPIO162__FUNC_CONN_WF_CTRL0 (MTK_PIN_NO(162) | 1) 1055*b07b6162SHanks Chen #define PINMUX_GPIO162__FUNC_DBG_MON_A22 (MTK_PIN_NO(162) | 7) 1056*b07b6162SHanks Chen 1057*b07b6162SHanks Chen #define PINMUX_GPIO163__FUNC_GPIO163 (MTK_PIN_NO(163) | 0) 1058*b07b6162SHanks Chen #define PINMUX_GPIO163__FUNC_CONN_WF_CTRL1 (MTK_PIN_NO(163) | 1) 1059*b07b6162SHanks Chen #define PINMUX_GPIO163__FUNC_UFS_MPHY_SCL (MTK_PIN_NO(163) | 2) 1060*b07b6162SHanks Chen #define PINMUX_GPIO163__FUNC_DBG_MON_A23 (MTK_PIN_NO(163) | 7) 1061*b07b6162SHanks Chen 1062*b07b6162SHanks Chen #define PINMUX_GPIO164__FUNC_GPIO164 (MTK_PIN_NO(164) | 0) 1063*b07b6162SHanks Chen #define PINMUX_GPIO164__FUNC_CONN_WF_CTRL2 (MTK_PIN_NO(164) | 1) 1064*b07b6162SHanks Chen #define PINMUX_GPIO164__FUNC_UFS_MPHY_SDA (MTK_PIN_NO(164) | 2) 1065*b07b6162SHanks Chen #define PINMUX_GPIO164__FUNC_DBG_MON_A24 (MTK_PIN_NO(164) | 7) 1066*b07b6162SHanks Chen 1067*b07b6162SHanks Chen #define PINMUX_GPIO165__FUNC_GPIO165 (MTK_PIN_NO(165) | 0) 1068*b07b6162SHanks Chen #define PINMUX_GPIO165__FUNC_CONN_WF_CTRL3 (MTK_PIN_NO(165) | 1) 1069*b07b6162SHanks Chen #define PINMUX_GPIO165__FUNC_UFS_UNIPRO_SDA (MTK_PIN_NO(165) | 2) 1070*b07b6162SHanks Chen #define PINMUX_GPIO165__FUNC_DBG_MON_A25 (MTK_PIN_NO(165) | 7) 1071*b07b6162SHanks Chen 1072*b07b6162SHanks Chen #define PINMUX_GPIO166__FUNC_GPIO166 (MTK_PIN_NO(166) | 0) 1073*b07b6162SHanks Chen #define PINMUX_GPIO166__FUNC_CONN_WF_CTRL4 (MTK_PIN_NO(166) | 1) 1074*b07b6162SHanks Chen #define PINMUX_GPIO166__FUNC_UFS_UNIPRO_SCL (MTK_PIN_NO(166) | 2) 1075*b07b6162SHanks Chen #define PINMUX_GPIO166__FUNC_DBG_MON_A26 (MTK_PIN_NO(166) | 7) 1076*b07b6162SHanks Chen 1077*b07b6162SHanks Chen #define PINMUX_GPIO167__FUNC_GPIO167 (MTK_PIN_NO(167) | 0) 1078*b07b6162SHanks Chen #define PINMUX_GPIO167__FUNC_MSDC0_CMD (MTK_PIN_NO(167) | 1) 1079*b07b6162SHanks Chen 1080*b07b6162SHanks Chen #define PINMUX_GPIO168__FUNC_GPIO168 (MTK_PIN_NO(168) | 0) 1081*b07b6162SHanks Chen #define PINMUX_GPIO168__FUNC_MSDC0_DAT0 (MTK_PIN_NO(168) | 1) 1082*b07b6162SHanks Chen 1083*b07b6162SHanks Chen #define PINMUX_GPIO169__FUNC_GPIO169 (MTK_PIN_NO(169) | 0) 1084*b07b6162SHanks Chen #define PINMUX_GPIO169__FUNC_MSDC0_DAT2 (MTK_PIN_NO(169) | 1) 1085*b07b6162SHanks Chen 1086*b07b6162SHanks Chen #define PINMUX_GPIO170__FUNC_GPIO170 (MTK_PIN_NO(170) | 0) 1087*b07b6162SHanks Chen #define PINMUX_GPIO170__FUNC_MSDC0_DAT4 (MTK_PIN_NO(170) | 1) 1088*b07b6162SHanks Chen 1089*b07b6162SHanks Chen #define PINMUX_GPIO171__FUNC_GPIO171 (MTK_PIN_NO(171) | 0) 1090*b07b6162SHanks Chen #define PINMUX_GPIO171__FUNC_MSDC0_DAT6 (MTK_PIN_NO(171) | 1) 1091*b07b6162SHanks Chen 1092*b07b6162SHanks Chen #define PINMUX_GPIO172__FUNC_GPIO172 (MTK_PIN_NO(172) | 0) 1093*b07b6162SHanks Chen #define PINMUX_GPIO172__FUNC_MSDC0_DAT1 (MTK_PIN_NO(172) | 1) 1094*b07b6162SHanks Chen 1095*b07b6162SHanks Chen #define PINMUX_GPIO173__FUNC_GPIO173 (MTK_PIN_NO(173) | 0) 1096*b07b6162SHanks Chen #define PINMUX_GPIO173__FUNC_MSDC0_DAT5 (MTK_PIN_NO(173) | 1) 1097*b07b6162SHanks Chen 1098*b07b6162SHanks Chen #define PINMUX_GPIO174__FUNC_GPIO174 (MTK_PIN_NO(174) | 0) 1099*b07b6162SHanks Chen #define PINMUX_GPIO174__FUNC_MSDC0_DAT7 (MTK_PIN_NO(174) | 1) 1100*b07b6162SHanks Chen 1101*b07b6162SHanks Chen #define PINMUX_GPIO175__FUNC_GPIO175 (MTK_PIN_NO(175) | 0) 1102*b07b6162SHanks Chen #define PINMUX_GPIO175__FUNC_MSDC0_DSL (MTK_PIN_NO(175) | 1) 1103*b07b6162SHanks Chen #define PINMUX_GPIO175__FUNC_ANT_SEL9 (MTK_PIN_NO(175) | 2) 1104*b07b6162SHanks Chen 1105*b07b6162SHanks Chen #define PINMUX_GPIO176__FUNC_GPIO176 (MTK_PIN_NO(176) | 0) 1106*b07b6162SHanks Chen #define PINMUX_GPIO176__FUNC_MSDC0_CLK (MTK_PIN_NO(176) | 1) 1107*b07b6162SHanks Chen #define PINMUX_GPIO176__FUNC_ANT_SEL10 (MTK_PIN_NO(176) | 2) 1108*b07b6162SHanks Chen 1109*b07b6162SHanks Chen #define PINMUX_GPIO177__FUNC_GPIO177 (MTK_PIN_NO(177) | 0) 1110*b07b6162SHanks Chen #define PINMUX_GPIO177__FUNC_MSDC0_DAT3 (MTK_PIN_NO(177) | 1) 1111*b07b6162SHanks Chen 1112*b07b6162SHanks Chen #define PINMUX_GPIO178__FUNC_GPIO178 (MTK_PIN_NO(178) | 0) 1113*b07b6162SHanks Chen #define PINMUX_GPIO178__FUNC_MSDC0_RSTB (MTK_PIN_NO(178) | 1) 1114*b07b6162SHanks Chen 1115*b07b6162SHanks Chen #define PINMUX_GPIO179__FUNC_GPIO179 (MTK_PIN_NO(179) | 0) 1116*b07b6162SHanks Chen #define PINMUX_GPIO179__FUNC_RFIC0_BSI_EN (MTK_PIN_NO(179) | 1) 1117*b07b6162SHanks Chen 1118*b07b6162SHanks Chen #define PINMUX_GPIO180__FUNC_GPIO180 (MTK_PIN_NO(180) | 0) 1119*b07b6162SHanks Chen #define PINMUX_GPIO180__FUNC_RFIC0_BSI_CK (MTK_PIN_NO(180) | 1) 1120*b07b6162SHanks Chen 1121*b07b6162SHanks Chen #define PINMUX_GPIO181__FUNC_GPIO181 (MTK_PIN_NO(181) | 0) 1122*b07b6162SHanks Chen #define PINMUX_GPIO181__FUNC_SRCLKENA0 (MTK_PIN_NO(181) | 1) 1123*b07b6162SHanks Chen 1124*b07b6162SHanks Chen #define PINMUX_GPIO182__FUNC_GPIO182 (MTK_PIN_NO(182) | 0) 1125*b07b6162SHanks Chen #define PINMUX_GPIO182__FUNC_SRCLKENA1 (MTK_PIN_NO(182) | 1) 1126*b07b6162SHanks Chen 1127*b07b6162SHanks Chen #define PINMUX_GPIO183__FUNC_GPIO183 (MTK_PIN_NO(183) | 0) 1128*b07b6162SHanks Chen #define PINMUX_GPIO183__FUNC_WATCHDOG (MTK_PIN_NO(183) | 1) 1129*b07b6162SHanks Chen 1130*b07b6162SHanks Chen #define PINMUX_GPIO184__FUNC_GPIO184 (MTK_PIN_NO(184) | 0) 1131*b07b6162SHanks Chen #define PINMUX_GPIO184__FUNC_PWRAP_SPI0_MI (MTK_PIN_NO(184) | 1) 1132*b07b6162SHanks Chen #define PINMUX_GPIO184__FUNC_PWRAP_SPI0_MO (MTK_PIN_NO(184) | 2) 1133*b07b6162SHanks Chen 1134*b07b6162SHanks Chen #define PINMUX_GPIO185__FUNC_GPIO185 (MTK_PIN_NO(185) | 0) 1135*b07b6162SHanks Chen #define PINMUX_GPIO185__FUNC_PWRAP_SPI0_CSN (MTK_PIN_NO(185) | 1) 1136*b07b6162SHanks Chen 1137*b07b6162SHanks Chen #define PINMUX_GPIO186__FUNC_GPIO186 (MTK_PIN_NO(186) | 0) 1138*b07b6162SHanks Chen #define PINMUX_GPIO186__FUNC_PWRAP_SPI0_MO (MTK_PIN_NO(186) | 1) 1139*b07b6162SHanks Chen #define PINMUX_GPIO186__FUNC_PWRAP_SPI0_MI (MTK_PIN_NO(186) | 2) 1140*b07b6162SHanks Chen 1141*b07b6162SHanks Chen #define PINMUX_GPIO187__FUNC_GPIO187 (MTK_PIN_NO(187) | 0) 1142*b07b6162SHanks Chen #define PINMUX_GPIO187__FUNC_PWRAP_SPI0_CK (MTK_PIN_NO(187) | 1) 1143*b07b6162SHanks Chen 1144*b07b6162SHanks Chen #define PINMUX_GPIO188__FUNC_GPIO188 (MTK_PIN_NO(188) | 0) 1145*b07b6162SHanks Chen #define PINMUX_GPIO188__FUNC_RTC32K_CK (MTK_PIN_NO(188) | 1) 1146*b07b6162SHanks Chen 1147*b07b6162SHanks Chen #define PINMUX_GPIO189__FUNC_GPIO189 (MTK_PIN_NO(189) | 0) 1148*b07b6162SHanks Chen #define PINMUX_GPIO189__FUNC_AUD_CLK_MOSI (MTK_PIN_NO(189) | 1) 1149*b07b6162SHanks Chen #define PINMUX_GPIO189__FUNC_I2S1_MCK (MTK_PIN_NO(189) | 3) 1150*b07b6162SHanks Chen #define PINMUX_GPIO189__FUNC_UFS_UNIPRO_SCL (MTK_PIN_NO(189) | 6) 1151*b07b6162SHanks Chen 1152*b07b6162SHanks Chen #define PINMUX_GPIO190__FUNC_GPIO190 (MTK_PIN_NO(190) | 0) 1153*b07b6162SHanks Chen #define PINMUX_GPIO190__FUNC_AUD_SYNC_MOSI (MTK_PIN_NO(190) | 1) 1154*b07b6162SHanks Chen #define PINMUX_GPIO190__FUNC_I2S1_BCK (MTK_PIN_NO(190) | 3) 1155*b07b6162SHanks Chen #define PINMUX_GPIO190__FUNC_DBG_MON_A6 (MTK_PIN_NO(190) | 7) 1156*b07b6162SHanks Chen 1157*b07b6162SHanks Chen #define PINMUX_GPIO191__FUNC_GPIO191 (MTK_PIN_NO(191) | 0) 1158*b07b6162SHanks Chen #define PINMUX_GPIO191__FUNC_AUD_DAT_MOSI0 (MTK_PIN_NO(191) | 1) 1159*b07b6162SHanks Chen #define PINMUX_GPIO191__FUNC_I2S1_LRCK (MTK_PIN_NO(191) | 3) 1160*b07b6162SHanks Chen #define PINMUX_GPIO191__FUNC_DBG_MON_A7 (MTK_PIN_NO(191) | 7) 1161*b07b6162SHanks Chen 1162*b07b6162SHanks Chen #define PINMUX_GPIO192__FUNC_GPIO192 (MTK_PIN_NO(192) | 0) 1163*b07b6162SHanks Chen #define PINMUX_GPIO192__FUNC_AUD_DAT_MOSI1 (MTK_PIN_NO(192) | 1) 1164*b07b6162SHanks Chen #define PINMUX_GPIO192__FUNC_I2S1_DO (MTK_PIN_NO(192) | 3) 1165*b07b6162SHanks Chen #define PINMUX_GPIO192__FUNC_UFS_MPHY_SDA (MTK_PIN_NO(192) | 6) 1166*b07b6162SHanks Chen #define PINMUX_GPIO192__FUNC_DBG_MON_A8 (MTK_PIN_NO(192) | 7) 1167*b07b6162SHanks Chen 1168*b07b6162SHanks Chen #define PINMUX_GPIO193__FUNC_GPIO193 (MTK_PIN_NO(193) | 0) 1169*b07b6162SHanks Chen #define PINMUX_GPIO193__FUNC_AUD_DAT_MISO0 (MTK_PIN_NO(193) | 1) 1170*b07b6162SHanks Chen #define PINMUX_GPIO193__FUNC_VOW_DAT_MISO (MTK_PIN_NO(193) | 2) 1171*b07b6162SHanks Chen #define PINMUX_GPIO193__FUNC_I2S2_LRCK (MTK_PIN_NO(193) | 3) 1172*b07b6162SHanks Chen #define PINMUX_GPIO193__FUNC_UDI_TDI (MTK_PIN_NO(193) | 5) 1173*b07b6162SHanks Chen #define PINMUX_GPIO193__FUNC_DBG_MON_A12 (MTK_PIN_NO(193) | 7) 1174*b07b6162SHanks Chen 1175*b07b6162SHanks Chen #define PINMUX_GPIO194__FUNC_GPIO194 (MTK_PIN_NO(194) | 0) 1176*b07b6162SHanks Chen #define PINMUX_GPIO194__FUNC_AUD_DAT_MISO1 (MTK_PIN_NO(194) | 1) 1177*b07b6162SHanks Chen #define PINMUX_GPIO194__FUNC_VOW_CLK_MISO (MTK_PIN_NO(194) | 2) 1178*b07b6162SHanks Chen #define PINMUX_GPIO194__FUNC_I2S2_DI (MTK_PIN_NO(194) | 3) 1179*b07b6162SHanks Chen #define PINMUX_GPIO194__FUNC_UDI_NTRST (MTK_PIN_NO(194) | 5) 1180*b07b6162SHanks Chen #define PINMUX_GPIO194__FUNC_UFS_MPHY_SCL (MTK_PIN_NO(194) | 6) 1181*b07b6162SHanks Chen #define PINMUX_GPIO194__FUNC_DBG_MON_A13 (MTK_PIN_NO(194) | 7) 1182*b07b6162SHanks Chen 1183*b07b6162SHanks Chen #define PINMUX_GPIO195__FUNC_GPIO195 (MTK_PIN_NO(195) | 0) 1184*b07b6162SHanks Chen #define PINMUX_GPIO195__FUNC_ADSP_JTAG_TCK (MTK_PIN_NO(195) | 3) 1185*b07b6162SHanks Chen #define PINMUX_GPIO195__FUNC_VPU_UDI_TCK (MTK_PIN_NO(195) | 4) 1186*b07b6162SHanks Chen #define PINMUX_GPIO195__FUNC_SPM_JTAG_TCK (MTK_PIN_NO(195) | 5) 1187*b07b6162SHanks Chen #define PINMUX_GPIO195__FUNC_SSPM_JTAG_TCK (MTK_PIN_NO(195) | 6) 1188*b07b6162SHanks Chen 1189*b07b6162SHanks Chen #define PINMUX_GPIO196__FUNC_GPIO196 (MTK_PIN_NO(196) | 0) 1190*b07b6162SHanks Chen #define PINMUX_GPIO196__FUNC_CMMCLK4 (MTK_PIN_NO(196) | 1) 1191*b07b6162SHanks Chen #define PINMUX_GPIO196__FUNC_ADSP_JTAG_TDI (MTK_PIN_NO(196) | 3) 1192*b07b6162SHanks Chen #define PINMUX_GPIO196__FUNC_VPU_UDI_TDI (MTK_PIN_NO(196) | 4) 1193*b07b6162SHanks Chen #define PINMUX_GPIO196__FUNC_SPM_JTAG_TDI (MTK_PIN_NO(196) | 5) 1194*b07b6162SHanks Chen #define PINMUX_GPIO196__FUNC_SSPM_JTAG_TDI (MTK_PIN_NO(196) | 6) 1195*b07b6162SHanks Chen 1196*b07b6162SHanks Chen #define PINMUX_GPIO197__FUNC_GPIO197 (MTK_PIN_NO(197) | 0) 1197*b07b6162SHanks Chen #define PINMUX_GPIO197__FUNC_ADSP_JTAG_TDO (MTK_PIN_NO(197) | 3) 1198*b07b6162SHanks Chen #define PINMUX_GPIO197__FUNC_VPU_UDI_TDO (MTK_PIN_NO(197) | 4) 1199*b07b6162SHanks Chen #define PINMUX_GPIO197__FUNC_SPM_JTAG_TDO (MTK_PIN_NO(197) | 5) 1200*b07b6162SHanks Chen #define PINMUX_GPIO197__FUNC_SSPM_JTAG_TDO (MTK_PIN_NO(197) | 6) 1201*b07b6162SHanks Chen 1202*b07b6162SHanks Chen #define PINMUX_GPIO198__FUNC_GPIO198 (MTK_PIN_NO(198) | 0) 1203*b07b6162SHanks Chen #define PINMUX_GPIO198__FUNC_SCL7 (MTK_PIN_NO(198) | 1) 1204*b07b6162SHanks Chen 1205*b07b6162SHanks Chen #define PINMUX_GPIO199__FUNC_GPIO199 (MTK_PIN_NO(199) | 0) 1206*b07b6162SHanks Chen #define PINMUX_GPIO199__FUNC_SDA7 (MTK_PIN_NO(199) | 1) 1207*b07b6162SHanks Chen 1208*b07b6162SHanks Chen #define PINMUX_GPIO200__FUNC_GPIO200 (MTK_PIN_NO(200) | 0) 1209*b07b6162SHanks Chen #define PINMUX_GPIO200__FUNC_URXD1 (MTK_PIN_NO(200) | 1) 1210*b07b6162SHanks Chen #define PINMUX_GPIO200__FUNC_ADSP_URXD0 (MTK_PIN_NO(200) | 2) 1211*b07b6162SHanks Chen #define PINMUX_GPIO200__FUNC_TP_URXD1_AO (MTK_PIN_NO(200) | 3) 1212*b07b6162SHanks Chen #define PINMUX_GPIO200__FUNC_SSPM_URXD_AO (MTK_PIN_NO(200) | 4) 1213*b07b6162SHanks Chen #define PINMUX_GPIO200__FUNC_TP_URXD2_AO (MTK_PIN_NO(200) | 5) 1214*b07b6162SHanks Chen #define PINMUX_GPIO200__FUNC_MBISTREADEN_TRIGGER (MTK_PIN_NO(200) | 6) 1215*b07b6162SHanks Chen 1216*b07b6162SHanks Chen #define PINMUX_GPIO201__FUNC_GPIO201 (MTK_PIN_NO(201) | 0) 1217*b07b6162SHanks Chen #define PINMUX_GPIO201__FUNC_UTXD1 (MTK_PIN_NO(201) | 1) 1218*b07b6162SHanks Chen #define PINMUX_GPIO201__FUNC_ADSP_UTXD0 (MTK_PIN_NO(201) | 2) 1219*b07b6162SHanks Chen #define PINMUX_GPIO201__FUNC_TP_UTXD1_AO (MTK_PIN_NO(201) | 3) 1220*b07b6162SHanks Chen #define PINMUX_GPIO201__FUNC_SSPM_UTXD_AO (MTK_PIN_NO(201) | 4) 1221*b07b6162SHanks Chen #define PINMUX_GPIO201__FUNC_TP_UTXD2_AO (MTK_PIN_NO(201) | 5) 1222*b07b6162SHanks Chen #define PINMUX_GPIO201__FUNC_MBISTWRITEEN_TRIGGER (MTK_PIN_NO(201) | 6) 1223*b07b6162SHanks Chen 1224*b07b6162SHanks Chen #define PINMUX_GPIO202__FUNC_GPIO202 (MTK_PIN_NO(202) | 0) 1225*b07b6162SHanks Chen #define PINMUX_GPIO202__FUNC_PWM_3 (MTK_PIN_NO(202) | 1) 1226*b07b6162SHanks Chen #define PINMUX_GPIO202__FUNC_CLKM3 (MTK_PIN_NO(202) | 2) 1227*b07b6162SHanks Chen 1228*b07b6162SHanks Chen #define PINMUX_GPIO203__FUNC_GPIO203 (MTK_PIN_NO(203) | 0) 1229*b07b6162SHanks Chen 1230*b07b6162SHanks Chen #define PINMUX_GPIO204__FUNC_GPIO204 (MTK_PIN_NO(204) | 0) 1231*b07b6162SHanks Chen 1232*b07b6162SHanks Chen #define PINMUX_GPIO205__FUNC_GPIO205 (MTK_PIN_NO(205) | 0) 1233*b07b6162SHanks Chen 1234*b07b6162SHanks Chen #define PINMUX_GPIO206__FUNC_GPIO206 (MTK_PIN_NO(206) | 0) 1235*b07b6162SHanks Chen 1236*b07b6162SHanks Chen #define PINMUX_GPIO207__FUNC_GPIO207 (MTK_PIN_NO(207) | 0) 1237*b07b6162SHanks Chen 1238*b07b6162SHanks Chen #define PINMUX_GPIO208__FUNC_GPIO208 (MTK_PIN_NO(208) | 0) 1239*b07b6162SHanks Chen 1240*b07b6162SHanks Chen #define PINMUX_GPIO209__FUNC_GPIO209 (MTK_PIN_NO(209) | 0) 1241*b07b6162SHanks Chen 1242*b07b6162SHanks Chen #endif /* __MT6779-PINFUNC_H */ 1243