1*b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */ 29798e47fSStephen Warren /* 39798e47fSStephen Warren * This header provides constants for binding nvidia,tegra*-gpio. 49798e47fSStephen Warren * 59798e47fSStephen Warren * The first cell in Tegra's GPIO specifier is the GPIO ID. The macros below 69798e47fSStephen Warren * provide names for this. 79798e47fSStephen Warren * 89798e47fSStephen Warren * The second cell contains standard flag values specified in gpio.h. 99798e47fSStephen Warren */ 109798e47fSStephen Warren 119798e47fSStephen Warren #ifndef _DT_BINDINGS_GPIO_TEGRA_GPIO_H 129798e47fSStephen Warren #define _DT_BINDINGS_GPIO_TEGRA_GPIO_H 139798e47fSStephen Warren 149798e47fSStephen Warren #include <dt-bindings/gpio/gpio.h> 159798e47fSStephen Warren 161e48b695SStephen Warren #define TEGRA_GPIO_PORT_A 0 171e48b695SStephen Warren #define TEGRA_GPIO_PORT_B 1 181e48b695SStephen Warren #define TEGRA_GPIO_PORT_C 2 191e48b695SStephen Warren #define TEGRA_GPIO_PORT_D 3 201e48b695SStephen Warren #define TEGRA_GPIO_PORT_E 4 211e48b695SStephen Warren #define TEGRA_GPIO_PORT_F 5 221e48b695SStephen Warren #define TEGRA_GPIO_PORT_G 6 231e48b695SStephen Warren #define TEGRA_GPIO_PORT_H 7 241e48b695SStephen Warren #define TEGRA_GPIO_PORT_I 8 251e48b695SStephen Warren #define TEGRA_GPIO_PORT_J 9 261e48b695SStephen Warren #define TEGRA_GPIO_PORT_K 10 271e48b695SStephen Warren #define TEGRA_GPIO_PORT_L 11 281e48b695SStephen Warren #define TEGRA_GPIO_PORT_M 12 291e48b695SStephen Warren #define TEGRA_GPIO_PORT_N 13 301e48b695SStephen Warren #define TEGRA_GPIO_PORT_O 14 311e48b695SStephen Warren #define TEGRA_GPIO_PORT_P 15 321e48b695SStephen Warren #define TEGRA_GPIO_PORT_Q 16 331e48b695SStephen Warren #define TEGRA_GPIO_PORT_R 17 341e48b695SStephen Warren #define TEGRA_GPIO_PORT_S 18 351e48b695SStephen Warren #define TEGRA_GPIO_PORT_T 19 361e48b695SStephen Warren #define TEGRA_GPIO_PORT_U 20 371e48b695SStephen Warren #define TEGRA_GPIO_PORT_V 21 381e48b695SStephen Warren #define TEGRA_GPIO_PORT_W 22 391e48b695SStephen Warren #define TEGRA_GPIO_PORT_X 23 401e48b695SStephen Warren #define TEGRA_GPIO_PORT_Y 24 411e48b695SStephen Warren #define TEGRA_GPIO_PORT_Z 25 421e48b695SStephen Warren #define TEGRA_GPIO_PORT_AA 26 431e48b695SStephen Warren #define TEGRA_GPIO_PORT_BB 27 441e48b695SStephen Warren #define TEGRA_GPIO_PORT_CC 28 451e48b695SStephen Warren #define TEGRA_GPIO_PORT_DD 29 461e48b695SStephen Warren #define TEGRA_GPIO_PORT_EE 30 471e48b695SStephen Warren #define TEGRA_GPIO_PORT_FF 31 489798e47fSStephen Warren 491e48b695SStephen Warren #define TEGRA_GPIO(port, offset) \ 501e48b695SStephen Warren ((TEGRA_GPIO_PORT_##port * 8) + offset) 519798e47fSStephen Warren 529798e47fSStephen Warren #endif 53