xref: /linux/scripts/dtc/include-prefixes/dt-bindings/clock/sun8i-v3s-ccu.h (revision 976e3645923bdd2fe7893aae33fd7a21098bfb28)
1d0f11d14SIcenowy Zheng /*
2d0f11d14SIcenowy Zheng  * Copyright (c) 2016 Icenowy Zheng <icenowy@aosc.xyz>
3d0f11d14SIcenowy Zheng  *
4d0f11d14SIcenowy Zheng  * Based on sun8i-h3-ccu.h, which is:
5d0f11d14SIcenowy Zheng  * Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com>
6d0f11d14SIcenowy Zheng  *
7d0f11d14SIcenowy Zheng  * This file is dual-licensed: you can use it either under the terms
8d0f11d14SIcenowy Zheng  * of the GPL or the X11 license, at your option. Note that this dual
9d0f11d14SIcenowy Zheng  * licensing only applies to this file, and not this project as a
10d0f11d14SIcenowy Zheng  * whole.
11d0f11d14SIcenowy Zheng  *
12d0f11d14SIcenowy Zheng  *  a) This file is free software; you can redistribute it and/or
13d0f11d14SIcenowy Zheng  *     modify it under the terms of the GNU General Public License as
14d0f11d14SIcenowy Zheng  *     published by the Free Software Foundation; either version 2 of the
15d0f11d14SIcenowy Zheng  *     License, or (at your option) any later version.
16d0f11d14SIcenowy Zheng  *
17d0f11d14SIcenowy Zheng  *     This file is distributed in the hope that it will be useful,
18d0f11d14SIcenowy Zheng  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
19d0f11d14SIcenowy Zheng  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
20d0f11d14SIcenowy Zheng  *     GNU General Public License for more details.
21d0f11d14SIcenowy Zheng  *
22d0f11d14SIcenowy Zheng  * Or, alternatively,
23d0f11d14SIcenowy Zheng  *
24d0f11d14SIcenowy Zheng  *  b) Permission is hereby granted, free of charge, to any person
25d0f11d14SIcenowy Zheng  *     obtaining a copy of this software and associated documentation
26d0f11d14SIcenowy Zheng  *     files (the "Software"), to deal in the Software without
27d0f11d14SIcenowy Zheng  *     restriction, including without limitation the rights to use,
28d0f11d14SIcenowy Zheng  *     copy, modify, merge, publish, distribute, sublicense, and/or
29d0f11d14SIcenowy Zheng  *     sell copies of the Software, and to permit persons to whom the
30d0f11d14SIcenowy Zheng  *     Software is furnished to do so, subject to the following
31d0f11d14SIcenowy Zheng  *     conditions:
32d0f11d14SIcenowy Zheng  *
33d0f11d14SIcenowy Zheng  *     The above copyright notice and this permission notice shall be
34d0f11d14SIcenowy Zheng  *     included in all copies or substantial portions of the Software.
35d0f11d14SIcenowy Zheng  *
36d0f11d14SIcenowy Zheng  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
37d0f11d14SIcenowy Zheng  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
38d0f11d14SIcenowy Zheng  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
39d0f11d14SIcenowy Zheng  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
40d0f11d14SIcenowy Zheng  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
41d0f11d14SIcenowy Zheng  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
42d0f11d14SIcenowy Zheng  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
43d0f11d14SIcenowy Zheng  *     OTHER DEALINGS IN THE SOFTWARE.
44d0f11d14SIcenowy Zheng  */
45d0f11d14SIcenowy Zheng 
46d0f11d14SIcenowy Zheng #ifndef _DT_BINDINGS_CLK_SUN8I_V3S_H_
47d0f11d14SIcenowy Zheng #define _DT_BINDINGS_CLK_SUN8I_V3S_H_
48d0f11d14SIcenowy Zheng 
49d0f11d14SIcenowy Zheng #define CLK_CPU			14
50d0f11d14SIcenowy Zheng 
51d0f11d14SIcenowy Zheng #define CLK_BUS_CE		20
52d0f11d14SIcenowy Zheng #define CLK_BUS_DMA		21
53d0f11d14SIcenowy Zheng #define CLK_BUS_MMC0		22
54d0f11d14SIcenowy Zheng #define CLK_BUS_MMC1		23
55d0f11d14SIcenowy Zheng #define CLK_BUS_MMC2		24
56d0f11d14SIcenowy Zheng #define CLK_BUS_DRAM		25
57d0f11d14SIcenowy Zheng #define CLK_BUS_EMAC		26
58d0f11d14SIcenowy Zheng #define CLK_BUS_HSTIMER		27
59d0f11d14SIcenowy Zheng #define CLK_BUS_SPI0		28
60d0f11d14SIcenowy Zheng #define CLK_BUS_OTG		29
61d0f11d14SIcenowy Zheng #define CLK_BUS_EHCI0		30
62d0f11d14SIcenowy Zheng #define CLK_BUS_OHCI0		31
63d0f11d14SIcenowy Zheng #define CLK_BUS_VE		32
64d0f11d14SIcenowy Zheng #define CLK_BUS_TCON0		33
65d0f11d14SIcenowy Zheng #define CLK_BUS_CSI		34
66d0f11d14SIcenowy Zheng #define CLK_BUS_DE		35
67d0f11d14SIcenowy Zheng #define CLK_BUS_CODEC		36
68d0f11d14SIcenowy Zheng #define CLK_BUS_PIO		37
69d0f11d14SIcenowy Zheng #define CLK_BUS_I2C0		38
70d0f11d14SIcenowy Zheng #define CLK_BUS_I2C1		39
71d0f11d14SIcenowy Zheng #define CLK_BUS_UART0		40
72d0f11d14SIcenowy Zheng #define CLK_BUS_UART1		41
73d0f11d14SIcenowy Zheng #define CLK_BUS_UART2		42
74d0f11d14SIcenowy Zheng #define CLK_BUS_EPHY		43
75d0f11d14SIcenowy Zheng #define CLK_BUS_DBG		44
76d0f11d14SIcenowy Zheng 
77d0f11d14SIcenowy Zheng #define CLK_MMC0		45
78d0f11d14SIcenowy Zheng #define CLK_MMC0_SAMPLE		46
79d0f11d14SIcenowy Zheng #define CLK_MMC0_OUTPUT		47
80d0f11d14SIcenowy Zheng #define CLK_MMC1		48
81d0f11d14SIcenowy Zheng #define CLK_MMC1_SAMPLE		49
82d0f11d14SIcenowy Zheng #define CLK_MMC1_OUTPUT		50
83d0f11d14SIcenowy Zheng #define CLK_MMC2		51
84d0f11d14SIcenowy Zheng #define CLK_MMC2_SAMPLE		52
85d0f11d14SIcenowy Zheng #define CLK_MMC2_OUTPUT		53
86d0f11d14SIcenowy Zheng #define CLK_CE			54
87d0f11d14SIcenowy Zheng #define CLK_SPI0		55
88d0f11d14SIcenowy Zheng #define CLK_USB_PHY0		56
89d0f11d14SIcenowy Zheng #define CLK_USB_OHCI0		57
90d0f11d14SIcenowy Zheng 
91d0f11d14SIcenowy Zheng #define CLK_DRAM_VE		59
92d0f11d14SIcenowy Zheng #define CLK_DRAM_CSI		60
93d0f11d14SIcenowy Zheng #define CLK_DRAM_EHCI		61
94d0f11d14SIcenowy Zheng #define CLK_DRAM_OHCI		62
95d0f11d14SIcenowy Zheng #define CLK_DE			63
96d0f11d14SIcenowy Zheng #define CLK_TCON0		64
97d0f11d14SIcenowy Zheng #define CLK_CSI_MISC		65
98d0f11d14SIcenowy Zheng #define CLK_CSI0_MCLK		66
99d0f11d14SIcenowy Zheng #define CLK_CSI1_SCLK		67
100d0f11d14SIcenowy Zheng #define CLK_CSI1_MCLK		68
101d0f11d14SIcenowy Zheng #define CLK_VE			69
102d0f11d14SIcenowy Zheng #define CLK_AC_DIG		70
103d0f11d14SIcenowy Zheng #define CLK_AVS			71
104d0f11d14SIcenowy Zheng 
105d0f11d14SIcenowy Zheng #define CLK_MIPI_CSI		73
106d0f11d14SIcenowy Zheng 
107*0ed4c252SIcenowy Zheng /* Clocks not available on V3s */
108*0ed4c252SIcenowy Zheng #define CLK_BUS_I2S0		75
109*0ed4c252SIcenowy Zheng #define CLK_I2S0		76
110*0ed4c252SIcenowy Zheng 
111d0f11d14SIcenowy Zheng #endif /* _DT_BINDINGS_CLK_SUN8I_V3S_H_ */
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