1*fb038ce4SYangtao Li /* SPDX-License-Identifier: GPL-2.0 */ 2*fb038ce4SYangtao Li /* 3*fb038ce4SYangtao Li * Copyright (c) 2020 Yangtao Li <frank@allwinnertech.com> 4*fb038ce4SYangtao Li */ 5*fb038ce4SYangtao Li 6*fb038ce4SYangtao Li #ifndef _DT_BINDINGS_CLK_SUN50I_A100_R_CCU_H_ 7*fb038ce4SYangtao Li #define _DT_BINDINGS_CLK_SUN50I_A100_R_CCU_H_ 8*fb038ce4SYangtao Li 9*fb038ce4SYangtao Li #define CLK_R_APB1 2 10*fb038ce4SYangtao Li 11*fb038ce4SYangtao Li #define CLK_R_APB1_TIMER 4 12*fb038ce4SYangtao Li #define CLK_R_APB1_TWD 5 13*fb038ce4SYangtao Li #define CLK_R_APB1_PWM 6 14*fb038ce4SYangtao Li #define CLK_R_APB1_BUS_PWM 7 15*fb038ce4SYangtao Li #define CLK_R_APB1_PPU 8 16*fb038ce4SYangtao Li #define CLK_R_APB2_UART 9 17*fb038ce4SYangtao Li #define CLK_R_APB2_I2C0 10 18*fb038ce4SYangtao Li #define CLK_R_APB2_I2C1 11 19*fb038ce4SYangtao Li #define CLK_R_APB1_IR 12 20*fb038ce4SYangtao Li #define CLK_R_APB1_BUS_IR 13 21*fb038ce4SYangtao Li #define CLK_R_AHB_BUS_RTC 14 22*fb038ce4SYangtao Li 23*fb038ce4SYangtao Li #endif /* _DT_BINDINGS_CLK_SUN50I_A100_R_CCU_H_ */ 24