1*a6a61b97SJagadeesh Kona /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2*a6a61b97SJagadeesh Kona /* 3*a6a61b97SJagadeesh Kona * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. 4*a6a61b97SJagadeesh Kona */ 5*a6a61b97SJagadeesh Kona 6*a6a61b97SJagadeesh Kona #ifndef _DT_BINDINGS_CLK_QCOM_VIDEO_CC_SM8650_H 7*a6a61b97SJagadeesh Kona #define _DT_BINDINGS_CLK_QCOM_VIDEO_CC_SM8650_H 8*a6a61b97SJagadeesh Kona 9*a6a61b97SJagadeesh Kona #include "qcom,sm8450-videocc.h" 10*a6a61b97SJagadeesh Kona 11*a6a61b97SJagadeesh Kona /* SM8650 introduces below new clocks and resets compared to SM8450 */ 12*a6a61b97SJagadeesh Kona 13*a6a61b97SJagadeesh Kona /* VIDEO_CC clocks */ 14*a6a61b97SJagadeesh Kona #define VIDEO_CC_MVS0_SHIFT_CLK 12 15*a6a61b97SJagadeesh Kona #define VIDEO_CC_MVS0C_SHIFT_CLK 13 16*a6a61b97SJagadeesh Kona #define VIDEO_CC_MVS1_SHIFT_CLK 14 17*a6a61b97SJagadeesh Kona #define VIDEO_CC_MVS1C_SHIFT_CLK 15 18*a6a61b97SJagadeesh Kona #define VIDEO_CC_XO_CLK_SRC 16 19*a6a61b97SJagadeesh Kona 20*a6a61b97SJagadeesh Kona /* VIDEO_CC resets */ 21*a6a61b97SJagadeesh Kona #define VIDEO_CC_XO_CLK_ARES 7 22*a6a61b97SJagadeesh Kona 23*a6a61b97SJagadeesh Kona #endif 24