1*1a3b3bd1SNeil Armstrong /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2*1a3b3bd1SNeil Armstrong /* 3*1a3b3bd1SNeil Armstrong * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. 4*1a3b3bd1SNeil Armstrong * Copyright (c) 2023, Linaro Limited 5*1a3b3bd1SNeil Armstrong */ 6*1a3b3bd1SNeil Armstrong 7*1a3b3bd1SNeil Armstrong #ifndef _DT_BINDINGS_CLK_QCOM_TCSR_CC_SM8650_H 8*1a3b3bd1SNeil Armstrong #define _DT_BINDINGS_CLK_QCOM_TCSR_CC_SM8650_H 9*1a3b3bd1SNeil Armstrong 10*1a3b3bd1SNeil Armstrong /* TCSR CC clocks */ 11*1a3b3bd1SNeil Armstrong #define TCSR_PCIE_0_CLKREF_EN 0 12*1a3b3bd1SNeil Armstrong #define TCSR_PCIE_1_CLKREF_EN 1 13*1a3b3bd1SNeil Armstrong #define TCSR_UFS_CLKREF_EN 2 14*1a3b3bd1SNeil Armstrong #define TCSR_UFS_PAD_CLKREF_EN 3 15*1a3b3bd1SNeil Armstrong #define TCSR_USB2_CLKREF_EN 4 16*1a3b3bd1SNeil Armstrong #define TCSR_USB3_CLKREF_EN 5 17*1a3b3bd1SNeil Armstrong 18*1a3b3bd1SNeil Armstrong #endif 19