1*717607f1SKonrad Dybcio /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2*717607f1SKonrad Dybcio /* 3*717607f1SKonrad Dybcio * Copyright (c) 2022, The Linux Foundation. All rights reserved. 4*717607f1SKonrad Dybcio * Copyright (c) 2022, Linaro Limited 5*717607f1SKonrad Dybcio */ 6*717607f1SKonrad Dybcio 7*717607f1SKonrad Dybcio #ifndef _DT_BINDINGS_CLK_QCOM_CAMCC_SM6350_H 8*717607f1SKonrad Dybcio #define _DT_BINDINGS_CLK_QCOM_CAMCC_SM6350_H 9*717607f1SKonrad Dybcio 10*717607f1SKonrad Dybcio /* CAMCC clocks */ 11*717607f1SKonrad Dybcio #define CAMCC_PLL2_OUT_EARLY 0 12*717607f1SKonrad Dybcio #define CAMCC_PLL0 1 13*717607f1SKonrad Dybcio #define CAMCC_PLL0_OUT_EVEN 2 14*717607f1SKonrad Dybcio #define CAMCC_PLL1 3 15*717607f1SKonrad Dybcio #define CAMCC_PLL1_OUT_EVEN 4 16*717607f1SKonrad Dybcio #define CAMCC_PLL2 5 17*717607f1SKonrad Dybcio #define CAMCC_PLL2_OUT_MAIN 6 18*717607f1SKonrad Dybcio #define CAMCC_PLL3 7 19*717607f1SKonrad Dybcio #define CAMCC_BPS_AHB_CLK 8 20*717607f1SKonrad Dybcio #define CAMCC_BPS_AREG_CLK 9 21*717607f1SKonrad Dybcio #define CAMCC_BPS_AXI_CLK 10 22*717607f1SKonrad Dybcio #define CAMCC_BPS_CLK 11 23*717607f1SKonrad Dybcio #define CAMCC_BPS_CLK_SRC 12 24*717607f1SKonrad Dybcio #define CAMCC_CAMNOC_ATB_CLK 13 25*717607f1SKonrad Dybcio #define CAMCC_CAMNOC_AXI_CLK 14 26*717607f1SKonrad Dybcio #define CAMCC_CCI_0_CLK 15 27*717607f1SKonrad Dybcio #define CAMCC_CCI_0_CLK_SRC 16 28*717607f1SKonrad Dybcio #define CAMCC_CCI_1_CLK 17 29*717607f1SKonrad Dybcio #define CAMCC_CCI_1_CLK_SRC 18 30*717607f1SKonrad Dybcio #define CAMCC_CORE_AHB_CLK 19 31*717607f1SKonrad Dybcio #define CAMCC_CPAS_AHB_CLK 20 32*717607f1SKonrad Dybcio #define CAMCC_CPHY_RX_CLK_SRC 21 33*717607f1SKonrad Dybcio #define CAMCC_CSI0PHYTIMER_CLK 22 34*717607f1SKonrad Dybcio #define CAMCC_CSI0PHYTIMER_CLK_SRC 23 35*717607f1SKonrad Dybcio #define CAMCC_CSI1PHYTIMER_CLK 24 36*717607f1SKonrad Dybcio #define CAMCC_CSI1PHYTIMER_CLK_SRC 25 37*717607f1SKonrad Dybcio #define CAMCC_CSI2PHYTIMER_CLK 26 38*717607f1SKonrad Dybcio #define CAMCC_CSI2PHYTIMER_CLK_SRC 27 39*717607f1SKonrad Dybcio #define CAMCC_CSI3PHYTIMER_CLK 28 40*717607f1SKonrad Dybcio #define CAMCC_CSI3PHYTIMER_CLK_SRC 29 41*717607f1SKonrad Dybcio #define CAMCC_CSIPHY0_CLK 30 42*717607f1SKonrad Dybcio #define CAMCC_CSIPHY1_CLK 31 43*717607f1SKonrad Dybcio #define CAMCC_CSIPHY2_CLK 32 44*717607f1SKonrad Dybcio #define CAMCC_CSIPHY3_CLK 33 45*717607f1SKonrad Dybcio #define CAMCC_FAST_AHB_CLK_SRC 34 46*717607f1SKonrad Dybcio #define CAMCC_ICP_APB_CLK 35 47*717607f1SKonrad Dybcio #define CAMCC_ICP_ATB_CLK 36 48*717607f1SKonrad Dybcio #define CAMCC_ICP_CLK 37 49*717607f1SKonrad Dybcio #define CAMCC_ICP_CLK_SRC 38 50*717607f1SKonrad Dybcio #define CAMCC_ICP_CTI_CLK 39 51*717607f1SKonrad Dybcio #define CAMCC_ICP_TS_CLK 40 52*717607f1SKonrad Dybcio #define CAMCC_IFE_0_AXI_CLK 41 53*717607f1SKonrad Dybcio #define CAMCC_IFE_0_CLK 42 54*717607f1SKonrad Dybcio #define CAMCC_IFE_0_CLK_SRC 43 55*717607f1SKonrad Dybcio #define CAMCC_IFE_0_CPHY_RX_CLK 44 56*717607f1SKonrad Dybcio #define CAMCC_IFE_0_CSID_CLK 45 57*717607f1SKonrad Dybcio #define CAMCC_IFE_0_CSID_CLK_SRC 46 58*717607f1SKonrad Dybcio #define CAMCC_IFE_0_DSP_CLK 47 59*717607f1SKonrad Dybcio #define CAMCC_IFE_1_AXI_CLK 48 60*717607f1SKonrad Dybcio #define CAMCC_IFE_1_CLK 49 61*717607f1SKonrad Dybcio #define CAMCC_IFE_1_CLK_SRC 50 62*717607f1SKonrad Dybcio #define CAMCC_IFE_1_CPHY_RX_CLK 51 63*717607f1SKonrad Dybcio #define CAMCC_IFE_1_CSID_CLK 52 64*717607f1SKonrad Dybcio #define CAMCC_IFE_1_CSID_CLK_SRC 53 65*717607f1SKonrad Dybcio #define CAMCC_IFE_1_DSP_CLK 54 66*717607f1SKonrad Dybcio #define CAMCC_IFE_2_AXI_CLK 55 67*717607f1SKonrad Dybcio #define CAMCC_IFE_2_CLK 56 68*717607f1SKonrad Dybcio #define CAMCC_IFE_2_CLK_SRC 57 69*717607f1SKonrad Dybcio #define CAMCC_IFE_2_CPHY_RX_CLK 58 70*717607f1SKonrad Dybcio #define CAMCC_IFE_2_CSID_CLK 59 71*717607f1SKonrad Dybcio #define CAMCC_IFE_2_CSID_CLK_SRC 60 72*717607f1SKonrad Dybcio #define CAMCC_IFE_2_DSP_CLK 61 73*717607f1SKonrad Dybcio #define CAMCC_IFE_LITE_CLK 62 74*717607f1SKonrad Dybcio #define CAMCC_IFE_LITE_CLK_SRC 63 75*717607f1SKonrad Dybcio #define CAMCC_IFE_LITE_CPHY_RX_CLK 64 76*717607f1SKonrad Dybcio #define CAMCC_IFE_LITE_CSID_CLK 65 77*717607f1SKonrad Dybcio #define CAMCC_IFE_LITE_CSID_CLK_SRC 66 78*717607f1SKonrad Dybcio #define CAMCC_IPE_0_AHB_CLK 67 79*717607f1SKonrad Dybcio #define CAMCC_IPE_0_AREG_CLK 68 80*717607f1SKonrad Dybcio #define CAMCC_IPE_0_AXI_CLK 69 81*717607f1SKonrad Dybcio #define CAMCC_IPE_0_CLK 70 82*717607f1SKonrad Dybcio #define CAMCC_IPE_0_CLK_SRC 71 83*717607f1SKonrad Dybcio #define CAMCC_JPEG_CLK 72 84*717607f1SKonrad Dybcio #define CAMCC_JPEG_CLK_SRC 73 85*717607f1SKonrad Dybcio #define CAMCC_LRME_CLK 74 86*717607f1SKonrad Dybcio #define CAMCC_LRME_CLK_SRC 75 87*717607f1SKonrad Dybcio #define CAMCC_MCLK0_CLK 76 88*717607f1SKonrad Dybcio #define CAMCC_MCLK0_CLK_SRC 77 89*717607f1SKonrad Dybcio #define CAMCC_MCLK1_CLK 78 90*717607f1SKonrad Dybcio #define CAMCC_MCLK1_CLK_SRC 79 91*717607f1SKonrad Dybcio #define CAMCC_MCLK2_CLK 80 92*717607f1SKonrad Dybcio #define CAMCC_MCLK2_CLK_SRC 81 93*717607f1SKonrad Dybcio #define CAMCC_MCLK3_CLK 82 94*717607f1SKonrad Dybcio #define CAMCC_MCLK3_CLK_SRC 83 95*717607f1SKonrad Dybcio #define CAMCC_MCLK4_CLK 84 96*717607f1SKonrad Dybcio #define CAMCC_MCLK4_CLK_SRC 85 97*717607f1SKonrad Dybcio #define CAMCC_SLOW_AHB_CLK_SRC 86 98*717607f1SKonrad Dybcio #define CAMCC_SOC_AHB_CLK 87 99*717607f1SKonrad Dybcio #define CAMCC_SYS_TMR_CLK 88 100*717607f1SKonrad Dybcio 101*717607f1SKonrad Dybcio /* GDSCs */ 102*717607f1SKonrad Dybcio #define BPS_GDSC 0 103*717607f1SKonrad Dybcio #define IPE_0_GDSC 1 104*717607f1SKonrad Dybcio #define IFE_0_GDSC 2 105*717607f1SKonrad Dybcio #define IFE_1_GDSC 3 106*717607f1SKonrad Dybcio #define IFE_2_GDSC 4 107*717607f1SKonrad Dybcio #define TITAN_TOP_GDSC 5 108*717607f1SKonrad Dybcio 109*717607f1SKonrad Dybcio #endif 110