xref: /linux/scripts/dtc/include-prefixes/dt-bindings/clock/qcom,sar2130p-gpucc.h (revision 9f3a2ba62c7226a6604b8aaeb92b5ff906fa4e6b)
1*11148102SKonrad Dybcio /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2*11148102SKonrad Dybcio /*
3*11148102SKonrad Dybcio  * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved
4*11148102SKonrad Dybcio  * Copyright (c) 2024, Linaro Limited
5*11148102SKonrad Dybcio  */
6*11148102SKonrad Dybcio 
7*11148102SKonrad Dybcio #ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_SAR2130P_H
8*11148102SKonrad Dybcio #define _DT_BINDINGS_CLK_QCOM_GPU_CC_SAR2130P_H
9*11148102SKonrad Dybcio 
10*11148102SKonrad Dybcio /* GPU_CC clocks */
11*11148102SKonrad Dybcio #define GPU_CC_AHB_CLK				0
12*11148102SKonrad Dybcio #define GPU_CC_CRC_AHB_CLK			1
13*11148102SKonrad Dybcio #define GPU_CC_CX_FF_CLK			2
14*11148102SKonrad Dybcio #define GPU_CC_CX_GMU_CLK			3
15*11148102SKonrad Dybcio #define GPU_CC_CXO_AON_CLK			4
16*11148102SKonrad Dybcio #define GPU_CC_CXO_CLK				5
17*11148102SKonrad Dybcio #define GPU_CC_FF_CLK_SRC			6
18*11148102SKonrad Dybcio #define GPU_CC_GMU_CLK_SRC			7
19*11148102SKonrad Dybcio #define GPU_CC_GX_GMU_CLK			8
20*11148102SKonrad Dybcio #define GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK		9
21*11148102SKonrad Dybcio #define GPU_CC_HUB_AON_CLK			10
22*11148102SKonrad Dybcio #define GPU_CC_HUB_CLK_SRC			11
23*11148102SKonrad Dybcio #define GPU_CC_HUB_CX_INT_CLK			12
24*11148102SKonrad Dybcio #define GPU_CC_MEMNOC_GFX_CLK			13
25*11148102SKonrad Dybcio #define GPU_CC_PLL0				14
26*11148102SKonrad Dybcio #define GPU_CC_PLL1				15
27*11148102SKonrad Dybcio #define GPU_CC_SLEEP_CLK			16
28*11148102SKonrad Dybcio 
29*11148102SKonrad Dybcio /* GDSCs */
30*11148102SKonrad Dybcio #define GPU_GX_GDSC				0
31*11148102SKonrad Dybcio #define GPU_CX_GDSC				1
32*11148102SKonrad Dybcio 
33*11148102SKonrad Dybcio #endif
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