xref: /linux/scripts/dtc/include-prefixes/dt-bindings/clock/microchip,mpfs-clock.h (revision 2145bb687e3fdb128066872fd952f4563d89177e)
1*2145bb68SDaire McNamara /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2*2145bb68SDaire McNamara /*
3*2145bb68SDaire McNamara  * Daire McNamara,<daire.mcnamara@microchip.com>
4*2145bb68SDaire McNamara  * Copyright (C) 2020 Microchip Technology Inc.  All rights reserved.
5*2145bb68SDaire McNamara  */
6*2145bb68SDaire McNamara 
7*2145bb68SDaire McNamara #ifndef _DT_BINDINGS_CLK_MICROCHIP_MPFS_H_
8*2145bb68SDaire McNamara #define _DT_BINDINGS_CLK_MICROCHIP_MPFS_H_
9*2145bb68SDaire McNamara 
10*2145bb68SDaire McNamara #define CLK_CPU		0
11*2145bb68SDaire McNamara #define CLK_AXI		1
12*2145bb68SDaire McNamara #define CLK_AHB		2
13*2145bb68SDaire McNamara 
14*2145bb68SDaire McNamara #define CLK_ENVM	3
15*2145bb68SDaire McNamara #define CLK_MAC0	4
16*2145bb68SDaire McNamara #define CLK_MAC1	5
17*2145bb68SDaire McNamara #define CLK_MMC		6
18*2145bb68SDaire McNamara #define CLK_TIMER	7
19*2145bb68SDaire McNamara #define CLK_MMUART0	8
20*2145bb68SDaire McNamara #define CLK_MMUART1	9
21*2145bb68SDaire McNamara #define CLK_MMUART2	10
22*2145bb68SDaire McNamara #define CLK_MMUART3	11
23*2145bb68SDaire McNamara #define CLK_MMUART4	12
24*2145bb68SDaire McNamara #define CLK_SPI0	13
25*2145bb68SDaire McNamara #define CLK_SPI1	14
26*2145bb68SDaire McNamara #define CLK_I2C0	15
27*2145bb68SDaire McNamara #define CLK_I2C1	16
28*2145bb68SDaire McNamara #define CLK_CAN0	17
29*2145bb68SDaire McNamara #define CLK_CAN1	18
30*2145bb68SDaire McNamara #define CLK_USB		19
31*2145bb68SDaire McNamara #define CLK_RESERVED	20
32*2145bb68SDaire McNamara #define CLK_RTC		21
33*2145bb68SDaire McNamara #define CLK_QSPI	22
34*2145bb68SDaire McNamara #define CLK_GPIO0	23
35*2145bb68SDaire McNamara #define CLK_GPIO1	24
36*2145bb68SDaire McNamara #define CLK_GPIO2	25
37*2145bb68SDaire McNamara #define CLK_DDRC	26
38*2145bb68SDaire McNamara #define CLK_FIC0	27
39*2145bb68SDaire McNamara #define CLK_FIC1	28
40*2145bb68SDaire McNamara #define CLK_FIC2	29
41*2145bb68SDaire McNamara #define CLK_FIC3	30
42*2145bb68SDaire McNamara #define CLK_ATHENA	31
43*2145bb68SDaire McNamara #define CLK_CFM		32
44*2145bb68SDaire McNamara 
45*2145bb68SDaire McNamara #endif	/* _DT_BINDINGS_CLK_MICROCHIP_MPFS_H_ */
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