1*92cd8bb2SÁlvaro Fernández Rojas /* SPDX-License-Identifier: GPL-2.0+ */ 2*92cd8bb2SÁlvaro Fernández Rojas 3*92cd8bb2SÁlvaro Fernández Rojas #ifndef __DT_BINDINGS_CLOCK_BCM6328_H 4*92cd8bb2SÁlvaro Fernández Rojas #define __DT_BINDINGS_CLOCK_BCM6328_H 5*92cd8bb2SÁlvaro Fernández Rojas 6*92cd8bb2SÁlvaro Fernández Rojas #define BCM6328_CLK_PHYMIPS 0 7*92cd8bb2SÁlvaro Fernández Rojas #define BCM6328_CLK_ADSL_QPROC 1 8*92cd8bb2SÁlvaro Fernández Rojas #define BCM6328_CLK_ADSL_AFE 2 9*92cd8bb2SÁlvaro Fernández Rojas #define BCM6328_CLK_ADSL 3 10*92cd8bb2SÁlvaro Fernández Rojas #define BCM6328_CLK_MIPS 4 11*92cd8bb2SÁlvaro Fernández Rojas #define BCM6328_CLK_SAR 5 12*92cd8bb2SÁlvaro Fernández Rojas #define BCM6328_CLK_PCM 6 13*92cd8bb2SÁlvaro Fernández Rojas #define BCM6328_CLK_USBD 7 14*92cd8bb2SÁlvaro Fernández Rojas #define BCM6328_CLK_USBH 8 15*92cd8bb2SÁlvaro Fernández Rojas #define BCM6328_CLK_HSSPI 9 16*92cd8bb2SÁlvaro Fernández Rojas #define BCM6328_CLK_PCIE 10 17*92cd8bb2SÁlvaro Fernández Rojas #define BCM6328_CLK_ROBOSW 11 18*92cd8bb2SÁlvaro Fernández Rojas 19*92cd8bb2SÁlvaro Fernández Rojas #endif /* __DT_BINDINGS_CLOCK_BCM6328_H */ 20