xref: /linux/scripts/dtc/include-prefixes/dt-bindings/clock/at91.h (revision 641b0c64b85a9b21110268f511f20d6887406117)
1a636cd6cSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-or-later */
235d35aaeSTushar Behera /*
335d35aaeSTushar Behera  * This header provides constants for AT91 pmc status.
435d35aaeSTushar Behera  *
535d35aaeSTushar Behera  * The constants defined in this header are being used in dts.
635d35aaeSTushar Behera  */
735d35aaeSTushar Behera 
835d35aaeSTushar Behera #ifndef _DT_BINDINGS_CLK_AT91_H
935d35aaeSTushar Behera #define _DT_BINDINGS_CLK_AT91_H
1035d35aaeSTushar Behera 
11d387ff54SAlexandre Belloni #define PMC_TYPE_CORE		0
12d387ff54SAlexandre Belloni #define PMC_TYPE_SYSTEM		1
13d387ff54SAlexandre Belloni #define PMC_TYPE_PERIPHERAL	2
14d387ff54SAlexandre Belloni #define PMC_TYPE_GCK		3
1599767cd4SMichał Mirosław #define PMC_TYPE_PROGRAMMABLE	4
16d387ff54SAlexandre Belloni 
17d387ff54SAlexandre Belloni #define PMC_SLOW		0
18d387ff54SAlexandre Belloni #define PMC_MCK			1
19d387ff54SAlexandre Belloni #define PMC_UTMI		2
20d387ff54SAlexandre Belloni #define PMC_MAIN		3
21d387ff54SAlexandre Belloni #define PMC_MCK2		4
22d387ff54SAlexandre Belloni #define PMC_I2S0_MUX		5
23d387ff54SAlexandre Belloni #define PMC_I2S1_MUX		6
2403a1ee1dSMichał Mirosław #define PMC_PLLACK		7
2503a1ee1dSMichał Mirosław #define PMC_PLLBCK		8
2603a1ee1dSMichał Mirosław #define PMC_AUDIOPLLCK		9
27ea2be22fSZixun LI #define PMC_AUDIOPINCK		10
28d387ff54SAlexandre Belloni 
293d86ee17SEugen Hristev /* SAMA7G5 */
303d86ee17SEugen Hristev #define PMC_CPUPLL		(PMC_MAIN + 1)
313d86ee17SEugen Hristev #define PMC_SYSPLL		(PMC_MAIN + 2)
323d86ee17SEugen Hristev #define PMC_DDRPLL		(PMC_MAIN + 3)
333d86ee17SEugen Hristev #define PMC_IMGPLL		(PMC_MAIN + 4)
343d86ee17SEugen Hristev #define PMC_BAUDPLL		(PMC_MAIN + 5)
353d86ee17SEugen Hristev #define PMC_AUDIOPMCPLL		(PMC_MAIN + 6)
363d86ee17SEugen Hristev #define PMC_AUDIOIOPLL		(PMC_MAIN + 7)
373d86ee17SEugen Hristev #define PMC_ETHPLL		(PMC_MAIN + 8)
3891f3bf0dSClaudiu Beznea #define PMC_CPU			(PMC_MAIN + 9)
39a5ab04afSTudor Ambarus #define PMC_MCK1		(PMC_MAIN + 10)
403d86ee17SEugen Hristev 
413dc73106SVarshini Rajendran /* SAM9X7 */
423dc73106SVarshini Rajendran #define PMC_PLLADIV2		(PMC_MAIN + 11)
433dc73106SVarshini Rajendran #define PMC_LVDSPLL		(PMC_MAIN + 12)
443dc73106SVarshini Rajendran 
45*1c9eb9e6SDharma Balasubiramani /* SAMA7D65 */
46*1c9eb9e6SDharma Balasubiramani #define PMC_MCK3		(PMC_MAIN + 13)
47*1c9eb9e6SDharma Balasubiramani #define PMC_MCK5		(PMC_MAIN + 14)
48*1c9eb9e6SDharma Balasubiramani 
49d387ff54SAlexandre Belloni #ifndef AT91_PMC_MOSCS
5035d35aaeSTushar Behera #define AT91_PMC_MOSCS		0		/* MOSCS Flag */
5135d35aaeSTushar Behera #define AT91_PMC_LOCKA		1		/* PLLA Lock */
5235d35aaeSTushar Behera #define AT91_PMC_LOCKB		2		/* PLLB Lock */
5335d35aaeSTushar Behera #define AT91_PMC_MCKRDY		3		/* Master Clock */
5435d35aaeSTushar Behera #define AT91_PMC_LOCKU		6		/* UPLL Lock */
5535d35aaeSTushar Behera #define AT91_PMC_PCKRDY(id)	(8 + (id))	/* Programmable Clock */
5635d35aaeSTushar Behera #define AT91_PMC_MOSCSELS	16		/* Main Oscillator Selection */
5735d35aaeSTushar Behera #define AT91_PMC_MOSCRCS	17		/* Main On-Chip RC */
5835d35aaeSTushar Behera #define AT91_PMC_CFDEV		18		/* Clock Failure Detector Event */
59a5752e57SNicolas Ferre #define AT91_PMC_GCKRDY		24		/* Generated Clocks */
60d387ff54SAlexandre Belloni #endif
6135d35aaeSTushar Behera 
62d87daa18SClaudiu Beznea /* Slow clock. */
63d87daa18SClaudiu Beznea #define SCKC_MD_SLCK		0
64d87daa18SClaudiu Beznea #define SCKC_TD_SLCK		1
65d87daa18SClaudiu Beznea 
6635d35aaeSTushar Behera #endif
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