xref: /linux/scripts/dtc/include-prefixes/arm64/xilinx/zynqmp.dtsi (revision 9c36339215359c7d2a04e9d4caa925a2766e5864)
1b9c74682SMichal Simek// SPDX-License-Identifier: GPL-2.0+
25d1b79d2SMichal Simek/*
35d1b79d2SMichal Simek * dts file for Xilinx ZynqMP
45d1b79d2SMichal Simek *
55d1b79d2SMichal Simek * (C) Copyright 2014 - 2015, Xilinx, Inc.
65d1b79d2SMichal Simek *
75d1b79d2SMichal Simek * Michal Simek <michal.simek@xilinx.com>
85d1b79d2SMichal Simek *
95d1b79d2SMichal Simek * This program is free software; you can redistribute it and/or
105d1b79d2SMichal Simek * modify it under the terms of the GNU General Public License as
115d1b79d2SMichal Simek * published by the Free Software Foundation; either version 2 of
125d1b79d2SMichal Simek * the License, or (at your option) any later version.
135d1b79d2SMichal Simek */
145d1b79d2SMichal Simek
155d1b79d2SMichal Simek/ {
165d1b79d2SMichal Simek	compatible = "xlnx,zynqmp";
175d1b79d2SMichal Simek	#address-cells = <2>;
187393fd86SMichal Simek	#size-cells = <2>;
195d1b79d2SMichal Simek
205d1b79d2SMichal Simek	cpus {
215d1b79d2SMichal Simek		#address-cells = <1>;
225d1b79d2SMichal Simek		#size-cells = <0>;
235d1b79d2SMichal Simek
24400e188fSMichal Simek		cpu0: cpu@0 {
2531af04cdSRob Herring			compatible = "arm,cortex-a53";
265d1b79d2SMichal Simek			device_type = "cpu";
275d1b79d2SMichal Simek			enable-method = "psci";
28e31b7bb8SShubhrajyoti Datta			operating-points-v2 = <&cpu_opp_table>;
295d1b79d2SMichal Simek			reg = <0x0>;
301e4e25c8SStefan Krsmanovic			cpu-idle-states = <&CPU_SLEEP_0>;
315d1b79d2SMichal Simek		};
325d1b79d2SMichal Simek
33400e188fSMichal Simek		cpu1: cpu@1 {
3431af04cdSRob Herring			compatible = "arm,cortex-a53";
355d1b79d2SMichal Simek			device_type = "cpu";
365d1b79d2SMichal Simek			enable-method = "psci";
375d1b79d2SMichal Simek			reg = <0x1>;
38e31b7bb8SShubhrajyoti Datta			operating-points-v2 = <&cpu_opp_table>;
391e4e25c8SStefan Krsmanovic			cpu-idle-states = <&CPU_SLEEP_0>;
405d1b79d2SMichal Simek		};
415d1b79d2SMichal Simek
42400e188fSMichal Simek		cpu2: cpu@2 {
4331af04cdSRob Herring			compatible = "arm,cortex-a53";
445d1b79d2SMichal Simek			device_type = "cpu";
455d1b79d2SMichal Simek			enable-method = "psci";
465d1b79d2SMichal Simek			reg = <0x2>;
47e31b7bb8SShubhrajyoti Datta			operating-points-v2 = <&cpu_opp_table>;
481e4e25c8SStefan Krsmanovic			cpu-idle-states = <&CPU_SLEEP_0>;
495d1b79d2SMichal Simek		};
505d1b79d2SMichal Simek
51400e188fSMichal Simek		cpu3: cpu@3 {
5231af04cdSRob Herring			compatible = "arm,cortex-a53";
535d1b79d2SMichal Simek			device_type = "cpu";
545d1b79d2SMichal Simek			enable-method = "psci";
555d1b79d2SMichal Simek			reg = <0x3>;
56e31b7bb8SShubhrajyoti Datta			operating-points-v2 = <&cpu_opp_table>;
571e4e25c8SStefan Krsmanovic			cpu-idle-states = <&CPU_SLEEP_0>;
581e4e25c8SStefan Krsmanovic		};
591e4e25c8SStefan Krsmanovic
601e4e25c8SStefan Krsmanovic		idle-states {
61e9880240SAmit Kucheria			entry-method = "psci";
621e4e25c8SStefan Krsmanovic
631e4e25c8SStefan Krsmanovic			CPU_SLEEP_0: cpu-sleep-0 {
641e4e25c8SStefan Krsmanovic				compatible = "arm,idle-state";
651e4e25c8SStefan Krsmanovic				arm,psci-suspend-param = <0x40000000>;
661e4e25c8SStefan Krsmanovic				local-timer-stop;
671e4e25c8SStefan Krsmanovic				entry-latency-us = <300>;
681e4e25c8SStefan Krsmanovic				exit-latency-us = <600>;
691e4e25c8SStefan Krsmanovic				min-residency-us = <10000>;
701e4e25c8SStefan Krsmanovic			};
715d1b79d2SMichal Simek		};
725d1b79d2SMichal Simek	};
735d1b79d2SMichal Simek
74d1d4445aSMichal Simek	cpu_opp_table: cpu-opp-table {
75e31b7bb8SShubhrajyoti Datta		compatible = "operating-points-v2";
76e31b7bb8SShubhrajyoti Datta		opp-shared;
77e31b7bb8SShubhrajyoti Datta		opp00 {
78e31b7bb8SShubhrajyoti Datta			opp-hz = /bits/ 64 <1199999988>;
79e31b7bb8SShubhrajyoti Datta			opp-microvolt = <1000000>;
80e31b7bb8SShubhrajyoti Datta			clock-latency-ns = <500000>;
81e31b7bb8SShubhrajyoti Datta		};
82e31b7bb8SShubhrajyoti Datta		opp01 {
83e31b7bb8SShubhrajyoti Datta			opp-hz = /bits/ 64 <599999994>;
84e31b7bb8SShubhrajyoti Datta			opp-microvolt = <1000000>;
85e31b7bb8SShubhrajyoti Datta			clock-latency-ns = <500000>;
86e31b7bb8SShubhrajyoti Datta		};
87e31b7bb8SShubhrajyoti Datta		opp02 {
88e31b7bb8SShubhrajyoti Datta			opp-hz = /bits/ 64 <399999996>;
89e31b7bb8SShubhrajyoti Datta			opp-microvolt = <1000000>;
90e31b7bb8SShubhrajyoti Datta			clock-latency-ns = <500000>;
91e31b7bb8SShubhrajyoti Datta		};
92e31b7bb8SShubhrajyoti Datta		opp03 {
93e31b7bb8SShubhrajyoti Datta			opp-hz = /bits/ 64 <299999997>;
94e31b7bb8SShubhrajyoti Datta			opp-microvolt = <1000000>;
95e31b7bb8SShubhrajyoti Datta			clock-latency-ns = <500000>;
96e31b7bb8SShubhrajyoti Datta		};
97e31b7bb8SShubhrajyoti Datta	};
98e31b7bb8SShubhrajyoti Datta
9917e76f95SMichal Simek	dcc: dcc {
10017e76f95SMichal Simek		compatible = "arm,dcc";
10117e76f95SMichal Simek		status = "disabled";
10217e76f95SMichal Simek	};
10317e76f95SMichal Simek
1045d1b79d2SMichal Simek	pmu {
1055d1b79d2SMichal Simek		compatible = "arm,armv8-pmuv3";
106886e7dddSMichal Simek		interrupt-parent = <&gic>;
1075d1b79d2SMichal Simek		interrupts = <0 143 4>,
1085d1b79d2SMichal Simek			     <0 144 4>,
1095d1b79d2SMichal Simek			     <0 145 4>,
1105d1b79d2SMichal Simek			     <0 146 4>;
1115d1b79d2SMichal Simek	};
1125d1b79d2SMichal Simek
1135d1b79d2SMichal Simek	psci {
1145d1b79d2SMichal Simek		compatible = "arm,psci-0.2";
1155d1b79d2SMichal Simek		method = "smc";
1165d1b79d2SMichal Simek	};
1175d1b79d2SMichal Simek
118ef0d933eSRajan Vaja	firmware {
119ef0d933eSRajan Vaja		zynqmp_firmware: zynqmp-firmware {
120ef0d933eSRajan Vaja			compatible = "xlnx,zynqmp-firmware";
121ef0d933eSRajan Vaja			method = "smc";
122*9c363392SNava kishore Manne
123*9c363392SNava kishore Manne			zynqmp_pcap: pcap {
124*9c363392SNava kishore Manne				compatible = "xlnx,zynqmp-pcap-fpga";
125*9c363392SNava kishore Manne			};
126ef0d933eSRajan Vaja		};
127ef0d933eSRajan Vaja	};
128ef0d933eSRajan Vaja
1295d1b79d2SMichal Simek	timer {
1305d1b79d2SMichal Simek		compatible = "arm,armv8-timer";
1315d1b79d2SMichal Simek		interrupt-parent = <&gic>;
132f2a89d3bSMarc Zyngier		interrupts = <1 13 0xf08>,
133f2a89d3bSMarc Zyngier			     <1 14 0xf08>,
134f2a89d3bSMarc Zyngier			     <1 11 0xf08>,
135f2a89d3bSMarc Zyngier			     <1 10 0xf08>;
1365d1b79d2SMichal Simek	};
1375d1b79d2SMichal Simek
138d1d4445aSMichal Simek	amba_apu: amba-apu@0 {
1395d1b79d2SMichal Simek		compatible = "simple-bus";
1405d1b79d2SMichal Simek		#address-cells = <2>;
1415d1b79d2SMichal Simek		#size-cells = <1>;
1427393fd86SMichal Simek		ranges = <0 0 0 0 0xffffffff>;
1435d1b79d2SMichal Simek
1445d1b79d2SMichal Simek		gic: interrupt-controller@f9010000 {
1455d1b79d2SMichal Simek			compatible = "arm,gic-400", "arm,cortex-a15-gic";
1465d1b79d2SMichal Simek			#interrupt-cells = <3>;
1475d1b79d2SMichal Simek			reg = <0x0 0xf9010000 0x10000>,
148e753dc03SAlexander Graf			      <0x0 0xf9020000 0x20000>,
1495d1b79d2SMichal Simek			      <0x0 0xf9040000 0x20000>,
150e753dc03SAlexander Graf			      <0x0 0xf9060000 0x20000>;
1515d1b79d2SMichal Simek			interrupt-controller;
1525d1b79d2SMichal Simek			interrupt-parent = <&gic>;
1535d1b79d2SMichal Simek			interrupts = <1 9 0xf04>;
1545d1b79d2SMichal Simek		};
1555d1b79d2SMichal Simek	};
1565d1b79d2SMichal Simek
1575087bccbSMichal Simek	amba: amba {
1585d1b79d2SMichal Simek		compatible = "simple-bus";
1595d1b79d2SMichal Simek		#address-cells = <2>;
1607393fd86SMichal Simek		#size-cells = <2>;
1615d1b79d2SMichal Simek		ranges;
1625d1b79d2SMichal Simek
1633a8691f5SMichal Simek		can0: can@ff060000 {
1643a8691f5SMichal Simek			compatible = "xlnx,zynq-can-1.0";
1653a8691f5SMichal Simek			status = "disabled";
1663a8691f5SMichal Simek			clock-names = "can_clk", "pclk";
1677393fd86SMichal Simek			reg = <0x0 0xff060000 0x0 0x1000>;
1683a8691f5SMichal Simek			interrupts = <0 23 4>;
1693a8691f5SMichal Simek			interrupt-parent = <&gic>;
1703a8691f5SMichal Simek			tx-fifo-depth = <0x40>;
1713a8691f5SMichal Simek			rx-fifo-depth = <0x40>;
1723a8691f5SMichal Simek		};
1733a8691f5SMichal Simek
1743a8691f5SMichal Simek		can1: can@ff070000 {
1753a8691f5SMichal Simek			compatible = "xlnx,zynq-can-1.0";
1763a8691f5SMichal Simek			status = "disabled";
1773a8691f5SMichal Simek			clock-names = "can_clk", "pclk";
1787393fd86SMichal Simek			reg = <0x0 0xff070000 0x0 0x1000>;
1793a8691f5SMichal Simek			interrupts = <0 24 4>;
1803a8691f5SMichal Simek			interrupt-parent = <&gic>;
1813a8691f5SMichal Simek			tx-fifo-depth = <0x40>;
1823a8691f5SMichal Simek			rx-fifo-depth = <0x40>;
1833a8691f5SMichal Simek		};
1843a8691f5SMichal Simek
1858c50b1e4SMichal Simek		cci: cci@fd6e0000 {
1868c50b1e4SMichal Simek			compatible = "arm,cci-400";
1878c50b1e4SMichal Simek			reg = <0x0 0xfd6e0000 0x0 0x9000>;
1888c50b1e4SMichal Simek			ranges = <0x0 0x0 0xfd6e0000 0x10000>;
1898c50b1e4SMichal Simek			#address-cells = <1>;
1908c50b1e4SMichal Simek			#size-cells = <1>;
1918c50b1e4SMichal Simek
1928c50b1e4SMichal Simek			pmu@9000 {
1938c50b1e4SMichal Simek				compatible = "arm,cci-400-pmu,r1";
1948c50b1e4SMichal Simek				reg = <0x9000 0x5000>;
1958c50b1e4SMichal Simek				interrupt-parent = <&gic>;
1968c50b1e4SMichal Simek				interrupts = <0 123 4>,
1978c50b1e4SMichal Simek					     <0 123 4>,
1988c50b1e4SMichal Simek					     <0 123 4>,
1998c50b1e4SMichal Simek					     <0 123 4>,
2008c50b1e4SMichal Simek					     <0 123 4>;
2018c50b1e4SMichal Simek			};
2028c50b1e4SMichal Simek		};
2038c50b1e4SMichal Simek
204932bd0d8SMichal Simek		/* GDMA */
205932bd0d8SMichal Simek		fpd_dma_chan1: dma@fd500000 {
206932bd0d8SMichal Simek			status = "disabled";
207932bd0d8SMichal Simek			compatible = "xlnx,zynqmp-dma-1.0";
208932bd0d8SMichal Simek			reg = <0x0 0xfd500000 0x0 0x1000>;
209932bd0d8SMichal Simek			interrupt-parent = <&gic>;
210932bd0d8SMichal Simek			interrupts = <0 124 4>;
211932bd0d8SMichal Simek			clock-names = "clk_main", "clk_apb";
212932bd0d8SMichal Simek			xlnx,bus-width = <128>;
213932bd0d8SMichal Simek		};
214932bd0d8SMichal Simek
215932bd0d8SMichal Simek		fpd_dma_chan2: dma@fd510000 {
216932bd0d8SMichal Simek			status = "disabled";
217932bd0d8SMichal Simek			compatible = "xlnx,zynqmp-dma-1.0";
218932bd0d8SMichal Simek			reg = <0x0 0xfd510000 0x0 0x1000>;
219932bd0d8SMichal Simek			interrupt-parent = <&gic>;
220932bd0d8SMichal Simek			interrupts = <0 125 4>;
221932bd0d8SMichal Simek			clock-names = "clk_main", "clk_apb";
222932bd0d8SMichal Simek			xlnx,bus-width = <128>;
223932bd0d8SMichal Simek		};
224932bd0d8SMichal Simek
225932bd0d8SMichal Simek		fpd_dma_chan3: dma@fd520000 {
226932bd0d8SMichal Simek			status = "disabled";
227932bd0d8SMichal Simek			compatible = "xlnx,zynqmp-dma-1.0";
228932bd0d8SMichal Simek			reg = <0x0 0xfd520000 0x0 0x1000>;
229932bd0d8SMichal Simek			interrupt-parent = <&gic>;
230932bd0d8SMichal Simek			interrupts = <0 126 4>;
231932bd0d8SMichal Simek			clock-names = "clk_main", "clk_apb";
232932bd0d8SMichal Simek			xlnx,bus-width = <128>;
233932bd0d8SMichal Simek		};
234932bd0d8SMichal Simek
235932bd0d8SMichal Simek		fpd_dma_chan4: dma@fd530000 {
236932bd0d8SMichal Simek			status = "disabled";
237932bd0d8SMichal Simek			compatible = "xlnx,zynqmp-dma-1.0";
238932bd0d8SMichal Simek			reg = <0x0 0xfd530000 0x0 0x1000>;
239932bd0d8SMichal Simek			interrupt-parent = <&gic>;
240932bd0d8SMichal Simek			interrupts = <0 127 4>;
241932bd0d8SMichal Simek			clock-names = "clk_main", "clk_apb";
242932bd0d8SMichal Simek			xlnx,bus-width = <128>;
243932bd0d8SMichal Simek		};
244932bd0d8SMichal Simek
245932bd0d8SMichal Simek		fpd_dma_chan5: dma@fd540000 {
246932bd0d8SMichal Simek			status = "disabled";
247932bd0d8SMichal Simek			compatible = "xlnx,zynqmp-dma-1.0";
248932bd0d8SMichal Simek			reg = <0x0 0xfd540000 0x0 0x1000>;
249932bd0d8SMichal Simek			interrupt-parent = <&gic>;
250932bd0d8SMichal Simek			interrupts = <0 128 4>;
251932bd0d8SMichal Simek			clock-names = "clk_main", "clk_apb";
252932bd0d8SMichal Simek			xlnx,bus-width = <128>;
253932bd0d8SMichal Simek		};
254932bd0d8SMichal Simek
255932bd0d8SMichal Simek		fpd_dma_chan6: dma@fd550000 {
256932bd0d8SMichal Simek			status = "disabled";
257932bd0d8SMichal Simek			compatible = "xlnx,zynqmp-dma-1.0";
258932bd0d8SMichal Simek			reg = <0x0 0xfd550000 0x0 0x1000>;
259932bd0d8SMichal Simek			interrupt-parent = <&gic>;
260932bd0d8SMichal Simek			interrupts = <0 129 4>;
261932bd0d8SMichal Simek			clock-names = "clk_main", "clk_apb";
262932bd0d8SMichal Simek			xlnx,bus-width = <128>;
263932bd0d8SMichal Simek		};
264932bd0d8SMichal Simek
265932bd0d8SMichal Simek		fpd_dma_chan7: dma@fd560000 {
266932bd0d8SMichal Simek			status = "disabled";
267932bd0d8SMichal Simek			compatible = "xlnx,zynqmp-dma-1.0";
268932bd0d8SMichal Simek			reg = <0x0 0xfd560000 0x0 0x1000>;
269932bd0d8SMichal Simek			interrupt-parent = <&gic>;
270932bd0d8SMichal Simek			interrupts = <0 130 4>;
271932bd0d8SMichal Simek			clock-names = "clk_main", "clk_apb";
272932bd0d8SMichal Simek			xlnx,bus-width = <128>;
273932bd0d8SMichal Simek		};
274932bd0d8SMichal Simek
275932bd0d8SMichal Simek		fpd_dma_chan8: dma@fd570000 {
276932bd0d8SMichal Simek			status = "disabled";
277932bd0d8SMichal Simek			compatible = "xlnx,zynqmp-dma-1.0";
278932bd0d8SMichal Simek			reg = <0x0 0xfd570000 0x0 0x1000>;
279932bd0d8SMichal Simek			interrupt-parent = <&gic>;
280932bd0d8SMichal Simek			interrupts = <0 131 4>;
281932bd0d8SMichal Simek			clock-names = "clk_main", "clk_apb";
282932bd0d8SMichal Simek			xlnx,bus-width = <128>;
283932bd0d8SMichal Simek		};
284932bd0d8SMichal Simek
285932bd0d8SMichal Simek		/* LPDDMA default allows only secured access. inorder to enable
286932bd0d8SMichal Simek		 * These dma channels, Users should ensure that these dma
287932bd0d8SMichal Simek		 * Channels are allowed for non secure access.
288932bd0d8SMichal Simek		 */
289932bd0d8SMichal Simek		lpd_dma_chan1: dma@ffa80000 {
290932bd0d8SMichal Simek			status = "disabled";
291932bd0d8SMichal Simek			compatible = "xlnx,zynqmp-dma-1.0";
292932bd0d8SMichal Simek			reg = <0x0 0xffa80000 0x0 0x1000>;
293932bd0d8SMichal Simek			interrupt-parent = <&gic>;
294932bd0d8SMichal Simek			interrupts = <0 77 4>;
295932bd0d8SMichal Simek			clock-names = "clk_main", "clk_apb";
296932bd0d8SMichal Simek			xlnx,bus-width = <64>;
297932bd0d8SMichal Simek		};
298932bd0d8SMichal Simek
299932bd0d8SMichal Simek		lpd_dma_chan2: dma@ffa90000 {
300932bd0d8SMichal Simek			status = "disabled";
301932bd0d8SMichal Simek			compatible = "xlnx,zynqmp-dma-1.0";
302932bd0d8SMichal Simek			reg = <0x0 0xffa90000 0x0 0x1000>;
303932bd0d8SMichal Simek			interrupt-parent = <&gic>;
304932bd0d8SMichal Simek			interrupts = <0 78 4>;
305932bd0d8SMichal Simek			clock-names = "clk_main", "clk_apb";
306932bd0d8SMichal Simek			xlnx,bus-width = <64>;
307932bd0d8SMichal Simek		};
308932bd0d8SMichal Simek
309932bd0d8SMichal Simek		lpd_dma_chan3: dma@ffaa0000 {
310932bd0d8SMichal Simek			status = "disabled";
311932bd0d8SMichal Simek			compatible = "xlnx,zynqmp-dma-1.0";
312932bd0d8SMichal Simek			reg = <0x0 0xffaa0000 0x0 0x1000>;
313932bd0d8SMichal Simek			interrupt-parent = <&gic>;
314932bd0d8SMichal Simek			interrupts = <0 79 4>;
315932bd0d8SMichal Simek			clock-names = "clk_main", "clk_apb";
316932bd0d8SMichal Simek			xlnx,bus-width = <64>;
317932bd0d8SMichal Simek		};
318932bd0d8SMichal Simek
319932bd0d8SMichal Simek		lpd_dma_chan4: dma@ffab0000 {
320932bd0d8SMichal Simek			status = "disabled";
321932bd0d8SMichal Simek			compatible = "xlnx,zynqmp-dma-1.0";
322932bd0d8SMichal Simek			reg = <0x0 0xffab0000 0x0 0x1000>;
323932bd0d8SMichal Simek			interrupt-parent = <&gic>;
324932bd0d8SMichal Simek			interrupts = <0 80 4>;
325932bd0d8SMichal Simek			clock-names = "clk_main", "clk_apb";
326932bd0d8SMichal Simek			xlnx,bus-width = <64>;
327932bd0d8SMichal Simek		};
328932bd0d8SMichal Simek
329932bd0d8SMichal Simek		lpd_dma_chan5: dma@ffac0000 {
330932bd0d8SMichal Simek			status = "disabled";
331932bd0d8SMichal Simek			compatible = "xlnx,zynqmp-dma-1.0";
332932bd0d8SMichal Simek			reg = <0x0 0xffac0000 0x0 0x1000>;
333932bd0d8SMichal Simek			interrupt-parent = <&gic>;
334932bd0d8SMichal Simek			interrupts = <0 81 4>;
335932bd0d8SMichal Simek			clock-names = "clk_main", "clk_apb";
336932bd0d8SMichal Simek			xlnx,bus-width = <64>;
337932bd0d8SMichal Simek		};
338932bd0d8SMichal Simek
339932bd0d8SMichal Simek		lpd_dma_chan6: dma@ffad0000 {
340932bd0d8SMichal Simek			status = "disabled";
341932bd0d8SMichal Simek			compatible = "xlnx,zynqmp-dma-1.0";
342932bd0d8SMichal Simek			reg = <0x0 0xffad0000 0x0 0x1000>;
343932bd0d8SMichal Simek			interrupt-parent = <&gic>;
344932bd0d8SMichal Simek			interrupts = <0 82 4>;
345932bd0d8SMichal Simek			clock-names = "clk_main", "clk_apb";
346932bd0d8SMichal Simek			xlnx,bus-width = <64>;
347932bd0d8SMichal Simek		};
348932bd0d8SMichal Simek
349932bd0d8SMichal Simek		lpd_dma_chan7: dma@ffae0000 {
350932bd0d8SMichal Simek			status = "disabled";
351932bd0d8SMichal Simek			compatible = "xlnx,zynqmp-dma-1.0";
352932bd0d8SMichal Simek			reg = <0x0 0xffae0000 0x0 0x1000>;
353932bd0d8SMichal Simek			interrupt-parent = <&gic>;
354932bd0d8SMichal Simek			interrupts = <0 83 4>;
355932bd0d8SMichal Simek			clock-names = "clk_main", "clk_apb";
356932bd0d8SMichal Simek			xlnx,bus-width = <64>;
357932bd0d8SMichal Simek		};
358932bd0d8SMichal Simek
359932bd0d8SMichal Simek		lpd_dma_chan8: dma@ffaf0000 {
360932bd0d8SMichal Simek			status = "disabled";
361932bd0d8SMichal Simek			compatible = "xlnx,zynqmp-dma-1.0";
362932bd0d8SMichal Simek			reg = <0x0 0xffaf0000 0x0 0x1000>;
363932bd0d8SMichal Simek			interrupt-parent = <&gic>;
364932bd0d8SMichal Simek			interrupts = <0 84 4>;
365932bd0d8SMichal Simek			clock-names = "clk_main", "clk_apb";
366932bd0d8SMichal Simek			xlnx,bus-width = <64>;
367932bd0d8SMichal Simek		};
368932bd0d8SMichal Simek
369e7abd894SManish Narani		mc: memory-controller@fd070000 {
370e7abd894SManish Narani			compatible = "xlnx,zynqmp-ddrc-2.40a";
371e7abd894SManish Narani			reg = <0x0 0xfd070000 0x0 0x30000>;
372e7abd894SManish Narani			interrupt-parent = <&gic>;
373e7abd894SManish Narani			interrupts = <0 112 4>;
374e7abd894SManish Narani		};
375e7abd894SManish Narani
3765d1b79d2SMichal Simek		gem0: ethernet@ff0b0000 {
37733af509fSMichal Simek			compatible = "cdns,zynqmp-gem", "cdns,gem";
3785d1b79d2SMichal Simek			status = "disabled";
3795d1b79d2SMichal Simek			interrupt-parent = <&gic>;
3805d1b79d2SMichal Simek			interrupts = <0 57 4>, <0 57 4>;
3817393fd86SMichal Simek			reg = <0x0 0xff0b0000 0x0 0x1000>;
3825d1b79d2SMichal Simek			clock-names = "pclk", "hclk", "tx_clk";
3835d1b79d2SMichal Simek			#address-cells = <1>;
3845d1b79d2SMichal Simek			#size-cells = <0>;
3855d1b79d2SMichal Simek		};
3865d1b79d2SMichal Simek
3875d1b79d2SMichal Simek		gem1: ethernet@ff0c0000 {
38833af509fSMichal Simek			compatible = "cdns,zynqmp-gem", "cdns,gem";
3895d1b79d2SMichal Simek			status = "disabled";
3905d1b79d2SMichal Simek			interrupt-parent = <&gic>;
3915d1b79d2SMichal Simek			interrupts = <0 59 4>, <0 59 4>;
3927393fd86SMichal Simek			reg = <0x0 0xff0c0000 0x0 0x1000>;
3935d1b79d2SMichal Simek			clock-names = "pclk", "hclk", "tx_clk";
3945d1b79d2SMichal Simek			#address-cells = <1>;
3955d1b79d2SMichal Simek			#size-cells = <0>;
3965d1b79d2SMichal Simek		};
3975d1b79d2SMichal Simek
3985d1b79d2SMichal Simek		gem2: ethernet@ff0d0000 {
39933af509fSMichal Simek			compatible = "cdns,zynqmp-gem", "cdns,gem";
4005d1b79d2SMichal Simek			status = "disabled";
4015d1b79d2SMichal Simek			interrupt-parent = <&gic>;
4025d1b79d2SMichal Simek			interrupts = <0 61 4>, <0 61 4>;
4037393fd86SMichal Simek			reg = <0x0 0xff0d0000 0x0 0x1000>;
4045d1b79d2SMichal Simek			clock-names = "pclk", "hclk", "tx_clk";
4055d1b79d2SMichal Simek			#address-cells = <1>;
4065d1b79d2SMichal Simek			#size-cells = <0>;
4075d1b79d2SMichal Simek		};
4085d1b79d2SMichal Simek
4095d1b79d2SMichal Simek		gem3: ethernet@ff0e0000 {
41033af509fSMichal Simek			compatible = "cdns,zynqmp-gem", "cdns,gem";
4115d1b79d2SMichal Simek			status = "disabled";
4125d1b79d2SMichal Simek			interrupt-parent = <&gic>;
4135d1b79d2SMichal Simek			interrupts = <0 63 4>, <0 63 4>;
4147393fd86SMichal Simek			reg = <0x0 0xff0e0000 0x0 0x1000>;
4155d1b79d2SMichal Simek			clock-names = "pclk", "hclk", "tx_clk";
4165d1b79d2SMichal Simek			#address-cells = <1>;
4175d1b79d2SMichal Simek			#size-cells = <0>;
4185d1b79d2SMichal Simek		};
4195d1b79d2SMichal Simek
42072e5df43SMichal Simek		gpio: gpio@ff0a0000 {
42172e5df43SMichal Simek			compatible = "xlnx,zynqmp-gpio-1.0";
42272e5df43SMichal Simek			status = "disabled";
42372e5df43SMichal Simek			#gpio-cells = <0x2>;
4244556b160SMichal Simek			gpio-controller;
42572e5df43SMichal Simek			interrupt-parent = <&gic>;
42672e5df43SMichal Simek			interrupts = <0 16 4>;
42772e5df43SMichal Simek			interrupt-controller;
42872e5df43SMichal Simek			#interrupt-cells = <2>;
4297393fd86SMichal Simek			reg = <0x0 0xff0a0000 0x0 0x1000>;
43072e5df43SMichal Simek		};
43172e5df43SMichal Simek
4325d1b79d2SMichal Simek		i2c0: i2c@ff020000 {
433c415f9e8SMoritz Fischer			compatible = "cdns,i2c-r1p14", "cdns,i2c-r1p10";
4345d1b79d2SMichal Simek			status = "disabled";
4355d1b79d2SMichal Simek			interrupt-parent = <&gic>;
4365d1b79d2SMichal Simek			interrupts = <0 17 4>;
4377393fd86SMichal Simek			reg = <0x0 0xff020000 0x0 0x1000>;
4385d1b79d2SMichal Simek			#address-cells = <1>;
4395d1b79d2SMichal Simek			#size-cells = <0>;
4405d1b79d2SMichal Simek		};
4415d1b79d2SMichal Simek
4425d1b79d2SMichal Simek		i2c1: i2c@ff030000 {
443c415f9e8SMoritz Fischer			compatible = "cdns,i2c-r1p14", "cdns,i2c-r1p10";
4445d1b79d2SMichal Simek			status = "disabled";
4455d1b79d2SMichal Simek			interrupt-parent = <&gic>;
4465d1b79d2SMichal Simek			interrupts = <0 18 4>;
4477393fd86SMichal Simek			reg = <0x0 0xff030000 0x0 0x1000>;
4485d1b79d2SMichal Simek			#address-cells = <1>;
4495d1b79d2SMichal Simek			#size-cells = <0>;
4505d1b79d2SMichal Simek		};
4515d1b79d2SMichal Simek
45278b83b8cSMichal Simek		pcie: pcie@fd0e0000 {
45378b83b8cSMichal Simek			compatible = "xlnx,nwl-pcie-2.11";
45478b83b8cSMichal Simek			status = "disabled";
45578b83b8cSMichal Simek			#address-cells = <3>;
45678b83b8cSMichal Simek			#size-cells = <2>;
45778b83b8cSMichal Simek			#interrupt-cells = <1>;
45878b83b8cSMichal Simek			msi-controller;
45978b83b8cSMichal Simek			device_type = "pci";
46078b83b8cSMichal Simek			interrupt-parent = <&gic>;
46178b83b8cSMichal Simek			interrupts = <0 118 4>,
46278b83b8cSMichal Simek				     <0 117 4>,
46378b83b8cSMichal Simek				     <0 116 4>,
46478b83b8cSMichal Simek				     <0 115 4>,	/* MSI_1 [63...32] */
46578b83b8cSMichal Simek				     <0 114 4>;	/* MSI_0 [31...0] */
46678b83b8cSMichal Simek			interrupt-names = "misc", "dummy", "intx",
46778b83b8cSMichal Simek					  "msi1", "msi0";
46878b83b8cSMichal Simek			msi-parent = <&pcie>;
46978b83b8cSMichal Simek			reg = <0x0 0xfd0e0000 0x0 0x1000>,
47078b83b8cSMichal Simek			      <0x0 0xfd480000 0x0 0x1000>,
47178b83b8cSMichal Simek			      <0x80 0x00000000 0x0 0x1000000>;
47278b83b8cSMichal Simek			reg-names = "breg", "pcireg", "cfg";
4734a6514d5SBharat Kumar Gogada			ranges = <0x02000000 0x00000000 0xe0000000 0x00000000 0xe0000000 0x00000000 0x10000000	/* non-prefetchable memory */
4744a6514d5SBharat Kumar Gogada				  0x43000000 0x00000006 0x00000000 0x00000006 0x00000000 0x00000002 0x00000000>;/* prefetchable memory */
475d15c56caSRob Herring			bus-range = <0x00 0xff>;
47678b83b8cSMichal Simek			interrupt-map-mask = <0x0 0x0 0x0 0x7>;
47778b83b8cSMichal Simek			interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>,
47878b83b8cSMichal Simek					<0x0 0x0 0x0 0x2 &pcie_intc 0x2>,
47978b83b8cSMichal Simek					<0x0 0x0 0x0 0x3 &pcie_intc 0x3>,
48078b83b8cSMichal Simek					<0x0 0x0 0x0 0x4 &pcie_intc 0x4>;
48178b83b8cSMichal Simek			pcie_intc: legacy-interrupt-controller {
48278b83b8cSMichal Simek				interrupt-controller;
48378b83b8cSMichal Simek				#address-cells = <0>;
48478b83b8cSMichal Simek				#interrupt-cells = <1>;
48578b83b8cSMichal Simek			};
48678b83b8cSMichal Simek		};
48778b83b8cSMichal Simek
4887fb7820cSMichal Simek		rtc: rtc@ffa60000 {
4897fb7820cSMichal Simek			compatible = "xlnx,zynqmp-rtc";
4907fb7820cSMichal Simek			status = "disabled";
4917fb7820cSMichal Simek			reg = <0x0 0xffa60000 0x0 0x100>;
4927fb7820cSMichal Simek			interrupt-parent = <&gic>;
4937fb7820cSMichal Simek			interrupts = <0 26 4>, <0 27 4>;
4947fb7820cSMichal Simek			interrupt-names = "alarm", "sec";
4957fb7820cSMichal Simek			calibration = <0x8000>;
4967fb7820cSMichal Simek		};
4977fb7820cSMichal Simek
4988fae442fSSuneel Garapati		sata: ahci@fd0c0000 {
4998fae442fSSuneel Garapati			compatible = "ceva,ahci-1v84";
5008fae442fSSuneel Garapati			status = "disabled";
5017393fd86SMichal Simek			reg = <0x0 0xfd0c0000 0x0 0x2000>;
5028fae442fSSuneel Garapati			interrupt-parent = <&gic>;
5038fae442fSSuneel Garapati			interrupts = <0 133 4>;
5048fae442fSSuneel Garapati		};
5058fae442fSSuneel Garapati
5069fd609ffSMichal Simek		sdhci0: mmc@ff160000 {
5075d1b79d2SMichal Simek			compatible = "arasan,sdhci-8.9a";
5085d1b79d2SMichal Simek			status = "disabled";
5095d1b79d2SMichal Simek			interrupt-parent = <&gic>;
5105d1b79d2SMichal Simek			interrupts = <0 48 4>;
5117393fd86SMichal Simek			reg = <0x0 0xff160000 0x0 0x1000>;
5125d1b79d2SMichal Simek			clock-names = "clk_xin", "clk_ahb";
5135d1b79d2SMichal Simek		};
5145d1b79d2SMichal Simek
5159fd609ffSMichal Simek		sdhci1: mmc@ff170000 {
5165d1b79d2SMichal Simek			compatible = "arasan,sdhci-8.9a";
5175d1b79d2SMichal Simek			status = "disabled";
5185d1b79d2SMichal Simek			interrupt-parent = <&gic>;
5195d1b79d2SMichal Simek			interrupts = <0 49 4>;
5207393fd86SMichal Simek			reg = <0x0 0xff170000 0x0 0x1000>;
5215d1b79d2SMichal Simek			clock-names = "clk_xin", "clk_ahb";
5225d1b79d2SMichal Simek		};
5235d1b79d2SMichal Simek
524ff92e361SMichal Simek		smmu: smmu@fd800000 {
525ff92e361SMichal Simek			compatible = "arm,mmu-500";
5267393fd86SMichal Simek			reg = <0x0 0xfd800000 0x0 0x20000>;
5272f9ed199SNaga Sureshkumar Relli			status = "disabled";
528ff92e361SMichal Simek			#global-interrupts = <1>;
529ff92e361SMichal Simek			interrupt-parent = <&gic>;
530e199f2ccSEdgar E. Iglesias			interrupts = <0 155 4>,
531e199f2ccSEdgar E. Iglesias				<0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
532e199f2ccSEdgar E. Iglesias				<0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
533e199f2ccSEdgar E. Iglesias				<0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
534e199f2ccSEdgar E. Iglesias				<0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>;
535ff92e361SMichal Simek		};
536ff92e361SMichal Simek
537f49310dcSMichal Simek		spi0: spi@ff040000 {
538f49310dcSMichal Simek			compatible = "cdns,spi-r1p6";
539f49310dcSMichal Simek			status = "disabled";
540f49310dcSMichal Simek			interrupt-parent = <&gic>;
541f49310dcSMichal Simek			interrupts = <0 19 4>;
5427393fd86SMichal Simek			reg = <0x0 0xff040000 0x0 0x1000>;
543f49310dcSMichal Simek			clock-names = "ref_clk", "pclk";
544f49310dcSMichal Simek			#address-cells = <1>;
545f49310dcSMichal Simek			#size-cells = <0>;
546f49310dcSMichal Simek		};
547f49310dcSMichal Simek
548f49310dcSMichal Simek		spi1: spi@ff050000 {
549f49310dcSMichal Simek			compatible = "cdns,spi-r1p6";
550f49310dcSMichal Simek			status = "disabled";
551f49310dcSMichal Simek			interrupt-parent = <&gic>;
552f49310dcSMichal Simek			interrupts = <0 20 4>;
5537393fd86SMichal Simek			reg = <0x0 0xff050000 0x0 0x1000>;
554f49310dcSMichal Simek			clock-names = "ref_clk", "pclk";
555f49310dcSMichal Simek			#address-cells = <1>;
556f49310dcSMichal Simek			#size-cells = <0>;
557f49310dcSMichal Simek		};
558f49310dcSMichal Simek
5598fd7a775SMichal Simek		ttc0: timer@ff110000 {
5608fd7a775SMichal Simek			compatible = "cdns,ttc";
5618fd7a775SMichal Simek			status = "disabled";
5628fd7a775SMichal Simek			interrupt-parent = <&gic>;
5638fd7a775SMichal Simek			interrupts = <0 36 4>, <0 37 4>, <0 38 4>;
5647393fd86SMichal Simek			reg = <0x0 0xff110000 0x0 0x1000>;
5658fd7a775SMichal Simek			timer-width = <32>;
5668fd7a775SMichal Simek		};
5678fd7a775SMichal Simek
5688fd7a775SMichal Simek		ttc1: timer@ff120000 {
5698fd7a775SMichal Simek			compatible = "cdns,ttc";
5708fd7a775SMichal Simek			status = "disabled";
5718fd7a775SMichal Simek			interrupt-parent = <&gic>;
5728fd7a775SMichal Simek			interrupts = <0 39 4>, <0 40 4>, <0 41 4>;
5737393fd86SMichal Simek			reg = <0x0 0xff120000 0x0 0x1000>;
5748fd7a775SMichal Simek			timer-width = <32>;
5758fd7a775SMichal Simek		};
5768fd7a775SMichal Simek
5778fd7a775SMichal Simek		ttc2: timer@ff130000 {
5788fd7a775SMichal Simek			compatible = "cdns,ttc";
5798fd7a775SMichal Simek			status = "disabled";
5808fd7a775SMichal Simek			interrupt-parent = <&gic>;
5818fd7a775SMichal Simek			interrupts = <0 42 4>, <0 43 4>, <0 44 4>;
5827393fd86SMichal Simek			reg = <0x0 0xff130000 0x0 0x1000>;
5838fd7a775SMichal Simek			timer-width = <32>;
5848fd7a775SMichal Simek		};
5858fd7a775SMichal Simek
5868fd7a775SMichal Simek		ttc3: timer@ff140000 {
5878fd7a775SMichal Simek			compatible = "cdns,ttc";
5888fd7a775SMichal Simek			status = "disabled";
5898fd7a775SMichal Simek			interrupt-parent = <&gic>;
5908fd7a775SMichal Simek			interrupts = <0 45 4>, <0 46 4>, <0 47 4>;
5917393fd86SMichal Simek			reg = <0x0 0xff140000 0x0 0x1000>;
5928fd7a775SMichal Simek			timer-width = <32>;
5938fd7a775SMichal Simek		};
5948fd7a775SMichal Simek
5958fd7a775SMichal Simek		uart0: serial@ff000000 {
59627af3993SMichal Simek			compatible = "cdns,uart-r1p12", "xlnx,xuartps";
5978fd7a775SMichal Simek			status = "disabled";
5988fd7a775SMichal Simek			interrupt-parent = <&gic>;
5998fd7a775SMichal Simek			interrupts = <0 21 4>;
6007393fd86SMichal Simek			reg = <0x0 0xff000000 0x0 0x1000>;
6018fd7a775SMichal Simek			clock-names = "uart_clk", "pclk";
6028fd7a775SMichal Simek		};
6038fd7a775SMichal Simek
6048fd7a775SMichal Simek		uart1: serial@ff010000 {
60527af3993SMichal Simek			compatible = "cdns,uart-r1p12", "xlnx,xuartps";
6068fd7a775SMichal Simek			status = "disabled";
6078fd7a775SMichal Simek			interrupt-parent = <&gic>;
6088fd7a775SMichal Simek			interrupts = <0 22 4>;
6097393fd86SMichal Simek			reg = <0x0 0xff010000 0x0 0x1000>;
6108fd7a775SMichal Simek			clock-names = "uart_clk", "pclk";
6118fd7a775SMichal Simek		};
6128fd7a775SMichal Simek
61322eda14aSMichal Simek		usb0: usb@fe200000 {
61422eda14aSMichal Simek			compatible = "snps,dwc3";
61522eda14aSMichal Simek			status = "disabled";
61622eda14aSMichal Simek			interrupt-parent = <&gic>;
61722eda14aSMichal Simek			interrupts = <0 65 4>;
6187393fd86SMichal Simek			reg = <0x0 0xfe200000 0x0 0x40000>;
61922eda14aSMichal Simek			clock-names = "clk_xin", "clk_ahb";
62022eda14aSMichal Simek		};
62122eda14aSMichal Simek
62222eda14aSMichal Simek		usb1: usb@fe300000 {
62322eda14aSMichal Simek			compatible = "snps,dwc3";
62422eda14aSMichal Simek			status = "disabled";
62522eda14aSMichal Simek			interrupt-parent = <&gic>;
62622eda14aSMichal Simek			interrupts = <0 70 4>;
6277393fd86SMichal Simek			reg = <0x0 0xfe300000 0x0 0x40000>;
62822eda14aSMichal Simek			clock-names = "clk_xin", "clk_ahb";
62922eda14aSMichal Simek		};
63022eda14aSMichal Simek
6315d1b79d2SMichal Simek		watchdog0: watchdog@fd4d0000 {
6325d1b79d2SMichal Simek			compatible = "cdns,wdt-r1p2";
6335d1b79d2SMichal Simek			status = "disabled";
6345d1b79d2SMichal Simek			interrupt-parent = <&gic>;
635908c9e73SPunnaiah Choudary Kalluri			interrupts = <0 113 1>;
6367393fd86SMichal Simek			reg = <0x0 0xfd4d0000 0x0 0x1000>;
6375d1b79d2SMichal Simek			timeout-sec = <10>;
6385d1b79d2SMichal Simek		};
6395d1b79d2SMichal Simek	};
6405d1b79d2SMichal Simek};
641