1b9c74682SMichal Simek// SPDX-License-Identifier: GPL-2.0+ 25d1b79d2SMichal Simek/* 35d1b79d2SMichal Simek * dts file for Xilinx ZynqMP 45d1b79d2SMichal Simek * 5b61c4ff9SMichal Simek * (C) Copyright 2014 - 2021, Xilinx, Inc. 65d1b79d2SMichal Simek * 74e4ddd3dSMichal Simek * Michal Simek <michal.simek@amd.com> 85d1b79d2SMichal Simek * 95d1b79d2SMichal Simek * This program is free software; you can redistribute it and/or 105d1b79d2SMichal Simek * modify it under the terms of the GNU General Public License as 115d1b79d2SMichal Simek * published by the Free Software Foundation; either version 2 of 125d1b79d2SMichal Simek * the License, or (at your option) any later version. 135d1b79d2SMichal Simek */ 145d1b79d2SMichal Simek 15b0f89cf5SMichal Simek#include <dt-bindings/dma/xlnx-zynqmp-dpdma.h> 1653ba1b2bSPiyush Mehta#include <dt-bindings/gpio/gpio.h> 17cf0e27cdSMichal Simek#include <dt-bindings/interrupt-controller/arm-gic.h> 18cf0e27cdSMichal Simek#include <dt-bindings/interrupt-controller/irq.h> 19959b86aeSRajan Vaja#include <dt-bindings/power/xlnx-zynqmp-power.h> 20b4b6fb8dSLaurent Pinchart#include <dt-bindings/reset/xlnx-zynqmp-resets.h> 21959b86aeSRajan Vaja 225d1b79d2SMichal Simek/ { 235d1b79d2SMichal Simek compatible = "xlnx,zynqmp"; 245d1b79d2SMichal Simek #address-cells = <2>; 257393fd86SMichal Simek #size-cells = <2>; 265d1b79d2SMichal Simek 27*2385a6d8SMichal Simek options { 28*2385a6d8SMichal Simek u-boot { 29*2385a6d8SMichal Simek compatible = "u-boot,config"; 30*2385a6d8SMichal Simek bootscr-address = /bits/ 64 <0x20000000>; 31*2385a6d8SMichal Simek }; 32*2385a6d8SMichal Simek }; 33*2385a6d8SMichal Simek 345d1b79d2SMichal Simek cpus { 355d1b79d2SMichal Simek #address-cells = <1>; 365d1b79d2SMichal Simek #size-cells = <0>; 375d1b79d2SMichal Simek 38400e188fSMichal Simek cpu0: cpu@0 { 3931af04cdSRob Herring compatible = "arm,cortex-a53"; 405d1b79d2SMichal Simek device_type = "cpu"; 415d1b79d2SMichal Simek enable-method = "psci"; 42e31b7bb8SShubhrajyoti Datta operating-points-v2 = <&cpu_opp_table>; 435d1b79d2SMichal Simek reg = <0x0>; 441e4e25c8SStefan Krsmanovic cpu-idle-states = <&CPU_SLEEP_0>; 453011e0c8SRadhey Shyam Pandey next-level-cache = <&L2>; 465d1b79d2SMichal Simek }; 475d1b79d2SMichal Simek 48400e188fSMichal Simek cpu1: cpu@1 { 4931af04cdSRob Herring compatible = "arm,cortex-a53"; 505d1b79d2SMichal Simek device_type = "cpu"; 515d1b79d2SMichal Simek enable-method = "psci"; 525d1b79d2SMichal Simek reg = <0x1>; 53e31b7bb8SShubhrajyoti Datta operating-points-v2 = <&cpu_opp_table>; 541e4e25c8SStefan Krsmanovic cpu-idle-states = <&CPU_SLEEP_0>; 553011e0c8SRadhey Shyam Pandey next-level-cache = <&L2>; 565d1b79d2SMichal Simek }; 575d1b79d2SMichal Simek 58400e188fSMichal Simek cpu2: cpu@2 { 5931af04cdSRob Herring compatible = "arm,cortex-a53"; 605d1b79d2SMichal Simek device_type = "cpu"; 615d1b79d2SMichal Simek enable-method = "psci"; 625d1b79d2SMichal Simek reg = <0x2>; 63e31b7bb8SShubhrajyoti Datta operating-points-v2 = <&cpu_opp_table>; 641e4e25c8SStefan Krsmanovic cpu-idle-states = <&CPU_SLEEP_0>; 653011e0c8SRadhey Shyam Pandey next-level-cache = <&L2>; 665d1b79d2SMichal Simek }; 675d1b79d2SMichal Simek 68400e188fSMichal Simek cpu3: cpu@3 { 6931af04cdSRob Herring compatible = "arm,cortex-a53"; 705d1b79d2SMichal Simek device_type = "cpu"; 715d1b79d2SMichal Simek enable-method = "psci"; 725d1b79d2SMichal Simek reg = <0x3>; 73e31b7bb8SShubhrajyoti Datta operating-points-v2 = <&cpu_opp_table>; 741e4e25c8SStefan Krsmanovic cpu-idle-states = <&CPU_SLEEP_0>; 753011e0c8SRadhey Shyam Pandey next-level-cache = <&L2>; 763011e0c8SRadhey Shyam Pandey }; 773011e0c8SRadhey Shyam Pandey 783011e0c8SRadhey Shyam Pandey L2: l2-cache { 793011e0c8SRadhey Shyam Pandey compatible = "cache"; 803011e0c8SRadhey Shyam Pandey cache-level = <2>; 813011e0c8SRadhey Shyam Pandey cache-unified; 821e4e25c8SStefan Krsmanovic }; 831e4e25c8SStefan Krsmanovic 841e4e25c8SStefan Krsmanovic idle-states { 85e9880240SAmit Kucheria entry-method = "psci"; 861e4e25c8SStefan Krsmanovic 871e4e25c8SStefan Krsmanovic CPU_SLEEP_0: cpu-sleep-0 { 881e4e25c8SStefan Krsmanovic compatible = "arm,idle-state"; 891e4e25c8SStefan Krsmanovic arm,psci-suspend-param = <0x40000000>; 901e4e25c8SStefan Krsmanovic local-timer-stop; 911e4e25c8SStefan Krsmanovic entry-latency-us = <300>; 921e4e25c8SStefan Krsmanovic exit-latency-us = <600>; 931e4e25c8SStefan Krsmanovic min-residency-us = <10000>; 941e4e25c8SStefan Krsmanovic }; 955d1b79d2SMichal Simek }; 965d1b79d2SMichal Simek }; 975d1b79d2SMichal Simek 9856f2b1ffSMichal Simek cpu_opp_table: opp-table-cpu { 99e31b7bb8SShubhrajyoti Datta compatible = "operating-points-v2"; 100e31b7bb8SShubhrajyoti Datta opp-shared; 101e31b7bb8SShubhrajyoti Datta opp00 { 102e31b7bb8SShubhrajyoti Datta opp-hz = /bits/ 64 <1199999988>; 103e31b7bb8SShubhrajyoti Datta opp-microvolt = <1000000>; 104e31b7bb8SShubhrajyoti Datta clock-latency-ns = <500000>; 105e31b7bb8SShubhrajyoti Datta }; 106e31b7bb8SShubhrajyoti Datta opp01 { 107e31b7bb8SShubhrajyoti Datta opp-hz = /bits/ 64 <599999994>; 108e31b7bb8SShubhrajyoti Datta opp-microvolt = <1000000>; 109e31b7bb8SShubhrajyoti Datta clock-latency-ns = <500000>; 110e31b7bb8SShubhrajyoti Datta }; 111e31b7bb8SShubhrajyoti Datta opp02 { 112e31b7bb8SShubhrajyoti Datta opp-hz = /bits/ 64 <399999996>; 113e31b7bb8SShubhrajyoti Datta opp-microvolt = <1000000>; 114e31b7bb8SShubhrajyoti Datta clock-latency-ns = <500000>; 115e31b7bb8SShubhrajyoti Datta }; 116e31b7bb8SShubhrajyoti Datta opp03 { 117e31b7bb8SShubhrajyoti Datta opp-hz = /bits/ 64 <299999997>; 118e31b7bb8SShubhrajyoti Datta opp-microvolt = <1000000>; 119e31b7bb8SShubhrajyoti Datta clock-latency-ns = <500000>; 120e31b7bb8SShubhrajyoti Datta }; 121e31b7bb8SShubhrajyoti Datta }; 122e31b7bb8SShubhrajyoti Datta 123400f6af0STanmay Shah reserved-memory { 124400f6af0STanmay Shah #address-cells = <2>; 125400f6af0STanmay Shah #size-cells = <2>; 126400f6af0STanmay Shah ranges; 127400f6af0STanmay Shah 128400f6af0STanmay Shah rproc_0_fw_image: memory@3ed00000 { 129400f6af0STanmay Shah no-map; 130400f6af0STanmay Shah reg = <0x0 0x3ed00000 0x0 0x40000>; 131400f6af0STanmay Shah }; 132400f6af0STanmay Shah 133400f6af0STanmay Shah rproc_1_fw_image: memory@3ef00000 { 134400f6af0STanmay Shah no-map; 135400f6af0STanmay Shah reg = <0x0 0x3ef00000 0x0 0x40000>; 136400f6af0STanmay Shah }; 137400f6af0STanmay Shah }; 138400f6af0STanmay Shah 139995d4ef0SMichal Simek zynqmp_ipi: zynqmp-ipi { 1405be4fbbfSMichal Simek bootph-all; 1419854bc7dSMichal Simek compatible = "xlnx,zynqmp-ipi-mailbox"; 1429854bc7dSMichal Simek interrupt-parent = <&gic>; 143cf0e27cdSMichal Simek interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; 1449854bc7dSMichal Simek xlnx,ipi-id = <0>; 1459854bc7dSMichal Simek #address-cells = <2>; 1469854bc7dSMichal Simek #size-cells = <2>; 1479854bc7dSMichal Simek ranges; 1489854bc7dSMichal Simek 1493effc177SMichal Simek ipi_mailbox_pmu1: mailbox@ff9905c0 { 1505be4fbbfSMichal Simek bootph-all; 151a98b6987SMichal Simek compatible = "xlnx,zynqmp-ipi-dest-mailbox"; 1529854bc7dSMichal Simek reg = <0x0 0xff9905c0 0x0 0x20>, 1539854bc7dSMichal Simek <0x0 0xff9905e0 0x0 0x20>, 1549854bc7dSMichal Simek <0x0 0xff990e80 0x0 0x20>, 1559854bc7dSMichal Simek <0x0 0xff990ea0 0x0 0x20>; 1569854bc7dSMichal Simek reg-names = "local_request_region", 1579854bc7dSMichal Simek "local_response_region", 1589854bc7dSMichal Simek "remote_request_region", 1599854bc7dSMichal Simek "remote_response_region"; 1609854bc7dSMichal Simek #mbox-cells = <1>; 1619854bc7dSMichal Simek xlnx,ipi-id = <4>; 1629854bc7dSMichal Simek }; 1639854bc7dSMichal Simek }; 1649854bc7dSMichal Simek 16517e76f95SMichal Simek dcc: dcc { 16617e76f95SMichal Simek compatible = "arm,dcc"; 16717e76f95SMichal Simek status = "disabled"; 1685be4fbbfSMichal Simek bootph-all; 16917e76f95SMichal Simek }; 17017e76f95SMichal Simek 1715d1b79d2SMichal Simek pmu { 1725d1b79d2SMichal Simek compatible = "arm,armv8-pmuv3"; 173886e7dddSMichal Simek interrupt-parent = <&gic>; 174cf0e27cdSMichal Simek interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>, 175cf0e27cdSMichal Simek <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>, 176cf0e27cdSMichal Simek <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>, 177cf0e27cdSMichal Simek <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 178f1d48a12SRadhey Shyam Pandey interrupt-affinity = <&cpu0>, 179f1d48a12SRadhey Shyam Pandey <&cpu1>, 180f1d48a12SRadhey Shyam Pandey <&cpu2>, 181f1d48a12SRadhey Shyam Pandey <&cpu3>; 1825d1b79d2SMichal Simek }; 1835d1b79d2SMichal Simek 1845d1b79d2SMichal Simek psci { 1855d1b79d2SMichal Simek compatible = "arm,psci-0.2"; 1865d1b79d2SMichal Simek method = "smc"; 1875d1b79d2SMichal Simek }; 1885d1b79d2SMichal Simek 189ef0d933eSRajan Vaja firmware { 19006d22ed6SIlias Apalodimas optee: optee { 19106d22ed6SIlias Apalodimas compatible = "linaro,optee-tz"; 19206d22ed6SIlias Apalodimas method = "smc"; 19306d22ed6SIlias Apalodimas }; 19406d22ed6SIlias Apalodimas 195ef0d933eSRajan Vaja zynqmp_firmware: zynqmp-firmware { 196ef0d933eSRajan Vaja compatible = "xlnx,zynqmp-firmware"; 197959b86aeSRajan Vaja #power-domain-cells = <1>; 198ef0d933eSRajan Vaja method = "smc"; 1995be4fbbfSMichal Simek bootph-all; 2009c363392SNava kishore Manne 2015710ea6aSMichal Simek zynqmp_power: power-management { 2025be4fbbfSMichal Simek bootph-all; 203959b86aeSRajan Vaja compatible = "xlnx,zynqmp-power"; 204959b86aeSRajan Vaja interrupt-parent = <&gic>; 205cf0e27cdSMichal Simek interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; 2069854bc7dSMichal Simek mboxes = <&ipi_mailbox_pmu1 0>, <&ipi_mailbox_pmu1 1>; 2079854bc7dSMichal Simek mbox-names = "tx", "rx"; 208959b86aeSRajan Vaja }; 209959b86aeSRajan Vaja 210995d4ef0SMichal Simek nvmem-firmware { 211b7178639SNava kishore Manne compatible = "xlnx,zynqmp-nvmem-fw"; 212b7178639SNava kishore Manne #address-cells = <1>; 213b7178639SNava kishore Manne #size-cells = <1>; 214b7178639SNava kishore Manne 215995d4ef0SMichal Simek soc_revision: soc-revision@0 { 216b7178639SNava kishore Manne reg = <0x0 0x4>; 217b7178639SNava kishore Manne }; 218b7178639SNava kishore Manne }; 219b7178639SNava kishore Manne 2209c363392SNava kishore Manne zynqmp_pcap: pcap { 2219c363392SNava kishore Manne compatible = "xlnx,zynqmp-pcap-fpga"; 2229c363392SNava kishore Manne }; 22388affa2fSKalyani Akula 22488affa2fSKalyani Akula xlnx_aes: zynqmp-aes { 22588affa2fSKalyani Akula compatible = "xlnx,zynqmp-aes"; 22688affa2fSKalyani Akula }; 22742cb66dcSMichal Simek 22842cb66dcSMichal Simek zynqmp_reset: reset-controller { 22942cb66dcSMichal Simek compatible = "xlnx,zynqmp-reset"; 23042cb66dcSMichal Simek #reset-cells = <1>; 23142cb66dcSMichal Simek }; 232c821045fSMichal Simek 233c821045fSMichal Simek pinctrl0: pinctrl { 234c821045fSMichal Simek compatible = "xlnx,zynqmp-pinctrl"; 235c821045fSMichal Simek status = "disabled"; 236c821045fSMichal Simek }; 23753ba1b2bSPiyush Mehta 23853ba1b2bSPiyush Mehta modepin_gpio: gpio { 23953ba1b2bSPiyush Mehta compatible = "xlnx,zynqmp-gpio-modepin"; 24053ba1b2bSPiyush Mehta gpio-controller; 24153ba1b2bSPiyush Mehta #gpio-cells = <2>; 24253ba1b2bSPiyush Mehta }; 243ef0d933eSRajan Vaja }; 244ef0d933eSRajan Vaja }; 245ef0d933eSRajan Vaja 2465d1b79d2SMichal Simek timer { 2475d1b79d2SMichal Simek compatible = "arm,armv8-timer"; 2485d1b79d2SMichal Simek interrupt-parent = <&gic>; 249cf0e27cdSMichal Simek interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 250cf0e27cdSMichal Simek <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 251cf0e27cdSMichal Simek <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 252cf0e27cdSMichal Simek <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; 2535d1b79d2SMichal Simek }; 2545d1b79d2SMichal Simek 255c40d1cceSNava kishore Manne fpga_full: fpga-full { 256c40d1cceSNava kishore Manne compatible = "fpga-region"; 257c40d1cceSNava kishore Manne fpga-mgr = <&zynqmp_pcap>; 258c40d1cceSNava kishore Manne #address-cells = <2>; 259c40d1cceSNava kishore Manne #size-cells = <2>; 260c40d1cceSNava kishore Manne ranges; 261c40d1cceSNava kishore Manne }; 262c40d1cceSNava kishore Manne 263400f6af0STanmay Shah remoteproc { 264400f6af0STanmay Shah compatible = "xlnx,zynqmp-r5fss"; 265400f6af0STanmay Shah xlnx,cluster-mode = <1>; 266400f6af0STanmay Shah 267400f6af0STanmay Shah r5f-0 { 268400f6af0STanmay Shah compatible = "xlnx,zynqmp-r5f"; 269400f6af0STanmay Shah power-domains = <&zynqmp_firmware PD_RPU_0>; 270400f6af0STanmay Shah memory-region = <&rproc_0_fw_image>; 271400f6af0STanmay Shah }; 272400f6af0STanmay Shah 273400f6af0STanmay Shah r5f-1 { 274400f6af0STanmay Shah compatible = "xlnx,zynqmp-r5f"; 275400f6af0STanmay Shah power-domains = <&zynqmp_firmware PD_RPU_1>; 276400f6af0STanmay Shah memory-region = <&rproc_1_fw_image>; 277400f6af0STanmay Shah }; 278400f6af0STanmay Shah }; 279400f6af0STanmay Shah 280dfff9066SMichal Simek amba: axi { 2815d1b79d2SMichal Simek compatible = "simple-bus"; 2825be4fbbfSMichal Simek bootph-all; 2835d1b79d2SMichal Simek #address-cells = <2>; 2847393fd86SMichal Simek #size-cells = <2>; 2855d1b79d2SMichal Simek ranges; 2865d1b79d2SMichal Simek 2873a8691f5SMichal Simek can0: can@ff060000 { 2883a8691f5SMichal Simek compatible = "xlnx,zynq-can-1.0"; 2893a8691f5SMichal Simek status = "disabled"; 2903a8691f5SMichal Simek clock-names = "can_clk", "pclk"; 2917393fd86SMichal Simek reg = <0x0 0xff060000 0x0 0x1000>; 292cf0e27cdSMichal Simek interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 2933a8691f5SMichal Simek interrupt-parent = <&gic>; 2943a8691f5SMichal Simek tx-fifo-depth = <0x40>; 2953a8691f5SMichal Simek rx-fifo-depth = <0x40>; 2961993f676SSrinivas Neeli resets = <&zynqmp_reset ZYNQMP_RESET_CAN0>; 297959b86aeSRajan Vaja power-domains = <&zynqmp_firmware PD_CAN_0>; 2983a8691f5SMichal Simek }; 2993a8691f5SMichal Simek 3003a8691f5SMichal Simek can1: can@ff070000 { 3013a8691f5SMichal Simek compatible = "xlnx,zynq-can-1.0"; 3023a8691f5SMichal Simek status = "disabled"; 3033a8691f5SMichal Simek clock-names = "can_clk", "pclk"; 3047393fd86SMichal Simek reg = <0x0 0xff070000 0x0 0x1000>; 305cf0e27cdSMichal Simek interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 3063a8691f5SMichal Simek interrupt-parent = <&gic>; 3073a8691f5SMichal Simek tx-fifo-depth = <0x40>; 3083a8691f5SMichal Simek rx-fifo-depth = <0x40>; 3091993f676SSrinivas Neeli resets = <&zynqmp_reset ZYNQMP_RESET_CAN1>; 310959b86aeSRajan Vaja power-domains = <&zynqmp_firmware PD_CAN_1>; 3113a8691f5SMichal Simek }; 3123a8691f5SMichal Simek 3138c50b1e4SMichal Simek cci: cci@fd6e0000 { 3148c50b1e4SMichal Simek compatible = "arm,cci-400"; 3154234645dSMichal Simek status = "disabled"; 3168c50b1e4SMichal Simek reg = <0x0 0xfd6e0000 0x0 0x9000>; 3178c50b1e4SMichal Simek ranges = <0x0 0x0 0xfd6e0000 0x10000>; 3188c50b1e4SMichal Simek #address-cells = <1>; 3198c50b1e4SMichal Simek #size-cells = <1>; 3208c50b1e4SMichal Simek 3218c50b1e4SMichal Simek pmu@9000 { 3228c50b1e4SMichal Simek compatible = "arm,cci-400-pmu,r1"; 3238c50b1e4SMichal Simek reg = <0x9000 0x5000>; 3248c50b1e4SMichal Simek interrupt-parent = <&gic>; 325cf0e27cdSMichal Simek interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 326cf0e27cdSMichal Simek <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 327cf0e27cdSMichal Simek <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 328cf0e27cdSMichal Simek <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 329cf0e27cdSMichal Simek <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; 3308c50b1e4SMichal Simek }; 3318c50b1e4SMichal Simek }; 3328c50b1e4SMichal Simek 333932bd0d8SMichal Simek /* GDMA */ 3343a14f0e6SMichael Tretter fpd_dma_chan1: dma-controller@fd500000 { 335932bd0d8SMichal Simek status = "disabled"; 336932bd0d8SMichal Simek compatible = "xlnx,zynqmp-dma-1.0"; 337932bd0d8SMichal Simek reg = <0x0 0xfd500000 0x0 0x1000>; 338932bd0d8SMichal Simek interrupt-parent = <&gic>; 339cf0e27cdSMichal Simek interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>; 340932bd0d8SMichal Simek clock-names = "clk_main", "clk_apb"; 3411ff2d58eSMichael Tretter #dma-cells = <1>; 342932bd0d8SMichal Simek xlnx,bus-width = <128>; 3438ac47837SMichal Simek iommus = <&smmu 0x14e8>; 344959b86aeSRajan Vaja power-domains = <&zynqmp_firmware PD_GDMA>; 345932bd0d8SMichal Simek }; 346932bd0d8SMichal Simek 3473a14f0e6SMichael Tretter fpd_dma_chan2: dma-controller@fd510000 { 348932bd0d8SMichal Simek status = "disabled"; 349932bd0d8SMichal Simek compatible = "xlnx,zynqmp-dma-1.0"; 350932bd0d8SMichal Simek reg = <0x0 0xfd510000 0x0 0x1000>; 351932bd0d8SMichal Simek interrupt-parent = <&gic>; 352cf0e27cdSMichal Simek interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; 353932bd0d8SMichal Simek clock-names = "clk_main", "clk_apb"; 3541ff2d58eSMichael Tretter #dma-cells = <1>; 355932bd0d8SMichal Simek xlnx,bus-width = <128>; 3568ac47837SMichal Simek iommus = <&smmu 0x14e9>; 357959b86aeSRajan Vaja power-domains = <&zynqmp_firmware PD_GDMA>; 358932bd0d8SMichal Simek }; 359932bd0d8SMichal Simek 3603a14f0e6SMichael Tretter fpd_dma_chan3: dma-controller@fd520000 { 361932bd0d8SMichal Simek status = "disabled"; 362932bd0d8SMichal Simek compatible = "xlnx,zynqmp-dma-1.0"; 363932bd0d8SMichal Simek reg = <0x0 0xfd520000 0x0 0x1000>; 364932bd0d8SMichal Simek interrupt-parent = <&gic>; 365cf0e27cdSMichal Simek interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>; 366932bd0d8SMichal Simek clock-names = "clk_main", "clk_apb"; 3671ff2d58eSMichael Tretter #dma-cells = <1>; 368932bd0d8SMichal Simek xlnx,bus-width = <128>; 3698ac47837SMichal Simek iommus = <&smmu 0x14ea>; 370959b86aeSRajan Vaja power-domains = <&zynqmp_firmware PD_GDMA>; 371932bd0d8SMichal Simek }; 372932bd0d8SMichal Simek 3733a14f0e6SMichael Tretter fpd_dma_chan4: dma-controller@fd530000 { 374932bd0d8SMichal Simek status = "disabled"; 375932bd0d8SMichal Simek compatible = "xlnx,zynqmp-dma-1.0"; 376932bd0d8SMichal Simek reg = <0x0 0xfd530000 0x0 0x1000>; 377932bd0d8SMichal Simek interrupt-parent = <&gic>; 378cf0e27cdSMichal Simek interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 379932bd0d8SMichal Simek clock-names = "clk_main", "clk_apb"; 3801ff2d58eSMichael Tretter #dma-cells = <1>; 381932bd0d8SMichal Simek xlnx,bus-width = <128>; 3828ac47837SMichal Simek iommus = <&smmu 0x14eb>; 383959b86aeSRajan Vaja power-domains = <&zynqmp_firmware PD_GDMA>; 384932bd0d8SMichal Simek }; 385932bd0d8SMichal Simek 3863a14f0e6SMichael Tretter fpd_dma_chan5: dma-controller@fd540000 { 387932bd0d8SMichal Simek status = "disabled"; 388932bd0d8SMichal Simek compatible = "xlnx,zynqmp-dma-1.0"; 389932bd0d8SMichal Simek reg = <0x0 0xfd540000 0x0 0x1000>; 390932bd0d8SMichal Simek interrupt-parent = <&gic>; 391cf0e27cdSMichal Simek interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>; 392932bd0d8SMichal Simek clock-names = "clk_main", "clk_apb"; 3931ff2d58eSMichael Tretter #dma-cells = <1>; 394932bd0d8SMichal Simek xlnx,bus-width = <128>; 3958ac47837SMichal Simek iommus = <&smmu 0x14ec>; 396959b86aeSRajan Vaja power-domains = <&zynqmp_firmware PD_GDMA>; 397932bd0d8SMichal Simek }; 398932bd0d8SMichal Simek 3993a14f0e6SMichael Tretter fpd_dma_chan6: dma-controller@fd550000 { 400932bd0d8SMichal Simek status = "disabled"; 401932bd0d8SMichal Simek compatible = "xlnx,zynqmp-dma-1.0"; 402932bd0d8SMichal Simek reg = <0x0 0xfd550000 0x0 0x1000>; 403932bd0d8SMichal Simek interrupt-parent = <&gic>; 404cf0e27cdSMichal Simek interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>; 405932bd0d8SMichal Simek clock-names = "clk_main", "clk_apb"; 4061ff2d58eSMichael Tretter #dma-cells = <1>; 407932bd0d8SMichal Simek xlnx,bus-width = <128>; 4088ac47837SMichal Simek iommus = <&smmu 0x14ed>; 409959b86aeSRajan Vaja power-domains = <&zynqmp_firmware PD_GDMA>; 410932bd0d8SMichal Simek }; 411932bd0d8SMichal Simek 4123a14f0e6SMichael Tretter fpd_dma_chan7: dma-controller@fd560000 { 413932bd0d8SMichal Simek status = "disabled"; 414932bd0d8SMichal Simek compatible = "xlnx,zynqmp-dma-1.0"; 415932bd0d8SMichal Simek reg = <0x0 0xfd560000 0x0 0x1000>; 416932bd0d8SMichal Simek interrupt-parent = <&gic>; 417cf0e27cdSMichal Simek interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; 418932bd0d8SMichal Simek clock-names = "clk_main", "clk_apb"; 4191ff2d58eSMichael Tretter #dma-cells = <1>; 420932bd0d8SMichal Simek xlnx,bus-width = <128>; 4218ac47837SMichal Simek iommus = <&smmu 0x14ee>; 422959b86aeSRajan Vaja power-domains = <&zynqmp_firmware PD_GDMA>; 423932bd0d8SMichal Simek }; 424932bd0d8SMichal Simek 4253a14f0e6SMichael Tretter fpd_dma_chan8: dma-controller@fd570000 { 426932bd0d8SMichal Simek status = "disabled"; 427932bd0d8SMichal Simek compatible = "xlnx,zynqmp-dma-1.0"; 428932bd0d8SMichal Simek reg = <0x0 0xfd570000 0x0 0x1000>; 429932bd0d8SMichal Simek interrupt-parent = <&gic>; 430cf0e27cdSMichal Simek interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>; 431932bd0d8SMichal Simek clock-names = "clk_main", "clk_apb"; 4321ff2d58eSMichael Tretter #dma-cells = <1>; 433932bd0d8SMichal Simek xlnx,bus-width = <128>; 4348ac47837SMichal Simek iommus = <&smmu 0x14ef>; 435959b86aeSRajan Vaja power-domains = <&zynqmp_firmware PD_GDMA>; 436932bd0d8SMichal Simek }; 437932bd0d8SMichal Simek 43874790cf9SMichal Simek gic: interrupt-controller@f9010000 { 43974790cf9SMichal Simek compatible = "arm,gic-400"; 44074790cf9SMichal Simek #interrupt-cells = <3>; 44174790cf9SMichal Simek reg = <0x0 0xf9010000 0x0 0x10000>, 44274790cf9SMichal Simek <0x0 0xf9020000 0x0 0x20000>, 44374790cf9SMichal Simek <0x0 0xf9040000 0x0 0x20000>, 44474790cf9SMichal Simek <0x0 0xf9060000 0x0 0x20000>; 44574790cf9SMichal Simek interrupt-controller; 44674790cf9SMichal Simek interrupt-parent = <&gic>; 447cf0e27cdSMichal Simek interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; 44874790cf9SMichal Simek }; 44974790cf9SMichal Simek 45037e78949SParth Gajjar gpu: gpu@fd4b0000 { 45137e78949SParth Gajjar status = "disabled"; 45237e78949SParth Gajjar compatible = "xlnx,zynqmp-mali", "arm,mali-400"; 45337e78949SParth Gajjar reg = <0x0 0xfd4b0000 0x0 0x10000>; 45437e78949SParth Gajjar interrupt-parent = <&gic>; 455cf0e27cdSMichal Simek interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 456cf0e27cdSMichal Simek <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 457cf0e27cdSMichal Simek <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 458cf0e27cdSMichal Simek <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 459cf0e27cdSMichal Simek <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 460cf0e27cdSMichal Simek <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>; 46137e78949SParth Gajjar interrupt-names = "gp", "gpmmu", "pp0", "ppmmu0", "pp1", "ppmmu1"; 46237e78949SParth Gajjar clock-names = "bus", "core"; 46337e78949SParth Gajjar power-domains = <&zynqmp_firmware PD_GPU>; 46437e78949SParth Gajjar }; 46537e78949SParth Gajjar 466932bd0d8SMichal Simek /* LPDDMA default allows only secured access. inorder to enable 467932bd0d8SMichal Simek * These dma channels, Users should ensure that these dma 468932bd0d8SMichal Simek * Channels are allowed for non secure access. 469932bd0d8SMichal Simek */ 4703a14f0e6SMichael Tretter lpd_dma_chan1: dma-controller@ffa80000 { 471932bd0d8SMichal Simek status = "disabled"; 472932bd0d8SMichal Simek compatible = "xlnx,zynqmp-dma-1.0"; 473932bd0d8SMichal Simek reg = <0x0 0xffa80000 0x0 0x1000>; 474932bd0d8SMichal Simek interrupt-parent = <&gic>; 475cf0e27cdSMichal Simek interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; 476932bd0d8SMichal Simek clock-names = "clk_main", "clk_apb"; 4771ff2d58eSMichael Tretter #dma-cells = <1>; 478932bd0d8SMichal Simek xlnx,bus-width = <64>; 4798ac47837SMichal Simek iommus = <&smmu 0x868>; 480959b86aeSRajan Vaja power-domains = <&zynqmp_firmware PD_ADMA>; 481932bd0d8SMichal Simek }; 482932bd0d8SMichal Simek 4833a14f0e6SMichael Tretter lpd_dma_chan2: dma-controller@ffa90000 { 484932bd0d8SMichal Simek status = "disabled"; 485932bd0d8SMichal Simek compatible = "xlnx,zynqmp-dma-1.0"; 486932bd0d8SMichal Simek reg = <0x0 0xffa90000 0x0 0x1000>; 487932bd0d8SMichal Simek interrupt-parent = <&gic>; 488cf0e27cdSMichal Simek interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; 489932bd0d8SMichal Simek clock-names = "clk_main", "clk_apb"; 4901ff2d58eSMichael Tretter #dma-cells = <1>; 491932bd0d8SMichal Simek xlnx,bus-width = <64>; 4928ac47837SMichal Simek iommus = <&smmu 0x869>; 493959b86aeSRajan Vaja power-domains = <&zynqmp_firmware PD_ADMA>; 494932bd0d8SMichal Simek }; 495932bd0d8SMichal Simek 4963a14f0e6SMichael Tretter lpd_dma_chan3: dma-controller@ffaa0000 { 497932bd0d8SMichal Simek status = "disabled"; 498932bd0d8SMichal Simek compatible = "xlnx,zynqmp-dma-1.0"; 499932bd0d8SMichal Simek reg = <0x0 0xffaa0000 0x0 0x1000>; 500932bd0d8SMichal Simek interrupt-parent = <&gic>; 501cf0e27cdSMichal Simek interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; 502932bd0d8SMichal Simek clock-names = "clk_main", "clk_apb"; 5031ff2d58eSMichael Tretter #dma-cells = <1>; 504932bd0d8SMichal Simek xlnx,bus-width = <64>; 5058ac47837SMichal Simek iommus = <&smmu 0x86a>; 506959b86aeSRajan Vaja power-domains = <&zynqmp_firmware PD_ADMA>; 507932bd0d8SMichal Simek }; 508932bd0d8SMichal Simek 5093a14f0e6SMichael Tretter lpd_dma_chan4: dma-controller@ffab0000 { 510932bd0d8SMichal Simek status = "disabled"; 511932bd0d8SMichal Simek compatible = "xlnx,zynqmp-dma-1.0"; 512932bd0d8SMichal Simek reg = <0x0 0xffab0000 0x0 0x1000>; 513932bd0d8SMichal Simek interrupt-parent = <&gic>; 514cf0e27cdSMichal Simek interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; 515932bd0d8SMichal Simek clock-names = "clk_main", "clk_apb"; 5161ff2d58eSMichael Tretter #dma-cells = <1>; 517932bd0d8SMichal Simek xlnx,bus-width = <64>; 5188ac47837SMichal Simek iommus = <&smmu 0x86b>; 519959b86aeSRajan Vaja power-domains = <&zynqmp_firmware PD_ADMA>; 520932bd0d8SMichal Simek }; 521932bd0d8SMichal Simek 5223a14f0e6SMichael Tretter lpd_dma_chan5: dma-controller@ffac0000 { 523932bd0d8SMichal Simek status = "disabled"; 524932bd0d8SMichal Simek compatible = "xlnx,zynqmp-dma-1.0"; 525932bd0d8SMichal Simek reg = <0x0 0xffac0000 0x0 0x1000>; 526932bd0d8SMichal Simek interrupt-parent = <&gic>; 527cf0e27cdSMichal Simek interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; 528932bd0d8SMichal Simek clock-names = "clk_main", "clk_apb"; 5291ff2d58eSMichael Tretter #dma-cells = <1>; 530932bd0d8SMichal Simek xlnx,bus-width = <64>; 5318ac47837SMichal Simek iommus = <&smmu 0x86c>; 532959b86aeSRajan Vaja power-domains = <&zynqmp_firmware PD_ADMA>; 533932bd0d8SMichal Simek }; 534932bd0d8SMichal Simek 5353a14f0e6SMichael Tretter lpd_dma_chan6: dma-controller@ffad0000 { 536932bd0d8SMichal Simek status = "disabled"; 537932bd0d8SMichal Simek compatible = "xlnx,zynqmp-dma-1.0"; 538932bd0d8SMichal Simek reg = <0x0 0xffad0000 0x0 0x1000>; 539932bd0d8SMichal Simek interrupt-parent = <&gic>; 540cf0e27cdSMichal Simek interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; 541932bd0d8SMichal Simek clock-names = "clk_main", "clk_apb"; 5421ff2d58eSMichael Tretter #dma-cells = <1>; 543932bd0d8SMichal Simek xlnx,bus-width = <64>; 5448ac47837SMichal Simek iommus = <&smmu 0x86d>; 545959b86aeSRajan Vaja power-domains = <&zynqmp_firmware PD_ADMA>; 546932bd0d8SMichal Simek }; 547932bd0d8SMichal Simek 5483a14f0e6SMichael Tretter lpd_dma_chan7: dma-controller@ffae0000 { 549932bd0d8SMichal Simek status = "disabled"; 550932bd0d8SMichal Simek compatible = "xlnx,zynqmp-dma-1.0"; 551932bd0d8SMichal Simek reg = <0x0 0xffae0000 0x0 0x1000>; 552932bd0d8SMichal Simek interrupt-parent = <&gic>; 553cf0e27cdSMichal Simek interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 554932bd0d8SMichal Simek clock-names = "clk_main", "clk_apb"; 5551ff2d58eSMichael Tretter #dma-cells = <1>; 556932bd0d8SMichal Simek xlnx,bus-width = <64>; 5578ac47837SMichal Simek iommus = <&smmu 0x86e>; 558959b86aeSRajan Vaja power-domains = <&zynqmp_firmware PD_ADMA>; 559932bd0d8SMichal Simek }; 560932bd0d8SMichal Simek 5613a14f0e6SMichael Tretter lpd_dma_chan8: dma-controller@ffaf0000 { 562932bd0d8SMichal Simek status = "disabled"; 563932bd0d8SMichal Simek compatible = "xlnx,zynqmp-dma-1.0"; 564932bd0d8SMichal Simek reg = <0x0 0xffaf0000 0x0 0x1000>; 565932bd0d8SMichal Simek interrupt-parent = <&gic>; 566cf0e27cdSMichal Simek interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; 567932bd0d8SMichal Simek clock-names = "clk_main", "clk_apb"; 5681ff2d58eSMichael Tretter #dma-cells = <1>; 569932bd0d8SMichal Simek xlnx,bus-width = <64>; 5708ac47837SMichal Simek iommus = <&smmu 0x86f>; 571959b86aeSRajan Vaja power-domains = <&zynqmp_firmware PD_ADMA>; 572932bd0d8SMichal Simek }; 573932bd0d8SMichal Simek 574e7abd894SManish Narani mc: memory-controller@fd070000 { 575e7abd894SManish Narani compatible = "xlnx,zynqmp-ddrc-2.40a"; 576e7abd894SManish Narani reg = <0x0 0xfd070000 0x0 0x30000>; 577e7abd894SManish Narani interrupt-parent = <&gic>; 578cf0e27cdSMichal Simek interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 579e7abd894SManish Narani }; 580e7abd894SManish Narani 58141b452a5SMichal Simek nand0: nand-controller@ff100000 { 58241b452a5SMichal Simek compatible = "xlnx,zynqmp-nand-controller", "arasan,nfc-v3p10"; 58341b452a5SMichal Simek status = "disabled"; 58441b452a5SMichal Simek reg = <0x0 0xff100000 0x0 0x1000>; 58541b452a5SMichal Simek clock-names = "controller", "bus"; 58641b452a5SMichal Simek interrupt-parent = <&gic>; 587cf0e27cdSMichal Simek interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 58841b452a5SMichal Simek #address-cells = <1>; 58941b452a5SMichal Simek #size-cells = <0>; 5908ac47837SMichal Simek iommus = <&smmu 0x872>; 59141b452a5SMichal Simek power-domains = <&zynqmp_firmware PD_NAND>; 59241b452a5SMichal Simek }; 59341b452a5SMichal Simek 5945d1b79d2SMichal Simek gem0: ethernet@ff0b0000 { 595b993ea2bSHarini Katakam compatible = "xlnx,zynqmp-gem", "cdns,gem"; 5965d1b79d2SMichal Simek status = "disabled"; 5975d1b79d2SMichal Simek interrupt-parent = <&gic>; 598cf0e27cdSMichal Simek interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 599cf0e27cdSMichal Simek <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; 6007393fd86SMichal Simek reg = <0x0 0xff0b0000 0x0 0x1000>; 601185ffb48SMichal Simek clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk"; 6028ac47837SMichal Simek iommus = <&smmu 0x874>; 603959b86aeSRajan Vaja power-domains = <&zynqmp_firmware PD_ETH_0>; 604e461bd6fSRobert Hancock resets = <&zynqmp_reset ZYNQMP_RESET_GEM0>; 605e461bd6fSRobert Hancock reset-names = "gem0_rst"; 6065d1b79d2SMichal Simek }; 6075d1b79d2SMichal Simek 6085d1b79d2SMichal Simek gem1: ethernet@ff0c0000 { 609b993ea2bSHarini Katakam compatible = "xlnx,zynqmp-gem", "cdns,gem"; 6105d1b79d2SMichal Simek status = "disabled"; 6115d1b79d2SMichal Simek interrupt-parent = <&gic>; 612cf0e27cdSMichal Simek interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 613cf0e27cdSMichal Simek <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; 6147393fd86SMichal Simek reg = <0x0 0xff0c0000 0x0 0x1000>; 615185ffb48SMichal Simek clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk"; 6168ac47837SMichal Simek iommus = <&smmu 0x875>; 617959b86aeSRajan Vaja power-domains = <&zynqmp_firmware PD_ETH_1>; 618e461bd6fSRobert Hancock resets = <&zynqmp_reset ZYNQMP_RESET_GEM1>; 619e461bd6fSRobert Hancock reset-names = "gem1_rst"; 6205d1b79d2SMichal Simek }; 6215d1b79d2SMichal Simek 6225d1b79d2SMichal Simek gem2: ethernet@ff0d0000 { 623b993ea2bSHarini Katakam compatible = "xlnx,zynqmp-gem", "cdns,gem"; 6245d1b79d2SMichal Simek status = "disabled"; 6255d1b79d2SMichal Simek interrupt-parent = <&gic>; 626cf0e27cdSMichal Simek interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 627cf0e27cdSMichal Simek <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; 6287393fd86SMichal Simek reg = <0x0 0xff0d0000 0x0 0x1000>; 629185ffb48SMichal Simek clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk"; 6308ac47837SMichal Simek iommus = <&smmu 0x876>; 631959b86aeSRajan Vaja power-domains = <&zynqmp_firmware PD_ETH_2>; 632e461bd6fSRobert Hancock resets = <&zynqmp_reset ZYNQMP_RESET_GEM2>; 633e461bd6fSRobert Hancock reset-names = "gem2_rst"; 6345d1b79d2SMichal Simek }; 6355d1b79d2SMichal Simek 6365d1b79d2SMichal Simek gem3: ethernet@ff0e0000 { 637b993ea2bSHarini Katakam compatible = "xlnx,zynqmp-gem", "cdns,gem"; 6385d1b79d2SMichal Simek status = "disabled"; 6395d1b79d2SMichal Simek interrupt-parent = <&gic>; 640cf0e27cdSMichal Simek interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>, 641cf0e27cdSMichal Simek <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 6427393fd86SMichal Simek reg = <0x0 0xff0e0000 0x0 0x1000>; 643185ffb48SMichal Simek clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk"; 6448ac47837SMichal Simek iommus = <&smmu 0x877>; 645959b86aeSRajan Vaja power-domains = <&zynqmp_firmware PD_ETH_3>; 646e461bd6fSRobert Hancock resets = <&zynqmp_reset ZYNQMP_RESET_GEM3>; 647e461bd6fSRobert Hancock reset-names = "gem3_rst"; 6485d1b79d2SMichal Simek }; 6495d1b79d2SMichal Simek 65072e5df43SMichal Simek gpio: gpio@ff0a0000 { 65172e5df43SMichal Simek compatible = "xlnx,zynqmp-gpio-1.0"; 65272e5df43SMichal Simek status = "disabled"; 65372e5df43SMichal Simek #gpio-cells = <0x2>; 6544556b160SMichal Simek gpio-controller; 65572e5df43SMichal Simek interrupt-parent = <&gic>; 656cf0e27cdSMichal Simek interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 65772e5df43SMichal Simek interrupt-controller; 65872e5df43SMichal Simek #interrupt-cells = <2>; 6597393fd86SMichal Simek reg = <0x0 0xff0a0000 0x0 0x1000>; 660959b86aeSRajan Vaja power-domains = <&zynqmp_firmware PD_GPIO>; 66172e5df43SMichal Simek }; 66272e5df43SMichal Simek 6635d1b79d2SMichal Simek i2c0: i2c@ff020000 { 66435292518SMichal Simek compatible = "cdns,i2c-r1p14"; 6655d1b79d2SMichal Simek status = "disabled"; 6665d1b79d2SMichal Simek interrupt-parent = <&gic>; 667cf0e27cdSMichal Simek interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 6683175b522SVaralaxmi Bingi clock-frequency = <400000>; 6697393fd86SMichal Simek reg = <0x0 0xff020000 0x0 0x1000>; 6705d1b79d2SMichal Simek #address-cells = <1>; 6715d1b79d2SMichal Simek #size-cells = <0>; 672959b86aeSRajan Vaja power-domains = <&zynqmp_firmware PD_I2C_0>; 6735d1b79d2SMichal Simek }; 6745d1b79d2SMichal Simek 6755d1b79d2SMichal Simek i2c1: i2c@ff030000 { 67635292518SMichal Simek compatible = "cdns,i2c-r1p14"; 6775d1b79d2SMichal Simek status = "disabled"; 6785d1b79d2SMichal Simek interrupt-parent = <&gic>; 679cf0e27cdSMichal Simek interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>; 6803175b522SVaralaxmi Bingi clock-frequency = <400000>; 6817393fd86SMichal Simek reg = <0x0 0xff030000 0x0 0x1000>; 6825d1b79d2SMichal Simek #address-cells = <1>; 6835d1b79d2SMichal Simek #size-cells = <0>; 684959b86aeSRajan Vaja power-domains = <&zynqmp_firmware PD_I2C_1>; 6855d1b79d2SMichal Simek }; 6865d1b79d2SMichal Simek 68778b83b8cSMichal Simek pcie: pcie@fd0e0000 { 68878b83b8cSMichal Simek compatible = "xlnx,nwl-pcie-2.11"; 68978b83b8cSMichal Simek status = "disabled"; 69078b83b8cSMichal Simek #address-cells = <3>; 69178b83b8cSMichal Simek #size-cells = <2>; 69278b83b8cSMichal Simek #interrupt-cells = <1>; 69378b83b8cSMichal Simek msi-controller; 69478b83b8cSMichal Simek device_type = "pci"; 69578b83b8cSMichal Simek interrupt-parent = <&gic>; 696cf0e27cdSMichal Simek interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, 697cf0e27cdSMichal Simek <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 698cf0e27cdSMichal Simek <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 699cf0e27cdSMichal Simek <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, /* MSI_1 [63...32] */ 700cf0e27cdSMichal Simek <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; /* MSI_0 [31...0] */ 70178b83b8cSMichal Simek interrupt-names = "misc", "dummy", "intx", 70278b83b8cSMichal Simek "msi1", "msi0"; 70378b83b8cSMichal Simek msi-parent = <&pcie>; 70478b83b8cSMichal Simek reg = <0x0 0xfd0e0000 0x0 0x1000>, 70578b83b8cSMichal Simek <0x0 0xfd480000 0x0 0x1000>, 70634736222SThippeswamy Havalige <0x80 0x00000000 0x0 0x10000000>; 70778b83b8cSMichal Simek reg-names = "breg", "pcireg", "cfg"; 70848ab2996SMichal Simek ranges = <0x02000000 0x00000000 0xe0000000 0x00000000 0xe0000000 0x00000000 0x10000000>,/* non-prefetchable memory */ 70948ab2996SMichal Simek <0x43000000 0x00000006 0x00000000 0x00000006 0x00000000 0x00000002 0x00000000>;/* prefetchable memory */ 710d15c56caSRob Herring bus-range = <0x00 0xff>; 71178b83b8cSMichal Simek interrupt-map-mask = <0x0 0x0 0x0 0x7>; 71278b83b8cSMichal Simek interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>, 71378b83b8cSMichal Simek <0x0 0x0 0x0 0x2 &pcie_intc 0x2>, 71478b83b8cSMichal Simek <0x0 0x0 0x0 0x3 &pcie_intc 0x3>, 71578b83b8cSMichal Simek <0x0 0x0 0x0 0x4 &pcie_intc 0x4>; 716d58f9227SStefano Stabellini iommus = <&smmu 0x4d0>; 717959b86aeSRajan Vaja power-domains = <&zynqmp_firmware PD_PCIE>; 71878b83b8cSMichal Simek pcie_intc: legacy-interrupt-controller { 71978b83b8cSMichal Simek interrupt-controller; 72078b83b8cSMichal Simek #address-cells = <0>; 72178b83b8cSMichal Simek #interrupt-cells = <1>; 72278b83b8cSMichal Simek }; 72378b83b8cSMichal Simek }; 72478b83b8cSMichal Simek 725cbf8bed0SMichal Simek qspi: spi@ff0f0000 { 7265be4fbbfSMichal Simek bootph-all; 727cbf8bed0SMichal Simek compatible = "xlnx,zynqmp-qspi-1.0"; 728cbf8bed0SMichal Simek status = "disabled"; 729cbf8bed0SMichal Simek clock-names = "ref_clk", "pclk"; 730cf0e27cdSMichal Simek interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 731cbf8bed0SMichal Simek interrupt-parent = <&gic>; 732cbf8bed0SMichal Simek num-cs = <1>; 733cbf8bed0SMichal Simek reg = <0x0 0xff0f0000 0x0 0x1000>, 734cbf8bed0SMichal Simek <0x0 0xc0000000 0x0 0x8000000>; 735cbf8bed0SMichal Simek #address-cells = <1>; 736cbf8bed0SMichal Simek #size-cells = <0>; 7378ac47837SMichal Simek iommus = <&smmu 0x873>; 738cbf8bed0SMichal Simek power-domains = <&zynqmp_firmware PD_QSPI>; 739cbf8bed0SMichal Simek }; 740cbf8bed0SMichal Simek 741b4b6fb8dSLaurent Pinchart psgtr: phy@fd400000 { 742b4b6fb8dSLaurent Pinchart compatible = "xlnx,zynqmp-psgtr-v1.1"; 743b4b6fb8dSLaurent Pinchart status = "disabled"; 744b4b6fb8dSLaurent Pinchart reg = <0x0 0xfd400000 0x0 0x40000>, 745b4b6fb8dSLaurent Pinchart <0x0 0xfd3d0000 0x0 0x1000>; 746b4b6fb8dSLaurent Pinchart reg-names = "serdes", "siou"; 747b4b6fb8dSLaurent Pinchart #phy-cells = <4>; 748b4b6fb8dSLaurent Pinchart }; 749b4b6fb8dSLaurent Pinchart 7507fb7820cSMichal Simek rtc: rtc@ffa60000 { 7517fb7820cSMichal Simek compatible = "xlnx,zynqmp-rtc"; 7527fb7820cSMichal Simek status = "disabled"; 7537fb7820cSMichal Simek reg = <0x0 0xffa60000 0x0 0x100>; 7547fb7820cSMichal Simek interrupt-parent = <&gic>; 755cf0e27cdSMichal Simek interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>, 756cf0e27cdSMichal Simek <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; 7577fb7820cSMichal Simek interrupt-names = "alarm", "sec"; 758a787716aSSrinivas Neeli calibration = <0x7FFF>; 7597fb7820cSMichal Simek }; 7607fb7820cSMichal Simek 7618fae442fSSuneel Garapati sata: ahci@fd0c0000 { 7628fae442fSSuneel Garapati compatible = "ceva,ahci-1v84"; 7638fae442fSSuneel Garapati status = "disabled"; 7647393fd86SMichal Simek reg = <0x0 0xfd0c0000 0x0 0x2000>; 7658fae442fSSuneel Garapati interrupt-parent = <&gic>; 766cf0e27cdSMichal Simek interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 767959b86aeSRajan Vaja power-domains = <&zynqmp_firmware PD_SATA>; 768bc97eb86SMichal Simek resets = <&zynqmp_reset ZYNQMP_RESET_SATA>; 7698ac47837SMichal Simek iommus = <&smmu 0x4c0>, <&smmu 0x4c1>, 7708ac47837SMichal Simek <&smmu 0x4c2>, <&smmu 0x4c3>; 7718fae442fSSuneel Garapati }; 7728fae442fSSuneel Garapati 7739fd609ffSMichal Simek sdhci0: mmc@ff160000 { 7745be4fbbfSMichal Simek bootph-all; 775a8fdb80fSManish Narani compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a"; 7765d1b79d2SMichal Simek status = "disabled"; 7775d1b79d2SMichal Simek interrupt-parent = <&gic>; 778cf0e27cdSMichal Simek interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; 7797393fd86SMichal Simek reg = <0x0 0xff160000 0x0 0x1000>; 7805d1b79d2SMichal Simek clock-names = "clk_xin", "clk_ahb"; 7818ac47837SMichal Simek iommus = <&smmu 0x870>; 782a8fdb80fSManish Narani #clock-cells = <1>; 783a8fdb80fSManish Narani clock-output-names = "clk_out_sd0", "clk_in_sd0"; 784959b86aeSRajan Vaja power-domains = <&zynqmp_firmware PD_SD_0>; 7856ae507f0SSai Krishna Potthuri resets = <&zynqmp_reset ZYNQMP_RESET_SDIO0>; 7865d1b79d2SMichal Simek }; 7875d1b79d2SMichal Simek 7889fd609ffSMichal Simek sdhci1: mmc@ff170000 { 7895be4fbbfSMichal Simek bootph-all; 790a8fdb80fSManish Narani compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a"; 7915d1b79d2SMichal Simek status = "disabled"; 7925d1b79d2SMichal Simek interrupt-parent = <&gic>; 793cf0e27cdSMichal Simek interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; 7947393fd86SMichal Simek reg = <0x0 0xff170000 0x0 0x1000>; 7955d1b79d2SMichal Simek clock-names = "clk_xin", "clk_ahb"; 7968ac47837SMichal Simek iommus = <&smmu 0x871>; 797a8fdb80fSManish Narani #clock-cells = <1>; 798a8fdb80fSManish Narani clock-output-names = "clk_out_sd1", "clk_in_sd1"; 799959b86aeSRajan Vaja power-domains = <&zynqmp_firmware PD_SD_1>; 8006ae507f0SSai Krishna Potthuri resets = <&zynqmp_reset ZYNQMP_RESET_SDIO1>; 8015d1b79d2SMichal Simek }; 8025d1b79d2SMichal Simek 8038d53ecfbSKrzysztof Kozlowski smmu: iommu@fd800000 { 804ff92e361SMichal Simek compatible = "arm,mmu-500"; 8057393fd86SMichal Simek reg = <0x0 0xfd800000 0x0 0x20000>; 8068ac47837SMichal Simek #iommu-cells = <1>; 8072f9ed199SNaga Sureshkumar Relli status = "disabled"; 808ff92e361SMichal Simek #global-interrupts = <1>; 809ff92e361SMichal Simek interrupt-parent = <&gic>; 810cf0e27cdSMichal Simek interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>, 811cf0e27cdSMichal Simek <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>, 812cf0e27cdSMichal Simek <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>, 813cf0e27cdSMichal Simek <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>, 814cf0e27cdSMichal Simek <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>, 815cf0e27cdSMichal Simek <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>, 816cf0e27cdSMichal Simek <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>, 817cf0e27cdSMichal Simek <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>, 818cf0e27cdSMichal Simek <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>, 819cf0e27cdSMichal Simek <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>, 820cf0e27cdSMichal Simek <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>, 821cf0e27cdSMichal Simek <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>, 822cf0e27cdSMichal Simek <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>, 823cf0e27cdSMichal Simek <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>, 824cf0e27cdSMichal Simek <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>, 825cf0e27cdSMichal Simek <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>, 826cf0e27cdSMichal Simek <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 827ff92e361SMichal Simek }; 828ff92e361SMichal Simek 829f49310dcSMichal Simek spi0: spi@ff040000 { 830f49310dcSMichal Simek compatible = "cdns,spi-r1p6"; 831f49310dcSMichal Simek status = "disabled"; 832f49310dcSMichal Simek interrupt-parent = <&gic>; 833cf0e27cdSMichal Simek interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 8347393fd86SMichal Simek reg = <0x0 0xff040000 0x0 0x1000>; 835f49310dcSMichal Simek clock-names = "ref_clk", "pclk"; 836f49310dcSMichal Simek #address-cells = <1>; 837f49310dcSMichal Simek #size-cells = <0>; 838959b86aeSRajan Vaja power-domains = <&zynqmp_firmware PD_SPI_0>; 839f49310dcSMichal Simek }; 840f49310dcSMichal Simek 841f49310dcSMichal Simek spi1: spi@ff050000 { 842f49310dcSMichal Simek compatible = "cdns,spi-r1p6"; 843f49310dcSMichal Simek status = "disabled"; 844f49310dcSMichal Simek interrupt-parent = <&gic>; 845cf0e27cdSMichal Simek interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 8467393fd86SMichal Simek reg = <0x0 0xff050000 0x0 0x1000>; 847f49310dcSMichal Simek clock-names = "ref_clk", "pclk"; 848f49310dcSMichal Simek #address-cells = <1>; 849f49310dcSMichal Simek #size-cells = <0>; 850959b86aeSRajan Vaja power-domains = <&zynqmp_firmware PD_SPI_1>; 851f49310dcSMichal Simek }; 852f49310dcSMichal Simek 8538fd7a775SMichal Simek ttc0: timer@ff110000 { 8548fd7a775SMichal Simek compatible = "cdns,ttc"; 8558fd7a775SMichal Simek status = "disabled"; 8568fd7a775SMichal Simek interrupt-parent = <&gic>; 857cf0e27cdSMichal Simek interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, 858cf0e27cdSMichal Simek <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, 859cf0e27cdSMichal Simek <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 8607393fd86SMichal Simek reg = <0x0 0xff110000 0x0 0x1000>; 8618fd7a775SMichal Simek timer-width = <32>; 862959b86aeSRajan Vaja power-domains = <&zynqmp_firmware PD_TTC_0>; 8638fd7a775SMichal Simek }; 8648fd7a775SMichal Simek 8658fd7a775SMichal Simek ttc1: timer@ff120000 { 8668fd7a775SMichal Simek compatible = "cdns,ttc"; 8678fd7a775SMichal Simek status = "disabled"; 8688fd7a775SMichal Simek interrupt-parent = <&gic>; 869cf0e27cdSMichal Simek interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 870cf0e27cdSMichal Simek <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 871cf0e27cdSMichal Simek <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; 8727393fd86SMichal Simek reg = <0x0 0xff120000 0x0 0x1000>; 8738fd7a775SMichal Simek timer-width = <32>; 874959b86aeSRajan Vaja power-domains = <&zynqmp_firmware PD_TTC_1>; 8758fd7a775SMichal Simek }; 8768fd7a775SMichal Simek 8778fd7a775SMichal Simek ttc2: timer@ff130000 { 8788fd7a775SMichal Simek compatible = "cdns,ttc"; 8798fd7a775SMichal Simek status = "disabled"; 8808fd7a775SMichal Simek interrupt-parent = <&gic>; 881cf0e27cdSMichal Simek interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 882cf0e27cdSMichal Simek <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 883cf0e27cdSMichal Simek <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; 8847393fd86SMichal Simek reg = <0x0 0xff130000 0x0 0x1000>; 8858fd7a775SMichal Simek timer-width = <32>; 886959b86aeSRajan Vaja power-domains = <&zynqmp_firmware PD_TTC_2>; 8878fd7a775SMichal Simek }; 8888fd7a775SMichal Simek 8898fd7a775SMichal Simek ttc3: timer@ff140000 { 8908fd7a775SMichal Simek compatible = "cdns,ttc"; 8918fd7a775SMichal Simek status = "disabled"; 8928fd7a775SMichal Simek interrupt-parent = <&gic>; 893cf0e27cdSMichal Simek interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 894cf0e27cdSMichal Simek <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 895cf0e27cdSMichal Simek <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; 8967393fd86SMichal Simek reg = <0x0 0xff140000 0x0 0x1000>; 8978fd7a775SMichal Simek timer-width = <32>; 898959b86aeSRajan Vaja power-domains = <&zynqmp_firmware PD_TTC_3>; 8998fd7a775SMichal Simek }; 9008fd7a775SMichal Simek 9018fd7a775SMichal Simek uart0: serial@ff000000 { 9025be4fbbfSMichal Simek bootph-all; 903812fa2f0SMichal Simek compatible = "xlnx,zynqmp-uart", "cdns,uart-r1p12"; 9048fd7a775SMichal Simek status = "disabled"; 9058fd7a775SMichal Simek interrupt-parent = <&gic>; 906cf0e27cdSMichal Simek interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 9077393fd86SMichal Simek reg = <0x0 0xff000000 0x0 0x1000>; 9088fd7a775SMichal Simek clock-names = "uart_clk", "pclk"; 909959b86aeSRajan Vaja power-domains = <&zynqmp_firmware PD_UART_0>; 9108fd7a775SMichal Simek }; 9118fd7a775SMichal Simek 9128fd7a775SMichal Simek uart1: serial@ff010000 { 9135be4fbbfSMichal Simek bootph-all; 914812fa2f0SMichal Simek compatible = "xlnx,zynqmp-uart", "cdns,uart-r1p12"; 9158fd7a775SMichal Simek status = "disabled"; 9168fd7a775SMichal Simek interrupt-parent = <&gic>; 917cf0e27cdSMichal Simek interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; 9187393fd86SMichal Simek reg = <0x0 0xff010000 0x0 0x1000>; 9198fd7a775SMichal Simek clock-names = "uart_clk", "pclk"; 920959b86aeSRajan Vaja power-domains = <&zynqmp_firmware PD_UART_1>; 9218fd7a775SMichal Simek }; 9228fd7a775SMichal Simek 923b61c4ff9SMichal Simek usb0: usb@ff9d0000 { 924b61c4ff9SMichal Simek #address-cells = <2>; 925b61c4ff9SMichal Simek #size-cells = <2>; 92622eda14aSMichal Simek status = "disabled"; 927b61c4ff9SMichal Simek compatible = "xlnx,zynqmp-dwc3"; 928b61c4ff9SMichal Simek reg = <0x0 0xff9d0000 0x0 0x100>; 929959b86aeSRajan Vaja power-domains = <&zynqmp_firmware PD_USB_0>; 930b61c4ff9SMichal Simek resets = <&zynqmp_reset ZYNQMP_RESET_USB0_CORERESET>, 931b61c4ff9SMichal Simek <&zynqmp_reset ZYNQMP_RESET_USB0_HIBERRESET>, 932b61c4ff9SMichal Simek <&zynqmp_reset ZYNQMP_RESET_USB0_APB>; 933b61c4ff9SMichal Simek reset-names = "usb_crst", "usb_hibrst", "usb_apbrst"; 93453ba1b2bSPiyush Mehta reset-gpios = <&modepin_gpio 1 GPIO_ACTIVE_LOW>; 935b61c4ff9SMichal Simek ranges; 936b61c4ff9SMichal Simek 937b61c4ff9SMichal Simek dwc3_0: usb@fe200000 { 938b61c4ff9SMichal Simek compatible = "snps,dwc3"; 939b61c4ff9SMichal Simek reg = <0x0 0xfe200000 0x0 0x40000>; 940b61c4ff9SMichal Simek interrupt-parent = <&gic>; 94104d54a0eSMichal Simek interrupt-names = "host", "peripheral", "otg"; 942cf0e27cdSMichal Simek interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, 943cf0e27cdSMichal Simek <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, 944cf0e27cdSMichal Simek <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 945d8b1c3d0SSean Anderson clock-names = "bus_early", "ref"; 946b61c4ff9SMichal Simek iommus = <&smmu 0x860>; 947b61c4ff9SMichal Simek snps,quirk-frame-length-adjustment = <0x20>; 94832405e53SMichael Grzeschik snps,resume-hs-terminations; 949b61c4ff9SMichal Simek /* dma-coherent; */ 950b61c4ff9SMichal Simek }; 95122eda14aSMichal Simek }; 95222eda14aSMichal Simek 953b61c4ff9SMichal Simek usb1: usb@ff9e0000 { 954b61c4ff9SMichal Simek #address-cells = <2>; 955b61c4ff9SMichal Simek #size-cells = <2>; 95622eda14aSMichal Simek status = "disabled"; 957b61c4ff9SMichal Simek compatible = "xlnx,zynqmp-dwc3"; 958b61c4ff9SMichal Simek reg = <0x0 0xff9e0000 0x0 0x100>; 959959b86aeSRajan Vaja power-domains = <&zynqmp_firmware PD_USB_1>; 960b61c4ff9SMichal Simek resets = <&zynqmp_reset ZYNQMP_RESET_USB1_CORERESET>, 961b61c4ff9SMichal Simek <&zynqmp_reset ZYNQMP_RESET_USB1_HIBERRESET>, 962b61c4ff9SMichal Simek <&zynqmp_reset ZYNQMP_RESET_USB1_APB>; 963b61c4ff9SMichal Simek reset-names = "usb_crst", "usb_hibrst", "usb_apbrst"; 964b61c4ff9SMichal Simek ranges; 965b61c4ff9SMichal Simek 966b61c4ff9SMichal Simek dwc3_1: usb@fe300000 { 967b61c4ff9SMichal Simek compatible = "snps,dwc3"; 968b61c4ff9SMichal Simek reg = <0x0 0xfe300000 0x0 0x40000>; 969b61c4ff9SMichal Simek interrupt-parent = <&gic>; 97004d54a0eSMichal Simek interrupt-names = "host", "peripheral", "otg"; 971cf0e27cdSMichal Simek interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>, 972cf0e27cdSMichal Simek <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>, 973cf0e27cdSMichal Simek <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; 974d8b1c3d0SSean Anderson clock-names = "bus_early", "ref"; 975b61c4ff9SMichal Simek iommus = <&smmu 0x861>; 976b61c4ff9SMichal Simek snps,quirk-frame-length-adjustment = <0x20>; 97732405e53SMichael Grzeschik snps,resume-hs-terminations; 978b61c4ff9SMichal Simek /* dma-coherent; */ 979b61c4ff9SMichal Simek }; 98022eda14aSMichal Simek }; 98122eda14aSMichal Simek 9825d1b79d2SMichal Simek watchdog0: watchdog@fd4d0000 { 9835d1b79d2SMichal Simek compatible = "cdns,wdt-r1p2"; 9845d1b79d2SMichal Simek status = "disabled"; 9855d1b79d2SMichal Simek interrupt-parent = <&gic>; 986cf0e27cdSMichal Simek interrupts = <GIC_SPI 113 IRQ_TYPE_EDGE_RISING>; 9877393fd86SMichal Simek reg = <0x0 0xfd4d0000 0x0 0x1000>; 98869aa2de1SMounika Grace Akula timeout-sec = <60>; 98969aa2de1SMounika Grace Akula reset-on-timeout; 9905d1b79d2SMichal Simek }; 9911f9fcf65SMichal Simek 9921f9fcf65SMichal Simek lpd_watchdog: watchdog@ff150000 { 9931f9fcf65SMichal Simek compatible = "cdns,wdt-r1p2"; 9941f9fcf65SMichal Simek status = "disabled"; 9951f9fcf65SMichal Simek interrupt-parent = <&gic>; 996cf0e27cdSMichal Simek interrupts = <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>; 9971f9fcf65SMichal Simek reg = <0x0 0xff150000 0x0 0x1000>; 9981f9fcf65SMichal Simek timeout-sec = <10>; 9991f9fcf65SMichal Simek }; 10007b6714b3SLaurent Pinchart 1001271c1fa0SRobert Hancock xilinx_ams: ams@ffa50000 { 1002271c1fa0SRobert Hancock compatible = "xlnx,zynqmp-ams"; 1003271c1fa0SRobert Hancock status = "disabled"; 1004271c1fa0SRobert Hancock interrupt-parent = <&gic>; 1005cf0e27cdSMichal Simek interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; 1006271c1fa0SRobert Hancock reg = <0x0 0xffa50000 0x0 0x800>; 1007271c1fa0SRobert Hancock #address-cells = <1>; 1008271c1fa0SRobert Hancock #size-cells = <1>; 1009271c1fa0SRobert Hancock #io-channel-cells = <1>; 1010271c1fa0SRobert Hancock ranges = <0 0 0xffa50800 0x800>; 1011271c1fa0SRobert Hancock 10129a18fb59SMichal Simek ams_ps: ams-ps@0 { 1013271c1fa0SRobert Hancock compatible = "xlnx,zynqmp-ams-ps"; 1014271c1fa0SRobert Hancock status = "disabled"; 1015271c1fa0SRobert Hancock reg = <0x0 0x400>; 1016271c1fa0SRobert Hancock }; 1017271c1fa0SRobert Hancock 10189a18fb59SMichal Simek ams_pl: ams-pl@400 { 1019271c1fa0SRobert Hancock compatible = "xlnx,zynqmp-ams-pl"; 1020271c1fa0SRobert Hancock status = "disabled"; 1021271c1fa0SRobert Hancock reg = <0x400 0x400>; 1022271c1fa0SRobert Hancock #address-cells = <1>; 1023271c1fa0SRobert Hancock #size-cells = <0>; 1024271c1fa0SRobert Hancock }; 1025271c1fa0SRobert Hancock }; 1026271c1fa0SRobert Hancock 10277b6714b3SLaurent Pinchart zynqmp_dpdma: dma-controller@fd4c0000 { 10287b6714b3SLaurent Pinchart compatible = "xlnx,zynqmp-dpdma"; 10297b6714b3SLaurent Pinchart status = "disabled"; 10307b6714b3SLaurent Pinchart reg = <0x0 0xfd4c0000 0x0 0x1000>; 1031cf0e27cdSMichal Simek interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; 10327b6714b3SLaurent Pinchart interrupt-parent = <&gic>; 10337b6714b3SLaurent Pinchart clock-names = "axi_clk"; 1034b06112cdSLaurent Pinchart power-domains = <&zynqmp_firmware PD_DP>; 10357b6714b3SLaurent Pinchart #dma-cells = <1>; 10367b6714b3SLaurent Pinchart }; 1037b0f89cf5SMichal Simek 1038b0f89cf5SMichal Simek zynqmp_dpsub: display@fd4a0000 { 10395be4fbbfSMichal Simek bootph-all; 1040b0f89cf5SMichal Simek compatible = "xlnx,zynqmp-dpsub-1.7"; 1041b0f89cf5SMichal Simek status = "disabled"; 1042b0f89cf5SMichal Simek reg = <0x0 0xfd4a0000 0x0 0x1000>, 1043b0f89cf5SMichal Simek <0x0 0xfd4aa000 0x0 0x1000>, 1044b0f89cf5SMichal Simek <0x0 0xfd4ab000 0x0 0x1000>, 1045b0f89cf5SMichal Simek <0x0 0xfd4ac000 0x0 0x1000>; 1046b0f89cf5SMichal Simek reg-names = "dp", "blend", "av_buf", "aud"; 1047cf0e27cdSMichal Simek interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; 1048b0f89cf5SMichal Simek interrupt-parent = <&gic>; 1049b0f89cf5SMichal Simek clock-names = "dp_apb_clk", "dp_aud_clk", 1050b0f89cf5SMichal Simek "dp_vtc_pixel_clk_in"; 1051b0f89cf5SMichal Simek power-domains = <&zynqmp_firmware PD_DP>; 1052b0f89cf5SMichal Simek resets = <&zynqmp_reset ZYNQMP_RESET_DP>; 1053b0f89cf5SMichal Simek dma-names = "vid0", "vid1", "vid2", "gfx0"; 1054b0f89cf5SMichal Simek dmas = <&zynqmp_dpdma ZYNQMP_DPDMA_VIDEO0>, 1055b0f89cf5SMichal Simek <&zynqmp_dpdma ZYNQMP_DPDMA_VIDEO1>, 1056b0f89cf5SMichal Simek <&zynqmp_dpdma ZYNQMP_DPDMA_VIDEO2>, 1057b0f89cf5SMichal Simek <&zynqmp_dpdma ZYNQMP_DPDMA_GRAPHICS>; 10581f367ee9SLaurent Pinchart 10591f367ee9SLaurent Pinchart ports { 10601f367ee9SLaurent Pinchart #address-cells = <1>; 10611f367ee9SLaurent Pinchart #size-cells = <0>; 10621f367ee9SLaurent Pinchart 10631f367ee9SLaurent Pinchart port@0 { 10641f367ee9SLaurent Pinchart reg = <0>; 10651f367ee9SLaurent Pinchart }; 10661f367ee9SLaurent Pinchart port@1 { 10671f367ee9SLaurent Pinchart reg = <1>; 10681f367ee9SLaurent Pinchart }; 10691f367ee9SLaurent Pinchart port@2 { 10701f367ee9SLaurent Pinchart reg = <2>; 10711f367ee9SLaurent Pinchart }; 10721f367ee9SLaurent Pinchart port@3 { 10731f367ee9SLaurent Pinchart reg = <3>; 10741f367ee9SLaurent Pinchart }; 10751f367ee9SLaurent Pinchart port@4 { 10761f367ee9SLaurent Pinchart reg = <4>; 10771f367ee9SLaurent Pinchart }; 10781f367ee9SLaurent Pinchart port@5 { 10791f367ee9SLaurent Pinchart reg = <5>; 10801f367ee9SLaurent Pinchart }; 10811f367ee9SLaurent Pinchart }; 1082b0f89cf5SMichal Simek }; 10835d1b79d2SMichal Simek }; 10845d1b79d2SMichal Simek}; 1085