1d665c743SMichal Simek// SPDX-License-Identifier: GPL-2.0+ 2d665c743SMichal Simek/* 3d665c743SMichal Simek * dts file for Xilinx ZynqMP ZC1232 4d665c743SMichal Simek * 556e54601SMichal Simek * (C) Copyright 2017 - 2021, Xilinx, Inc. 6d665c743SMichal Simek * 74e4ddd3dSMichal Simek * Michal Simek <michal.simek@amd.com> 8d665c743SMichal Simek */ 9d665c743SMichal Simek 10d665c743SMichal Simek/dts-v1/; 11d665c743SMichal Simek 12d665c743SMichal Simek#include "zynqmp.dtsi" 139c8a47b4SRajan Vaja#include "zynqmp-clk-ccf.dtsi" 14d665c743SMichal Simek 15d665c743SMichal Simek/ { 16d665c743SMichal Simek model = "ZynqMP ZC1232 RevA"; 17d665c743SMichal Simek compatible = "xlnx,zynqmp-zc1232-revA", "xlnx,zynqmp-zc1232", "xlnx,zynqmp"; 18d665c743SMichal Simek 19d665c743SMichal Simek aliases { 20d665c743SMichal Simek serial0 = &uart0; 21d665c743SMichal Simek serial1 = &dcc; 2256e54601SMichal Simek spi0 = &qspi; 23d665c743SMichal Simek }; 24d665c743SMichal Simek 25d665c743SMichal Simek chosen { 26d665c743SMichal Simek bootargs = "earlycon"; 27d665c743SMichal Simek stdout-path = "serial0:115200n8"; 28d665c743SMichal Simek }; 29d665c743SMichal Simek 30d665c743SMichal Simek memory@0 { 31d665c743SMichal Simek device_type = "memory"; 32d665c743SMichal Simek reg = <0x0 0x0 0x0 0x80000000>; 33d665c743SMichal Simek }; 34d665c743SMichal Simek}; 35d665c743SMichal Simek 36d665c743SMichal Simek&dcc { 37d665c743SMichal Simek status = "okay"; 38d665c743SMichal Simek}; 39d665c743SMichal Simek 4056e54601SMichal Simek&qspi { 4156e54601SMichal Simek status = "okay"; 4256e54601SMichal Simek flash@0 { 4356e54601SMichal Simek compatible = "m25p80", "jedec,spi-nor"; /* 32MB */ 4456e54601SMichal Simek #address-cells = <1>; 4556e54601SMichal Simek #size-cells = <1>; 4656e54601SMichal Simek reg = <0x0>; 47*1d831cadSAmit Kumar Mahapatra spi-tx-bus-width = <4>; 4856e54601SMichal Simek spi-rx-bus-width = <4>; 4956e54601SMichal Simek spi-max-frequency = <108000000>; /* Based on DC1 spec */ 5056e54601SMichal Simek }; 5156e54601SMichal Simek}; 5256e54601SMichal Simek 53d665c743SMichal Simek&sata { 54d665c743SMichal Simek status = "okay"; 55d665c743SMichal Simek /* SATA OOB timing settings */ 56d665c743SMichal Simek ceva,p0-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>; 57d665c743SMichal Simek ceva,p0-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>; 58d665c743SMichal Simek ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>; 59d665c743SMichal Simek ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>; 60d665c743SMichal Simek ceva,p1-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>; 61d665c743SMichal Simek ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>; 62d665c743SMichal Simek ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>; 63d665c743SMichal Simek ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>; 64d665c743SMichal Simek}; 65d665c743SMichal Simek 66d665c743SMichal Simek&uart0 { 67d665c743SMichal Simek status = "okay"; 68d665c743SMichal Simek}; 69