1*0114330eSMichael Walle// SPDX-License-Identifier: GPL-2.0-only OR MIT 2*0114330eSMichael Walle/* 3*0114330eSMichael Walle * Kontron SMARC-sa67 board on the Kontron Eval Carrier 2.2. 4*0114330eSMichael Walle * 5*0114330eSMichael Walle * Copyright (c) 2025 Kontron Europe GmbH 6*0114330eSMichael Walle */ 7*0114330eSMichael Walle 8*0114330eSMichael Walle/dts-v1/; 9*0114330eSMichael Walle/plugin/; 10*0114330eSMichael Walle 11*0114330eSMichael Walle#include <dt-bindings/interrupt-controller/irq.h> 12*0114330eSMichael Walle#include "k3-pinctrl.h" 13*0114330eSMichael Walle 14*0114330eSMichael Walle&{/} { 15*0114330eSMichael Walle pwm-fan { 16*0114330eSMichael Walle compatible = "pwm-fan"; 17*0114330eSMichael Walle pinctrl-names = "default"; 18*0114330eSMichael Walle pinctrl-0 = <&pwm_fan_pins_default>; 19*0114330eSMichael Walle interrupts-extended = <&main_gpio1 7 IRQ_TYPE_EDGE_FALLING>; 20*0114330eSMichael Walle #cooling-cells = <2>; 21*0114330eSMichael Walle pwms = <&epwm2 1 4000000 0>; 22*0114330eSMichael Walle cooling-levels = <1 128 192 255>; 23*0114330eSMichael Walle }; 24*0114330eSMichael Walle 25*0114330eSMichael Walle sound { 26*0114330eSMichael Walle compatible = "simple-audio-card"; 27*0114330eSMichael Walle simple-audio-card,widgets = 28*0114330eSMichael Walle "Headphone", "Headphone Jack", 29*0114330eSMichael Walle "Line", "Line Out Jack", 30*0114330eSMichael Walle "Microphone", "Microphone Jack", 31*0114330eSMichael Walle "Line", "Line In Jack"; 32*0114330eSMichael Walle simple-audio-card,routing = 33*0114330eSMichael Walle "Line Out Jack", "LINEOUTR", 34*0114330eSMichael Walle "Line Out Jack", "LINEOUTL", 35*0114330eSMichael Walle "Headphone Jack", "HPOUTR", 36*0114330eSMichael Walle "Headphone Jack", "HPOUTL", 37*0114330eSMichael Walle "IN1L", "Line In Jack", 38*0114330eSMichael Walle "IN1R", "Line In Jack", 39*0114330eSMichael Walle "Microphone Jack", "MICBIAS", 40*0114330eSMichael Walle "IN2L", "Microphone Jack", 41*0114330eSMichael Walle "IN2R", "Microphone Jack"; 42*0114330eSMichael Walle simple-audio-card,mclk-fs = <256>; 43*0114330eSMichael Walle simple-audio-card,format = "i2s"; 44*0114330eSMichael Walle simple-audio-card,bitclock-master = <&dailink0_master>; 45*0114330eSMichael Walle simple-audio-card,frame-master = <&dailink0_master>; 46*0114330eSMichael Walle 47*0114330eSMichael Walle simple-audio-card,cpu { 48*0114330eSMichael Walle sound-dai = <&mcasp0>; 49*0114330eSMichael Walle }; 50*0114330eSMichael Walle 51*0114330eSMichael Walle dailink0_master: simple-audio-card,codec { 52*0114330eSMichael Walle sound-dai = <&wm8904>; 53*0114330eSMichael Walle clocks = <&audio_refclk0>; 54*0114330eSMichael Walle }; 55*0114330eSMichael Walle }; 56*0114330eSMichael Walle 57*0114330eSMichael Walle cvcc_1p8v_i2s: regulator-carrier-0 { 58*0114330eSMichael Walle compatible = "regulator-fixed"; 59*0114330eSMichael Walle regulator-name = "V_1V8_S0_I2S"; 60*0114330eSMichael Walle regulator-min-microvolt = <1800000>; 61*0114330eSMichael Walle regulator-max-microvolt = <1800000>; 62*0114330eSMichael Walle }; 63*0114330eSMichael Walle 64*0114330eSMichael Walle cvcc_1p8v_s0: regulator-carrier-1 { 65*0114330eSMichael Walle compatible = "regulator-fixed"; 66*0114330eSMichael Walle regulator-name = "V_1V8_S0"; 67*0114330eSMichael Walle regulator-min-microvolt = <1800000>; 68*0114330eSMichael Walle regulator-max-microvolt = <1800000>; 69*0114330eSMichael Walle }; 70*0114330eSMichael Walle 71*0114330eSMichael Walle cvcc_3p3v_s0: regulator-carrier-2 { 72*0114330eSMichael Walle compatible = "regulator-fixed"; 73*0114330eSMichael Walle regulator-name = "V_3V3_S0"; 74*0114330eSMichael Walle regulator-min-microvolt = <3300000>; 75*0114330eSMichael Walle regulator-max-microvolt = <3300000>; 76*0114330eSMichael Walle }; 77*0114330eSMichael Walle}; 78*0114330eSMichael Walle 79*0114330eSMichael Walle&audio_refclk0 { 80*0114330eSMichael Walle status = "okay"; 81*0114330eSMichael Walle}; 82*0114330eSMichael Walle 83*0114330eSMichael Walle&epwm2 { 84*0114330eSMichael Walle status = "okay"; 85*0114330eSMichael Walle}; 86*0114330eSMichael Walle 87*0114330eSMichael Walle&main_pmx0 { 88*0114330eSMichael Walle pwm_fan_pins_default: pwm-fan-default-pins { 89*0114330eSMichael Walle pinctrl-single,pins = < 90*0114330eSMichael Walle J722S_IOPAD(0x1ec, PIN_OUTPUT, 8) /* (A22) I2C1_SDA.EHRPWM2_B */ 91*0114330eSMichael Walle J722S_IOPAD(0x194, PIN_INPUT, 0) /* (A25) MCASP0_AXR3.GPIO1_7 */ 92*0114330eSMichael Walle >; 93*0114330eSMichael Walle }; 94*0114330eSMichael Walle}; 95*0114330eSMichael Walle 96*0114330eSMichael Walle&mcasp0 { 97*0114330eSMichael Walle #sound-dai-cells = <0>; 98*0114330eSMichael Walle status = "okay"; 99*0114330eSMichael Walle}; 100*0114330eSMichael Walle 101*0114330eSMichael Walle&mcu_i2c0 { 102*0114330eSMichael Walle status = "okay"; 103*0114330eSMichael Walle #address-cells = <1>; 104*0114330eSMichael Walle #size-cells = <0>; 105*0114330eSMichael Walle 106*0114330eSMichael Walle wm8904: audio-codec@1a { 107*0114330eSMichael Walle #sound-dai-cells = <0>; 108*0114330eSMichael Walle compatible = "wlf,wm8904"; 109*0114330eSMichael Walle reg = <0x1a>; 110*0114330eSMichael Walle clocks = <&audio_refclk0>; 111*0114330eSMichael Walle clock-names = "mclk"; 112*0114330eSMichael Walle AVDD-supply = <&cvcc_1p8v_i2s>; 113*0114330eSMichael Walle CPVDD-supply = <&cvcc_1p8v_i2s>; 114*0114330eSMichael Walle DBVDD-supply = <&cvcc_1p8v_i2s>; 115*0114330eSMichael Walle DCVDD-supply = <&cvcc_1p8v_i2s>; 116*0114330eSMichael Walle MICVDD-supply = <&cvcc_1p8v_i2s>; 117*0114330eSMichael Walle }; 118*0114330eSMichael Walle}; 119*0114330eSMichael Walle 120*0114330eSMichael Walle&mcu_spi0 { 121*0114330eSMichael Walle status = "okay"; 122*0114330eSMichael Walle #address-cells = <1>; 123*0114330eSMichael Walle #size-cells = <0>; 124*0114330eSMichael Walle 125*0114330eSMichael Walle flash@0 { 126*0114330eSMichael Walle compatible = "jedec,spi-nor"; 127*0114330eSMichael Walle reg = <0>; 128*0114330eSMichael Walle spi-max-frequency = <104000000>; 129*0114330eSMichael Walle m25p,fast-read; 130*0114330eSMichael Walle vcc-supply = <&cvcc_1p8v_s0>; 131*0114330eSMichael Walle }; 132*0114330eSMichael Walle}; 133*0114330eSMichael Walle 134*0114330eSMichael Walle&wkup_i2c0 { 135*0114330eSMichael Walle status = "okay"; 136*0114330eSMichael Walle #address-cells = <1>; 137*0114330eSMichael Walle #size-cells = <0>; 138*0114330eSMichael Walle 139*0114330eSMichael Walle /* SMARC Carrier EEPROM */ 140*0114330eSMichael Walle eeprom@57 { 141*0114330eSMichael Walle compatible = "atmel,24c32"; 142*0114330eSMichael Walle reg = <0x57>; 143*0114330eSMichael Walle pagesize = <32>; 144*0114330eSMichael Walle vcc-supply = <&cvcc_3p3v_s0>; 145*0114330eSMichael Walle }; 146*0114330eSMichael Walle}; 147