1*e402a3f1SStefano Radaelli// SPDX-License-Identifier: GPL-2.0 2*e402a3f1SStefano Radaelli/* 3*e402a3f1SStefano Radaelli * Variscite Symphony carrier board for VAR-SOM-AM62P 4*e402a3f1SStefano Radaelli * 5*e402a3f1SStefano Radaelli * Link: https://www.variscite.it/product/single-board-computers/symphony-board/ 6*e402a3f1SStefano Radaelli * 7*e402a3f1SStefano Radaelli * Copyright (C) 2025 Variscite Ltd. - https://www.variscite.com/ 8*e402a3f1SStefano Radaelli * 9*e402a3f1SStefano Radaelli */ 10*e402a3f1SStefano Radaelli 11*e402a3f1SStefano Radaelli/dts-v1/; 12*e402a3f1SStefano Radaelli 13*e402a3f1SStefano Radaelli#include "k3-am62p5-var-som.dtsi" 14*e402a3f1SStefano Radaelli 15*e402a3f1SStefano Radaelli/ { 16*e402a3f1SStefano Radaelli model = "Variscite VAR-SOM-AM62P on Symphony-Board"; 17*e402a3f1SStefano Radaelli compatible = "variscite,var-som-am62p-symphony", "variscite,var-som-am62p", "ti,am62p5"; 18*e402a3f1SStefano Radaelli 19*e402a3f1SStefano Radaelli aliases { 20*e402a3f1SStefano Radaelli ethernet0 = &cpsw_port1; 21*e402a3f1SStefano Radaelli ethernet1 = &cpsw_port2; 22*e402a3f1SStefano Radaelli mmc0 = &sdhci0; 23*e402a3f1SStefano Radaelli mmc1 = &sdhci1; 24*e402a3f1SStefano Radaelli mmc2 = &sdhci2; 25*e402a3f1SStefano Radaelli serial0 = &main_uart0; 26*e402a3f1SStefano Radaelli serial2 = &main_uart2; 27*e402a3f1SStefano Radaelli serial5 = &main_uart5; 28*e402a3f1SStefano Radaelli serial6 = &main_uart6; 29*e402a3f1SStefano Radaelli spi5 = &main_spi2; 30*e402a3f1SStefano Radaelli usb0 = &usb0; 31*e402a3f1SStefano Radaelli usb1 = &usb1; 32*e402a3f1SStefano Radaelli }; 33*e402a3f1SStefano Radaelli 34*e402a3f1SStefano Radaelli chosen { 35*e402a3f1SStefano Radaelli stdout-path = "serial0:115200n8"; 36*e402a3f1SStefano Radaelli }; 37*e402a3f1SStefano Radaelli 38*e402a3f1SStefano Radaelli clk_ov5640_fixed: clock-24000000 { 39*e402a3f1SStefano Radaelli #clock-cells = <0>; 40*e402a3f1SStefano Radaelli compatible = "fixed-clock"; 41*e402a3f1SStefano Radaelli clock-frequency = <24000000>; 42*e402a3f1SStefano Radaelli }; 43*e402a3f1SStefano Radaelli 44*e402a3f1SStefano Radaelli gpio-keys { 45*e402a3f1SStefano Radaelli compatible = "gpio-keys"; 46*e402a3f1SStefano Radaelli 47*e402a3f1SStefano Radaelli button-back { 48*e402a3f1SStefano Radaelli label = "Back"; 49*e402a3f1SStefano Radaelli linux,code = <KEY_BACK>; 50*e402a3f1SStefano Radaelli gpios = <&pca9534 1 GPIO_ACTIVE_LOW>; 51*e402a3f1SStefano Radaelli }; 52*e402a3f1SStefano Radaelli 53*e402a3f1SStefano Radaelli button-home { 54*e402a3f1SStefano Radaelli label = "Home"; 55*e402a3f1SStefano Radaelli linux,code = <KEY_HOME>; 56*e402a3f1SStefano Radaelli gpios = <&pca9534 2 GPIO_ACTIVE_LOW>; 57*e402a3f1SStefano Radaelli }; 58*e402a3f1SStefano Radaelli 59*e402a3f1SStefano Radaelli button-menu { 60*e402a3f1SStefano Radaelli label = "Menu"; 61*e402a3f1SStefano Radaelli linux,code = <KEY_MENU>; 62*e402a3f1SStefano Radaelli gpios = <&pca9534 3 GPIO_ACTIVE_LOW>; 63*e402a3f1SStefano Radaelli }; 64*e402a3f1SStefano Radaelli }; 65*e402a3f1SStefano Radaelli 66*e402a3f1SStefano Radaelli gpio-leds { 67*e402a3f1SStefano Radaelli compatible = "gpio-leds"; 68*e402a3f1SStefano Radaelli 69*e402a3f1SStefano Radaelli led-heartbeat { 70*e402a3f1SStefano Radaelli label = "Heartbeat"; 71*e402a3f1SStefano Radaelli linux,default-trigger = "heartbeat"; 72*e402a3f1SStefano Radaelli gpios = <&pca9534 0 GPIO_ACTIVE_LOW>; 73*e402a3f1SStefano Radaelli }; 74*e402a3f1SStefano Radaelli }; 75*e402a3f1SStefano Radaelli 76*e402a3f1SStefano Radaelli reg_2p8v: regulator-2p8v { 77*e402a3f1SStefano Radaelli compatible = "regulator-fixed"; 78*e402a3f1SStefano Radaelli regulator-name = "2P8V"; 79*e402a3f1SStefano Radaelli regulator-min-microvolt = <2800000>; 80*e402a3f1SStefano Radaelli regulator-max-microvolt = <2800000>; 81*e402a3f1SStefano Radaelli vin-supply = <®_3v3>; 82*e402a3f1SStefano Radaelli regulator-always-on; 83*e402a3f1SStefano Radaelli }; 84*e402a3f1SStefano Radaelli 85*e402a3f1SStefano Radaelli reg_1p8v: regulator-1p8v { 86*e402a3f1SStefano Radaelli compatible = "regulator-fixed"; 87*e402a3f1SStefano Radaelli regulator-name = "1P8V"; 88*e402a3f1SStefano Radaelli regulator-min-microvolt = <1800000>; 89*e402a3f1SStefano Radaelli regulator-max-microvolt = <1800000>; 90*e402a3f1SStefano Radaelli vin-supply = <®_3v3>; 91*e402a3f1SStefano Radaelli regulator-always-on; 92*e402a3f1SStefano Radaelli }; 93*e402a3f1SStefano Radaelli 94*e402a3f1SStefano Radaelli reg_1p5v: regulator-1p5v { 95*e402a3f1SStefano Radaelli compatible = "regulator-fixed"; 96*e402a3f1SStefano Radaelli regulator-name = "1P5V"; 97*e402a3f1SStefano Radaelli regulator-min-microvolt = <1500000>; 98*e402a3f1SStefano Radaelli regulator-max-microvolt = <1500000>; 99*e402a3f1SStefano Radaelli vin-supply = <®_3v3>; 100*e402a3f1SStefano Radaelli regulator-always-on; 101*e402a3f1SStefano Radaelli }; 102*e402a3f1SStefano Radaelli 103*e402a3f1SStefano Radaelli reg_sdhc1_vmmc: regulator-sdhc1 { 104*e402a3f1SStefano Radaelli compatible = "regulator-fixed"; 105*e402a3f1SStefano Radaelli regulator-name = "+V3.3_SD"; 106*e402a3f1SStefano Radaelli vin-supply = <®_sdhc1_vmmc_int>; 107*e402a3f1SStefano Radaelli regulator-min-microvolt = <3300000>; 108*e402a3f1SStefano Radaelli regulator-max-microvolt = <3300000>; 109*e402a3f1SStefano Radaelli regulator-boot-on; 110*e402a3f1SStefano Radaelli enable-active-high; 111*e402a3f1SStefano Radaelli gpio = <&main_gpio0 30 GPIO_ACTIVE_HIGH>; 112*e402a3f1SStefano Radaelli bootph-all; 113*e402a3f1SStefano Radaelli }; 114*e402a3f1SStefano Radaelli 115*e402a3f1SStefano Radaelli reg_sdhc1_vmmc_int: regulator-sdhc1-int { 116*e402a3f1SStefano Radaelli compatible = "regulator-fixed"; 117*e402a3f1SStefano Radaelli regulator-name = "+V3.3_SD_INT"; 118*e402a3f1SStefano Radaelli pinctrl-names = "default"; 119*e402a3f1SStefano Radaelli pinctrl-0 = <&pinctrl_sd1_vmmc>; 120*e402a3f1SStefano Radaelli regulator-min-microvolt = <3300000>; 121*e402a3f1SStefano Radaelli regulator-max-microvolt = <3300000>; 122*e402a3f1SStefano Radaelli regulator-boot-on; 123*e402a3f1SStefano Radaelli enable-active-high; 124*e402a3f1SStefano Radaelli gpio = <&main_gpio0 53 GPIO_ACTIVE_HIGH>; 125*e402a3f1SStefano Radaelli bootph-all; 126*e402a3f1SStefano Radaelli }; 127*e402a3f1SStefano Radaelli 128*e402a3f1SStefano Radaelli reg_sdhc1_vqmmc: regulator-sdhci1-vqmmc { 129*e402a3f1SStefano Radaelli compatible = "regulator-gpio"; 130*e402a3f1SStefano Radaelli regulator-name = "+V3.3_SD_VQMMC"; 131*e402a3f1SStefano Radaelli pinctrl-names = "default"; 132*e402a3f1SStefano Radaelli pinctrl-0 = <&pinctrl_sd1_vqmmc>; 133*e402a3f1SStefano Radaelli regulator-min-microvolt = <1800000>; 134*e402a3f1SStefano Radaelli regulator-max-microvolt = <3300000>; 135*e402a3f1SStefano Radaelli regulator-boot-on; 136*e402a3f1SStefano Radaelli gpios = <&main_gpio0 56 GPIO_ACTIVE_HIGH>; 137*e402a3f1SStefano Radaelli states = <1800000 0x0>, 138*e402a3f1SStefano Radaelli <3300000 0x1>; 139*e402a3f1SStefano Radaelli bootph-all; 140*e402a3f1SStefano Radaelli }; 141*e402a3f1SStefano Radaelli 142*e402a3f1SStefano Radaelli reg_ov5640_buf_en: regulator-camera-buf-en { 143*e402a3f1SStefano Radaelli compatible = "regulator-fixed"; 144*e402a3f1SStefano Radaelli regulator-name = "ov5640_buf_en"; 145*e402a3f1SStefano Radaelli gpios = <&main_gpio0 21 GPIO_ACTIVE_HIGH>; 146*e402a3f1SStefano Radaelli regulator-always-on; 147*e402a3f1SStefano Radaelli regulator-boot-on; 148*e402a3f1SStefano Radaelli }; 149*e402a3f1SStefano Radaelli 150*e402a3f1SStefano Radaelli transceiver1: can-phy { 151*e402a3f1SStefano Radaelli compatible = "ti,tcan1042"; 152*e402a3f1SStefano Radaelli #phy-cells = <0>; 153*e402a3f1SStefano Radaelli max-bitrate = <5000000>; 154*e402a3f1SStefano Radaelli }; 155*e402a3f1SStefano Radaelli 156*e402a3f1SStefano Radaelli connector { 157*e402a3f1SStefano Radaelli compatible = "gpio-usb-b-connector", "usb-b-connector"; 158*e402a3f1SStefano Radaelli pinctrl-names = "default"; 159*e402a3f1SStefano Radaelli pinctrl-0 = <&pinctrl_extcon>; 160*e402a3f1SStefano Radaelli label = "USB-C"; 161*e402a3f1SStefano Radaelli id-gpios = <&main_gpio1 12 GPIO_ACTIVE_HIGH>; 162*e402a3f1SStefano Radaelli status = "okay"; 163*e402a3f1SStefano Radaelli 164*e402a3f1SStefano Radaelli port { 165*e402a3f1SStefano Radaelli usb_con_hs: endpoint { 166*e402a3f1SStefano Radaelli remote-endpoint = <&typec_hs>; 167*e402a3f1SStefano Radaelli }; 168*e402a3f1SStefano Radaelli }; 169*e402a3f1SStefano Radaelli }; 170*e402a3f1SStefano Radaelli}; 171*e402a3f1SStefano Radaelli 172*e402a3f1SStefano Radaelli&cdns_csi2rx0 { 173*e402a3f1SStefano Radaelli ports { 174*e402a3f1SStefano Radaelli #address-cells = <1>; 175*e402a3f1SStefano Radaelli #size-cells = <0>; 176*e402a3f1SStefano Radaelli 177*e402a3f1SStefano Radaelli csi0_port0: port@0 { 178*e402a3f1SStefano Radaelli reg = <0>; 179*e402a3f1SStefano Radaelli status = "okay"; 180*e402a3f1SStefano Radaelli 181*e402a3f1SStefano Radaelli csi2rx0_in_sensor: endpoint { 182*e402a3f1SStefano Radaelli remote-endpoint = <&csi2_cam0>; 183*e402a3f1SStefano Radaelli bus-type = <4>; /* CSI2 DPHY. */ 184*e402a3f1SStefano Radaelli clock-lanes = <0>; 185*e402a3f1SStefano Radaelli data-lanes = <1 2>; 186*e402a3f1SStefano Radaelli }; 187*e402a3f1SStefano Radaelli }; 188*e402a3f1SStefano Radaelli }; 189*e402a3f1SStefano Radaelli}; 190*e402a3f1SStefano Radaelli 191*e402a3f1SStefano Radaelli&cpsw3g { 192*e402a3f1SStefano Radaelli pinctrl-names = "default"; 193*e402a3f1SStefano Radaelli pinctrl-0 = <&pinctrl_rgmii1>, 194*e402a3f1SStefano Radaelli <&pinctrl_rgmii2>; 195*e402a3f1SStefano Radaelli status = "okay"; 196*e402a3f1SStefano Radaelli}; 197*e402a3f1SStefano Radaelli 198*e402a3f1SStefano Radaelli&cpsw3g_mdio { 199*e402a3f1SStefano Radaelli pinctrl-names = "default"; 200*e402a3f1SStefano Radaelli pinctrl-0 = <&pinctrl_mdio1>; 201*e402a3f1SStefano Radaelli status = "okay"; 202*e402a3f1SStefano Radaelli 203*e402a3f1SStefano Radaelli cpsw3g_phy1: ethernet-phy@5 { 204*e402a3f1SStefano Radaelli compatible = "ethernet-phy-id0283.bc30"; 205*e402a3f1SStefano Radaelli reg = <5>; 206*e402a3f1SStefano Radaelli reset-gpios = <&pca9534 5 GPIO_ACTIVE_LOW>; 207*e402a3f1SStefano Radaelli reset-assert-us = <10000>; 208*e402a3f1SStefano Radaelli reset-deassert-us = <100000>; 209*e402a3f1SStefano Radaelli }; 210*e402a3f1SStefano Radaelli}; 211*e402a3f1SStefano Radaelli 212*e402a3f1SStefano Radaelli&cpsw_port2 { 213*e402a3f1SStefano Radaelli /* 214*e402a3f1SStefano Radaelli * The required RGMII TX and RX 2ns delays are implemented directly 215*e402a3f1SStefano Radaelli * in hardware via passive delay elements on the Symphony PCB. 216*e402a3f1SStefano Radaelli * No delay configuration is needed in software via PHY driver. 217*e402a3f1SStefano Radaelli */ 218*e402a3f1SStefano Radaelli phy-mode = "rgmii"; 219*e402a3f1SStefano Radaelli phy-handle = <&cpsw3g_phy1>; 220*e402a3f1SStefano Radaelli status = "okay"; 221*e402a3f1SStefano Radaelli}; 222*e402a3f1SStefano Radaelli 223*e402a3f1SStefano Radaelli&dphy0 { 224*e402a3f1SStefano Radaelli status = "okay"; 225*e402a3f1SStefano Radaelli}; 226*e402a3f1SStefano Radaelli 227*e402a3f1SStefano Radaelli&main_i2c0{ 228*e402a3f1SStefano Radaelli pinctrl-names = "default"; 229*e402a3f1SStefano Radaelli pinctrl-0 = <&pinctrl_i2c0>; 230*e402a3f1SStefano Radaelli clock-frequency = <400000>; 231*e402a3f1SStefano Radaelli status = "okay"; 232*e402a3f1SStefano Radaelli 233*e402a3f1SStefano Radaelli ov5640: camera@3c { 234*e402a3f1SStefano Radaelli compatible = "ovti,ov5640"; 235*e402a3f1SStefano Radaelli reg = <0x3c>; 236*e402a3f1SStefano Radaelli clocks = <&clk_ov5640_fixed>; 237*e402a3f1SStefano Radaelli clock-names = "xclk"; 238*e402a3f1SStefano Radaelli AVDD-supply = <®_2p8v>; 239*e402a3f1SStefano Radaelli DOVDD-supply = <®_1p8v>; 240*e402a3f1SStefano Radaelli DVDD-supply = <®_1p5v>; 241*e402a3f1SStefano Radaelli powerdown-gpios = <&main_gpio0 10 GPIO_ACTIVE_HIGH>; 242*e402a3f1SStefano Radaelli reset-gpios = <&main_gpio0 22 GPIO_ACTIVE_LOW>; 243*e402a3f1SStefano Radaelli pinctrl-names = "default"; 244*e402a3f1SStefano Radaelli pinctrl-0 = <&pinctrl_ov5640>; 245*e402a3f1SStefano Radaelli 246*e402a3f1SStefano Radaelli port { 247*e402a3f1SStefano Radaelli csi2_cam0: endpoint { 248*e402a3f1SStefano Radaelli remote-endpoint = <&csi2rx0_in_sensor>; 249*e402a3f1SStefano Radaelli clock-lanes = <0>; 250*e402a3f1SStefano Radaelli data-lanes = <1 2>; 251*e402a3f1SStefano Radaelli }; 252*e402a3f1SStefano Radaelli }; 253*e402a3f1SStefano Radaelli }; 254*e402a3f1SStefano Radaelli 255*e402a3f1SStefano Radaelli /* GPIO expander */ 256*e402a3f1SStefano Radaelli pca9534: gpio@20 { 257*e402a3f1SStefano Radaelli compatible = "nxp,pca9534"; 258*e402a3f1SStefano Radaelli reg = <0x20>; 259*e402a3f1SStefano Radaelli gpio-controller; 260*e402a3f1SStefano Radaelli pinctrl-names = "default"; 261*e402a3f1SStefano Radaelli pinctrl-0 = <&pinctrl_pca9534>; 262*e402a3f1SStefano Radaelli interrupt-parent = <&main_gpio1>; 263*e402a3f1SStefano Radaelli interrupts = <30 IRQ_TYPE_EDGE_FALLING>; 264*e402a3f1SStefano Radaelli #gpio-cells = <2>; 265*e402a3f1SStefano Radaelli status = "okay"; 266*e402a3f1SStefano Radaelli 267*e402a3f1SStefano Radaelli usb3-sel-hog { 268*e402a3f1SStefano Radaelli gpio-hog; 269*e402a3f1SStefano Radaelli gpios = <4 0>; 270*e402a3f1SStefano Radaelli output-low; 271*e402a3f1SStefano Radaelli line-name = "usb3_sel"; 272*e402a3f1SStefano Radaelli }; 273*e402a3f1SStefano Radaelli 274*e402a3f1SStefano Radaelli eth-som-vselect-hog { 275*e402a3f1SStefano Radaelli gpio-hog; 276*e402a3f1SStefano Radaelli gpios = <6 0>; 277*e402a3f1SStefano Radaelli output-low; 278*e402a3f1SStefano Radaelli line-name = "eth-vselect"; 279*e402a3f1SStefano Radaelli }; 280*e402a3f1SStefano Radaelli 281*e402a3f1SStefano Radaelli eth-mdio-enable-hog { 282*e402a3f1SStefano Radaelli gpio-hog; 283*e402a3f1SStefano Radaelli gpios = <7 0>; 284*e402a3f1SStefano Radaelli output-high; 285*e402a3f1SStefano Radaelli line-name = "eth-mdio-enable"; 286*e402a3f1SStefano Radaelli }; 287*e402a3f1SStefano Radaelli }; 288*e402a3f1SStefano Radaelli}; 289*e402a3f1SStefano Radaelli 290*e402a3f1SStefano Radaelli&main_i2c1 { 291*e402a3f1SStefano Radaelli pinctrl-names = "default"; 292*e402a3f1SStefano Radaelli pinctrl-0 = <&pinctrl_i2c1>; 293*e402a3f1SStefano Radaelli clock-frequency = <400000>; 294*e402a3f1SStefano Radaelli status = "okay"; 295*e402a3f1SStefano Radaelli 296*e402a3f1SStefano Radaelli rtc@68 { 297*e402a3f1SStefano Radaelli compatible = "dallas,ds1337"; 298*e402a3f1SStefano Radaelli reg = <0x68>; 299*e402a3f1SStefano Radaelli }; 300*e402a3f1SStefano Radaelli}; 301*e402a3f1SStefano Radaelli 302*e402a3f1SStefano Radaelli&main_mcan0 { 303*e402a3f1SStefano Radaelli pinctrl-names = "default"; 304*e402a3f1SStefano Radaelli pinctrl-0 = <&pinctrl_mcan0>; 305*e402a3f1SStefano Radaelli phys = <&transceiver1>; 306*e402a3f1SStefano Radaelli status = "okay"; 307*e402a3f1SStefano Radaelli}; 308*e402a3f1SStefano Radaelli 309*e402a3f1SStefano Radaelli&main_pmx0 { 310*e402a3f1SStefano Radaelli pinctrl_extcon: main-extcon-pins { 311*e402a3f1SStefano Radaelli pinctrl-single,pins = < 312*e402a3f1SStefano Radaelli AM62PX_IOPAD(0x01a8, PIN_INPUT, 7) /* (F25) MCASP0_AFSX.GPIO1_12 */ 313*e402a3f1SStefano Radaelli >; 314*e402a3f1SStefano Radaelli }; 315*e402a3f1SStefano Radaelli 316*e402a3f1SStefano Radaelli pinctrl_i2c0: main-i2c0-default-pins { 317*e402a3f1SStefano Radaelli pinctrl-single,pins = < 318*e402a3f1SStefano Radaelli AM62PX_IOPAD(0x01e0, PIN_INPUT_PULLUP, 0) /* (B25) I2C0_SCL */ 319*e402a3f1SStefano Radaelli AM62PX_IOPAD(0x01e4, PIN_INPUT_PULLUP, 0) /* (A24) I2C0_SDA */ 320*e402a3f1SStefano Radaelli >; 321*e402a3f1SStefano Radaelli }; 322*e402a3f1SStefano Radaelli 323*e402a3f1SStefano Radaelli pinctrl_i2c1: main-i2c1-default-pins { 324*e402a3f1SStefano Radaelli pinctrl-single,pins = < 325*e402a3f1SStefano Radaelli AM62PX_IOPAD(0x01e8, PIN_INPUT_PULLUP, 0) /* (C24) I2C1_SCL */ 326*e402a3f1SStefano Radaelli AM62PX_IOPAD(0x01ec, PIN_INPUT_PULLUP, 0) /* (B24) I2C1_SDA */ 327*e402a3f1SStefano Radaelli >; 328*e402a3f1SStefano Radaelli bootph-all; 329*e402a3f1SStefano Radaelli }; 330*e402a3f1SStefano Radaelli 331*e402a3f1SStefano Radaelli pinctrl_mcan0: main-mcan0-default-pins { 332*e402a3f1SStefano Radaelli pinctrl-single,pins = < 333*e402a3f1SStefano Radaelli AM62PX_IOPAD(0x01dc, PIN_INPUT, 0) /* (F20) MCAN0_RX */ 334*e402a3f1SStefano Radaelli AM62PX_IOPAD(0x01d8, PIN_OUTPUT, 0) /* (B23) MCAN0_TX */ 335*e402a3f1SStefano Radaelli >; 336*e402a3f1SStefano Radaelli }; 337*e402a3f1SStefano Radaelli 338*e402a3f1SStefano Radaelli pinctrl_mmc1: main-mmc1-default-pins { 339*e402a3f1SStefano Radaelli pinctrl-single,pins = < 340*e402a3f1SStefano Radaelli AM62PX_IOPAD(0x023c, PIN_INPUT, 0) /* (H20) MMC1_CMD */ 341*e402a3f1SStefano Radaelli AM62PX_IOPAD(0x0234, PIN_OUTPUT, 0) /* (J24) MMC1_CLK */ 342*e402a3f1SStefano Radaelli AM62PX_IOPAD(0x0230, PIN_INPUT, 0) /* (H21) MMC1_DAT0 */ 343*e402a3f1SStefano Radaelli AM62PX_IOPAD(0x022c, PIN_INPUT, 0) /* (H23) MMC1_DAT1 */ 344*e402a3f1SStefano Radaelli AM62PX_IOPAD(0x0228, PIN_INPUT, 0) /* (H22) MMC1_DAT2 */ 345*e402a3f1SStefano Radaelli AM62PX_IOPAD(0x0224, PIN_INPUT, 0) /* (H25) MMC1_DAT3 */ 346*e402a3f1SStefano Radaelli AM62PX_IOPAD(0x0240, PIN_INPUT, 0) /* (D23) MMC1_SDCD */ 347*e402a3f1SStefano Radaelli >; 348*e402a3f1SStefano Radaelli bootph-all; 349*e402a3f1SStefano Radaelli }; 350*e402a3f1SStefano Radaelli 351*e402a3f1SStefano Radaelli pinctrl_rgmii2: main-rgmii2-default-pins { 352*e402a3f1SStefano Radaelli pinctrl-single,pins = < 353*e402a3f1SStefano Radaelli AM62PX_IOPAD(0x0184, PIN_INPUT, 0) /* (E19) RGMII2_RD0 */ 354*e402a3f1SStefano Radaelli AM62PX_IOPAD(0x0188, PIN_INPUT, 0) /* (E16) RGMII2_RD1 */ 355*e402a3f1SStefano Radaelli AM62PX_IOPAD(0x018c, PIN_INPUT, 0) /* (E17) RGMII2_RD2 */ 356*e402a3f1SStefano Radaelli AM62PX_IOPAD(0x0190, PIN_INPUT, 0) /* (C19) RGMII2_RD3 */ 357*e402a3f1SStefano Radaelli AM62PX_IOPAD(0x0180, PIN_INPUT, 0) /* (D19) RGMII2_RXC */ 358*e402a3f1SStefano Radaelli AM62PX_IOPAD(0x017c, PIN_INPUT, 0) /* (F19) RGMII2_RX_CTL */ 359*e402a3f1SStefano Radaelli AM62PX_IOPAD(0x016c, PIN_INPUT, 0) /* (B19) RGMII2_TD0 */ 360*e402a3f1SStefano Radaelli AM62PX_IOPAD(0x0170, PIN_INPUT, 0) /* (A21) RGMII2_TD1 */ 361*e402a3f1SStefano Radaelli AM62PX_IOPAD(0x0174, PIN_INPUT, 0) /* (D17) RGMII2_TD2 */ 362*e402a3f1SStefano Radaelli AM62PX_IOPAD(0x0178, PIN_INPUT, 0) /* (A19) RGMII2_TD3 */ 363*e402a3f1SStefano Radaelli AM62PX_IOPAD(0x0168, PIN_INPUT_PULLDOWN, 0) /* (D16) RGMII2_TXC */ 364*e402a3f1SStefano Radaelli AM62PX_IOPAD(0x0164, PIN_INPUT, 0) /* (A20) RGMII2_TX_CTL */ 365*e402a3f1SStefano Radaelli >; 366*e402a3f1SStefano Radaelli }; 367*e402a3f1SStefano Radaelli 368*e402a3f1SStefano Radaelli pinctrl_spi2: main-spi2-default-pins { 369*e402a3f1SStefano Radaelli pinctrl-single,pins = < 370*e402a3f1SStefano Radaelli AM62PX_IOPAD(0x01b0, PIN_INPUT, 1) /* (G20) MCASP0_ACLKR.SPI2_CLK */ 371*e402a3f1SStefano Radaelli AM62PX_IOPAD(0x0194, PIN_OUTPUT, 1) /* (D25) MCASP0_AXR3.SPI2_D0 */ 372*e402a3f1SStefano Radaelli AM62PX_IOPAD(0x0198, PIN_INPUT, 1) /* (E25) MCASP0_AXR2.SPI2_D1 */ 373*e402a3f1SStefano Radaelli AM62PX_IOPAD(0x01ac, PIN_OUTPUT, 7) /* (G23) MCASP0_AFSR.GPIO1_13 */ 374*e402a3f1SStefano Radaelli >; 375*e402a3f1SStefano Radaelli }; 376*e402a3f1SStefano Radaelli 377*e402a3f1SStefano Radaelli pinctrl_uart0: main-uart0-default-pins { 378*e402a3f1SStefano Radaelli pinctrl-single,pins = < 379*e402a3f1SStefano Radaelli AM62PX_IOPAD(0x1c8, PIN_INPUT, 0) /* (A22) UART0_RXD */ 380*e402a3f1SStefano Radaelli AM62PX_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (B22) UART0_TXD */ 381*e402a3f1SStefano Radaelli >; 382*e402a3f1SStefano Radaelli bootph-all; 383*e402a3f1SStefano Radaelli }; 384*e402a3f1SStefano Radaelli 385*e402a3f1SStefano Radaelli pinctrl_uart2: main-uart2-default-pins { 386*e402a3f1SStefano Radaelli pinctrl-single,pins = < 387*e402a3f1SStefano Radaelli AM62PX_IOPAD(0x005c, PIN_INPUT_PULLUP, 2) /* (AC25) GPMC0_AD8.UART2_RXD */ 388*e402a3f1SStefano Radaelli AM62PX_IOPAD(0x0060, PIN_OUTPUT, 2) /* (AB25) GPMC0_AD9.UART2_TXD */ 389*e402a3f1SStefano Radaelli >; 390*e402a3f1SStefano Radaelli }; 391*e402a3f1SStefano Radaelli 392*e402a3f1SStefano Radaelli pinctrl_uart6: main-uart6-default-pins { 393*e402a3f1SStefano Radaelli pinctrl-single,pins = < 394*e402a3f1SStefano Radaelli AM62PX_IOPAD(0x009c, PIN_INPUT_PULLUP, 3) /* (AD24) GPMC0_WAIT1.UART6_RXD */ 395*e402a3f1SStefano Radaelli AM62PX_IOPAD(0x0244, PIN_OUTPUT, 1) /* (D24) MMC1_SDWP.UART6_TXD */ 396*e402a3f1SStefano Radaelli >; 397*e402a3f1SStefano Radaelli }; 398*e402a3f1SStefano Radaelli 399*e402a3f1SStefano Radaelli pinctrl_usb1: main-usb1-default-pins { 400*e402a3f1SStefano Radaelli pinctrl-single,pins = < 401*e402a3f1SStefano Radaelli AM62PX_IOPAD(0x0258, PIN_OUTPUT, 0) /* (G21) USB1_DRVVBUS */ 402*e402a3f1SStefano Radaelli >; 403*e402a3f1SStefano Radaelli }; 404*e402a3f1SStefano Radaelli 405*e402a3f1SStefano Radaelli pinctrl_ov5640: main-ov5640-pins { 406*e402a3f1SStefano Radaelli pinctrl-single,pins = < 407*e402a3f1SStefano Radaelli AM62PX_IOPAD(0x0028, PIN_OUTPUT, 7) /* (N20) OSPI0_D7.GPIO0_10 */ 408*e402a3f1SStefano Radaelli AM62PX_IOPAD(0x0054, PIN_OUTPUT, 7) /* (V24) GPMC0_AD6.GPIO0_21 */ 409*e402a3f1SStefano Radaelli AM62PX_IOPAD(0x0058, PIN_OUTPUT, 7) /* (W25) GPMC0_AD7.GPIO0_22 */ 410*e402a3f1SStefano Radaelli >; 411*e402a3f1SStefano Radaelli }; 412*e402a3f1SStefano Radaelli 413*e402a3f1SStefano Radaelli pinctrl_pca9534: main-pca9534-pins { 414*e402a3f1SStefano Radaelli pinctrl-single,pins = < 415*e402a3f1SStefano Radaelli AM62PX_IOPAD(0x01f0, PIN_INPUT, 7) /* (C25) EXT_REFCLK1.GPIO1_30 */ 416*e402a3f1SStefano Radaelli >; 417*e402a3f1SStefano Radaelli }; 418*e402a3f1SStefano Radaelli 419*e402a3f1SStefano Radaelli pinctrl_sd1_vmmc: main-sd1-vmmc-pins { 420*e402a3f1SStefano Radaelli pinctrl-single,pins = < 421*e402a3f1SStefano Radaelli AM62PX_IOPAD(0x0078, PIN_OUTPUT, 7) /* (AC24) GPMC0_AD15.GPIO0_30 */ 422*e402a3f1SStefano Radaelli AM62PX_IOPAD(0x00d8, PIN_OUTPUT, 7) /* (AE22) VOUT0_DATA8.GPIO0_53 */ 423*e402a3f1SStefano Radaelli >; 424*e402a3f1SStefano Radaelli bootph-all; 425*e402a3f1SStefano Radaelli }; 426*e402a3f1SStefano Radaelli 427*e402a3f1SStefano Radaelli pinctrl_sd1_vqmmc: main-sd1-vqmmc-pins { 428*e402a3f1SStefano Radaelli pinctrl-single,pins = < 429*e402a3f1SStefano Radaelli AM62PX_IOPAD(0x00e4, PIN_OUTPUT, 7) /* (AE21) VOUT0_DATA11.GPIO0_56 */ 430*e402a3f1SStefano Radaelli >; 431*e402a3f1SStefano Radaelli bootph-all; 432*e402a3f1SStefano Radaelli }; 433*e402a3f1SStefano Radaelli}; 434*e402a3f1SStefano Radaelli 435*e402a3f1SStefano Radaelli&main_spi2 { 436*e402a3f1SStefano Radaelli pinctrl-names = "default"; 437*e402a3f1SStefano Radaelli pinctrl-0 = <&pinctrl_spi2>; 438*e402a3f1SStefano Radaelli ti,pindir-d0-out-d1-in; 439*e402a3f1SStefano Radaelli cs-gpios = <&main_gpio1 13 GPIO_ACTIVE_HIGH>; 440*e402a3f1SStefano Radaelli status = "okay"; 441*e402a3f1SStefano Radaelli}; 442*e402a3f1SStefano Radaelli 443*e402a3f1SStefano Radaelli&main_uart0 { 444*e402a3f1SStefano Radaelli pinctrl-names = "default"; 445*e402a3f1SStefano Radaelli pinctrl-0 = <&pinctrl_uart0>; 446*e402a3f1SStefano Radaelli status = "okay"; 447*e402a3f1SStefano Radaelli}; 448*e402a3f1SStefano Radaelli 449*e402a3f1SStefano Radaelli&main_uart2 { 450*e402a3f1SStefano Radaelli pinctrl-names = "default"; 451*e402a3f1SStefano Radaelli pinctrl-0 = <&pinctrl_uart2>; 452*e402a3f1SStefano Radaelli status = "okay"; 453*e402a3f1SStefano Radaelli}; 454*e402a3f1SStefano Radaelli 455*e402a3f1SStefano Radaelli&main_uart6 { 456*e402a3f1SStefano Radaelli pinctrl-names = "default"; 457*e402a3f1SStefano Radaelli pinctrl-0 = <&pinctrl_uart6>; 458*e402a3f1SStefano Radaelli status = "okay"; 459*e402a3f1SStefano Radaelli}; 460*e402a3f1SStefano Radaelli 461*e402a3f1SStefano Radaelli&sdhci1 { 462*e402a3f1SStefano Radaelli /* SD Card */ 463*e402a3f1SStefano Radaelli vmmc-supply = <®_sdhc1_vmmc>; 464*e402a3f1SStefano Radaelli vqmmc-supply = <®_sdhc1_vqmmc>; 465*e402a3f1SStefano Radaelli pinctrl-names = "default"; 466*e402a3f1SStefano Radaelli pinctrl-0 = <&pinctrl_mmc1>; 467*e402a3f1SStefano Radaelli disable-wp; 468*e402a3f1SStefano Radaelli bootph-all; 469*e402a3f1SStefano Radaelli status="okay"; 470*e402a3f1SStefano Radaelli}; 471*e402a3f1SStefano Radaelli 472*e402a3f1SStefano Radaelli&ti_csi2rx0 { 473*e402a3f1SStefano Radaelli status = "okay"; 474*e402a3f1SStefano Radaelli}; 475*e402a3f1SStefano Radaelli 476*e402a3f1SStefano Radaelli&usb0 { 477*e402a3f1SStefano Radaelli usb-role-switch; 478*e402a3f1SStefano Radaelli status = "okay"; 479*e402a3f1SStefano Radaelli 480*e402a3f1SStefano Radaelli port { 481*e402a3f1SStefano Radaelli typec_hs: endpoint { 482*e402a3f1SStefano Radaelli remote-endpoint = <&usb_con_hs>; 483*e402a3f1SStefano Radaelli }; 484*e402a3f1SStefano Radaelli }; 485*e402a3f1SStefano Radaelli}; 486*e402a3f1SStefano Radaelli 487*e402a3f1SStefano Radaelli&usb1 { 488*e402a3f1SStefano Radaelli dr_mode = "host"; 489*e402a3f1SStefano Radaelli pinctrl-names = "default"; 490*e402a3f1SStefano Radaelli pinctrl-0 = <&pinctrl_usb1>; 491*e402a3f1SStefano Radaelli status = "okay"; 492*e402a3f1SStefano Radaelli}; 493*e402a3f1SStefano Radaelli 494*e402a3f1SStefano Radaelli&usbss0 { 495*e402a3f1SStefano Radaelli status = "okay"; 496*e402a3f1SStefano Radaelli}; 497*e402a3f1SStefano Radaelli 498*e402a3f1SStefano Radaelli&usbss1 { 499*e402a3f1SStefano Radaelli status = "okay"; 500*e402a3f1SStefano Radaelli}; 501