1*acb4cd35SStefano Radaelli// SPDX-License-Identifier: GPL-2.0 2*acb4cd35SStefano Radaelli/* 3*acb4cd35SStefano Radaelli * Variscite Symphony carrier board for VAR-SOM-AM62 4*acb4cd35SStefano Radaelli * 5*acb4cd35SStefano Radaelli * Link: https://www.variscite.it/product/single-board-computers/symphony-board/ 6*acb4cd35SStefano Radaelli * 7*acb4cd35SStefano Radaelli * Copyright (C) 2026 Variscite Ltd. - https://www.variscite.com/ 8*acb4cd35SStefano Radaelli * Copyright (C) 2026 Stefano Radaelli <stefano.r@variscite.com> 9*acb4cd35SStefano Radaelli * 10*acb4cd35SStefano Radaelli */ 11*acb4cd35SStefano Radaelli 12*acb4cd35SStefano Radaelli/dts-v1/; 13*acb4cd35SStefano Radaelli 14*acb4cd35SStefano Radaelli#include "k3-am625-var-som.dtsi" 15*acb4cd35SStefano Radaelli 16*acb4cd35SStefano Radaelli/ { 17*acb4cd35SStefano Radaelli model = "Variscite VAR-SOM-AM62 on Symphony-Board"; 18*acb4cd35SStefano Radaelli compatible = "variscite,var-som-am62-symphony", "variscite,var-som-am62", "ti,am625"; 19*acb4cd35SStefano Radaelli 20*acb4cd35SStefano Radaelli aliases { 21*acb4cd35SStefano Radaelli ethernet0 = &cpsw_port1; 22*acb4cd35SStefano Radaelli ethernet1 = &cpsw_port2; 23*acb4cd35SStefano Radaelli mmc0 = &sdhci0; 24*acb4cd35SStefano Radaelli mmc1 = &sdhci1; 25*acb4cd35SStefano Radaelli mmc2 = &sdhci2; 26*acb4cd35SStefano Radaelli serial0 = &main_uart0; 27*acb4cd35SStefano Radaelli serial2 = &main_uart2; 28*acb4cd35SStefano Radaelli serial5 = &main_uart5; 29*acb4cd35SStefano Radaelli serial6 = &main_uart6; 30*acb4cd35SStefano Radaelli spi5 = &main_spi2; 31*acb4cd35SStefano Radaelli usb0 = &usb0; 32*acb4cd35SStefano Radaelli usb1 = &usb1; 33*acb4cd35SStefano Radaelli }; 34*acb4cd35SStefano Radaelli 35*acb4cd35SStefano Radaelli chosen { 36*acb4cd35SStefano Radaelli stdout-path = "serial0:115200n8"; 37*acb4cd35SStefano Radaelli }; 38*acb4cd35SStefano Radaelli 39*acb4cd35SStefano Radaelli clk_ov5640_fixed: clock-24000000 { 40*acb4cd35SStefano Radaelli #clock-cells = <0>; 41*acb4cd35SStefano Radaelli compatible = "fixed-clock"; 42*acb4cd35SStefano Radaelli clock-frequency = <24000000>; 43*acb4cd35SStefano Radaelli }; 44*acb4cd35SStefano Radaelli 45*acb4cd35SStefano Radaelli gpio-keys { 46*acb4cd35SStefano Radaelli compatible = "gpio-keys"; 47*acb4cd35SStefano Radaelli 48*acb4cd35SStefano Radaelli button-back { 49*acb4cd35SStefano Radaelli label = "Back"; 50*acb4cd35SStefano Radaelli linux,code = <KEY_BACK>; 51*acb4cd35SStefano Radaelli gpios = <&pca9534 1 GPIO_ACTIVE_LOW>; 52*acb4cd35SStefano Radaelli }; 53*acb4cd35SStefano Radaelli 54*acb4cd35SStefano Radaelli button-home { 55*acb4cd35SStefano Radaelli label = "Home"; 56*acb4cd35SStefano Radaelli linux,code = <KEY_HOME>; 57*acb4cd35SStefano Radaelli gpios = <&pca9534 2 GPIO_ACTIVE_LOW>; 58*acb4cd35SStefano Radaelli }; 59*acb4cd35SStefano Radaelli 60*acb4cd35SStefano Radaelli button-menu { 61*acb4cd35SStefano Radaelli label = "Menu"; 62*acb4cd35SStefano Radaelli linux,code = <KEY_MENU>; 63*acb4cd35SStefano Radaelli gpios = <&pca9534 3 GPIO_ACTIVE_LOW>; 64*acb4cd35SStefano Radaelli }; 65*acb4cd35SStefano Radaelli }; 66*acb4cd35SStefano Radaelli 67*acb4cd35SStefano Radaelli gpio-leds { 68*acb4cd35SStefano Radaelli compatible = "gpio-leds"; 69*acb4cd35SStefano Radaelli 70*acb4cd35SStefano Radaelli led-heartbeat { 71*acb4cd35SStefano Radaelli label = "Heartbeat"; 72*acb4cd35SStefano Radaelli linux,default-trigger = "heartbeat"; 73*acb4cd35SStefano Radaelli gpios = <&pca9534 0 GPIO_ACTIVE_LOW>; 74*acb4cd35SStefano Radaelli }; 75*acb4cd35SStefano Radaelli }; 76*acb4cd35SStefano Radaelli 77*acb4cd35SStefano Radaelli reg_2p8v: regulator-2p8v { 78*acb4cd35SStefano Radaelli compatible = "regulator-fixed"; 79*acb4cd35SStefano Radaelli regulator-name = "2P8V"; 80*acb4cd35SStefano Radaelli regulator-min-microvolt = <2800000>; 81*acb4cd35SStefano Radaelli regulator-max-microvolt = <2800000>; 82*acb4cd35SStefano Radaelli vin-supply = <®_3v3>; 83*acb4cd35SStefano Radaelli regulator-always-on; 84*acb4cd35SStefano Radaelli }; 85*acb4cd35SStefano Radaelli 86*acb4cd35SStefano Radaelli reg_1p8v: regulator-1p8v { 87*acb4cd35SStefano Radaelli compatible = "regulator-fixed"; 88*acb4cd35SStefano Radaelli regulator-name = "1P8V"; 89*acb4cd35SStefano Radaelli regulator-min-microvolt = <1800000>; 90*acb4cd35SStefano Radaelli regulator-max-microvolt = <1800000>; 91*acb4cd35SStefano Radaelli vin-supply = <®_3v3>; 92*acb4cd35SStefano Radaelli regulator-always-on; 93*acb4cd35SStefano Radaelli }; 94*acb4cd35SStefano Radaelli 95*acb4cd35SStefano Radaelli reg_1p5v: regulator-1p5v { 96*acb4cd35SStefano Radaelli compatible = "regulator-fixed"; 97*acb4cd35SStefano Radaelli regulator-name = "1P5V"; 98*acb4cd35SStefano Radaelli regulator-min-microvolt = <1500000>; 99*acb4cd35SStefano Radaelli regulator-max-microvolt = <1500000>; 100*acb4cd35SStefano Radaelli vin-supply = <®_3v3>; 101*acb4cd35SStefano Radaelli regulator-always-on; 102*acb4cd35SStefano Radaelli }; 103*acb4cd35SStefano Radaelli 104*acb4cd35SStefano Radaelli reg_sdhc1_vmmc: regulator-sdhc1 { 105*acb4cd35SStefano Radaelli compatible = "regulator-fixed"; 106*acb4cd35SStefano Radaelli regulator-name = "+V3.3_SD"; 107*acb4cd35SStefano Radaelli pinctrl-names = "default"; 108*acb4cd35SStefano Radaelli pinctrl-0 = <&pinctrl_sd1_vmmc>; 109*acb4cd35SStefano Radaelli regulator-min-microvolt = <3300000>; 110*acb4cd35SStefano Radaelli regulator-max-microvolt = <3300000>; 111*acb4cd35SStefano Radaelli regulator-boot-on; 112*acb4cd35SStefano Radaelli enable-active-high; 113*acb4cd35SStefano Radaelli gpios = <&main_gpio0 30 GPIO_ACTIVE_HIGH>; 114*acb4cd35SStefano Radaelli bootph-all; 115*acb4cd35SStefano Radaelli }; 116*acb4cd35SStefano Radaelli 117*acb4cd35SStefano Radaelli reg_sdhc1_vqmmc: regulator-sdhci1-vqmmc { 118*acb4cd35SStefano Radaelli compatible = "regulator-gpio"; 119*acb4cd35SStefano Radaelli regulator-name = "+V3.3_SD_VQMMC"; 120*acb4cd35SStefano Radaelli pinctrl-names = "default"; 121*acb4cd35SStefano Radaelli pinctrl-0 = <&pinctrl_sd1_vqmmc>; 122*acb4cd35SStefano Radaelli regulator-min-microvolt = <1800000>; 123*acb4cd35SStefano Radaelli regulator-max-microvolt = <3300000>; 124*acb4cd35SStefano Radaelli regulator-boot-on; 125*acb4cd35SStefano Radaelli gpios = <&main_gpio0 56 GPIO_ACTIVE_HIGH>; 126*acb4cd35SStefano Radaelli states = <1800000 0x0>, 127*acb4cd35SStefano Radaelli <3300000 0x1>; 128*acb4cd35SStefano Radaelli bootph-all; 129*acb4cd35SStefano Radaelli }; 130*acb4cd35SStefano Radaelli 131*acb4cd35SStefano Radaelli reg_ov5640_buf_en: regulator-camera-buf-en { 132*acb4cd35SStefano Radaelli compatible = "regulator-fixed"; 133*acb4cd35SStefano Radaelli regulator-name = "ov5640_buf_en"; 134*acb4cd35SStefano Radaelli pinctrl-names = "default"; 135*acb4cd35SStefano Radaelli pinctrl-0 = <&pinctrl_ov5640_buf>; 136*acb4cd35SStefano Radaelli gpios = <&main_gpio0 21 GPIO_ACTIVE_HIGH>; 137*acb4cd35SStefano Radaelli regulator-always-on; 138*acb4cd35SStefano Radaelli regulator-boot-on; 139*acb4cd35SStefano Radaelli }; 140*acb4cd35SStefano Radaelli 141*acb4cd35SStefano Radaelli transceiver1: can-phy { 142*acb4cd35SStefano Radaelli compatible = "ti,tcan1042"; 143*acb4cd35SStefano Radaelli #phy-cells = <0>; 144*acb4cd35SStefano Radaelli max-bitrate = <5000000>; 145*acb4cd35SStefano Radaelli }; 146*acb4cd35SStefano Radaelli 147*acb4cd35SStefano Radaelli connector { 148*acb4cd35SStefano Radaelli compatible = "gpio-usb-b-connector", "usb-b-connector"; 149*acb4cd35SStefano Radaelli pinctrl-names = "default"; 150*acb4cd35SStefano Radaelli pinctrl-0 = <&pinctrl_extcon>; 151*acb4cd35SStefano Radaelli label = "USB-C"; 152*acb4cd35SStefano Radaelli id-gpios = <&main_gpio1 12 GPIO_ACTIVE_HIGH>; 153*acb4cd35SStefano Radaelli status = "okay"; 154*acb4cd35SStefano Radaelli 155*acb4cd35SStefano Radaelli port { 156*acb4cd35SStefano Radaelli usb_con_hs: endpoint { 157*acb4cd35SStefano Radaelli remote-endpoint = <&typec_hs>; 158*acb4cd35SStefano Radaelli }; 159*acb4cd35SStefano Radaelli }; 160*acb4cd35SStefano Radaelli }; 161*acb4cd35SStefano Radaelli}; 162*acb4cd35SStefano Radaelli 163*acb4cd35SStefano Radaelli&cdns_csi2rx0 { 164*acb4cd35SStefano Radaelli ports { 165*acb4cd35SStefano Radaelli #address-cells = <1>; 166*acb4cd35SStefano Radaelli #size-cells = <0>; 167*acb4cd35SStefano Radaelli 168*acb4cd35SStefano Radaelli csi0_port0: port@0 { 169*acb4cd35SStefano Radaelli reg = <0>; 170*acb4cd35SStefano Radaelli status = "okay"; 171*acb4cd35SStefano Radaelli 172*acb4cd35SStefano Radaelli csi2rx0_in_sensor: endpoint { 173*acb4cd35SStefano Radaelli remote-endpoint = <&csi2_cam0>; 174*acb4cd35SStefano Radaelli bus-type = <4>; /* CSI2 DPHY. */ 175*acb4cd35SStefano Radaelli clock-lanes = <0>; 176*acb4cd35SStefano Radaelli data-lanes = <1 2>; 177*acb4cd35SStefano Radaelli }; 178*acb4cd35SStefano Radaelli }; 179*acb4cd35SStefano Radaelli }; 180*acb4cd35SStefano Radaelli}; 181*acb4cd35SStefano Radaelli 182*acb4cd35SStefano Radaelli&cpsw3g { 183*acb4cd35SStefano Radaelli pinctrl-names = "default"; 184*acb4cd35SStefano Radaelli pinctrl-0 = <&pinctrl_rgmii1>, 185*acb4cd35SStefano Radaelli <&pinctrl_rgmii2>; 186*acb4cd35SStefano Radaelli status = "okay"; 187*acb4cd35SStefano Radaelli 188*acb4cd35SStefano Radaelli cpts@3d000 { 189*acb4cd35SStefano Radaelli /* MAP HW3_TS_PUSH to GENF1 */ 190*acb4cd35SStefano Radaelli ti,pps = <2 1>; 191*acb4cd35SStefano Radaelli }; 192*acb4cd35SStefano Radaelli}; 193*acb4cd35SStefano Radaelli 194*acb4cd35SStefano Radaelli&cpsw3g_mdio { 195*acb4cd35SStefano Radaelli pinctrl-names = "default"; 196*acb4cd35SStefano Radaelli pinctrl-0 = <&pinctrl_mdio1>; 197*acb4cd35SStefano Radaelli status = "okay"; 198*acb4cd35SStefano Radaelli 199*acb4cd35SStefano Radaelli cpsw3g_phy1: ethernet-phy@5 { 200*acb4cd35SStefano Radaelli compatible = "ethernet-phy-id0283.bc30"; 201*acb4cd35SStefano Radaelli reg = <5>; 202*acb4cd35SStefano Radaelli reset-gpios = <&pca9534 5 GPIO_ACTIVE_LOW>; 203*acb4cd35SStefano Radaelli reset-assert-us = <10000>; 204*acb4cd35SStefano Radaelli reset-deassert-us = <100000>; 205*acb4cd35SStefano Radaelli }; 206*acb4cd35SStefano Radaelli}; 207*acb4cd35SStefano Radaelli 208*acb4cd35SStefano Radaelli&cpsw_port2 { 209*acb4cd35SStefano Radaelli /* 210*acb4cd35SStefano Radaelli * The required RGMII TX and RX 2ns delays are implemented directly 211*acb4cd35SStefano Radaelli * in hardware via passive delay elements on the Symphony PCB. 212*acb4cd35SStefano Radaelli * No delay configuration is needed in software via PHY driver. 213*acb4cd35SStefano Radaelli */ 214*acb4cd35SStefano Radaelli phy-mode = "rgmii"; 215*acb4cd35SStefano Radaelli phy-handle = <&cpsw3g_phy1>; 216*acb4cd35SStefano Radaelli status = "okay"; 217*acb4cd35SStefano Radaelli}; 218*acb4cd35SStefano Radaelli 219*acb4cd35SStefano Radaelli&dphy0 { 220*acb4cd35SStefano Radaelli status = "okay"; 221*acb4cd35SStefano Radaelli}; 222*acb4cd35SStefano Radaelli 223*acb4cd35SStefano Radaelli&epwm1 { 224*acb4cd35SStefano Radaelli status = "okay"; 225*acb4cd35SStefano Radaelli pinctrl-names = "default"; 226*acb4cd35SStefano Radaelli pinctrl-0 = <&pinctrl_epwm1>; 227*acb4cd35SStefano Radaelli}; 228*acb4cd35SStefano Radaelli 229*acb4cd35SStefano Radaelli&main_i2c0 { 230*acb4cd35SStefano Radaelli pinctrl-names = "default"; 231*acb4cd35SStefano Radaelli pinctrl-0 = <&pinctrl_i2c0>; 232*acb4cd35SStefano Radaelli clock-frequency = <400000>; 233*acb4cd35SStefano Radaelli status = "okay"; 234*acb4cd35SStefano Radaelli 235*acb4cd35SStefano Radaelli /* GPIO expander */ 236*acb4cd35SStefano Radaelli pca9534: gpio@20 { 237*acb4cd35SStefano Radaelli compatible = "nxp,pca9534"; 238*acb4cd35SStefano Radaelli reg = <0x20>; 239*acb4cd35SStefano Radaelli pinctrl-names = "default"; 240*acb4cd35SStefano Radaelli pinctrl-0 = <&pinctrl_pca9534>; 241*acb4cd35SStefano Radaelli #gpio-cells = <2>; 242*acb4cd35SStefano Radaelli gpio-controller; 243*acb4cd35SStefano Radaelli interrupt-controller; 244*acb4cd35SStefano Radaelli #interrupt-cells = <2>; 245*acb4cd35SStefano Radaelli interrupt-parent = <&main_gpio1>; 246*acb4cd35SStefano Radaelli interrupts = <30 IRQ_TYPE_LEVEL_LOW>; 247*acb4cd35SStefano Radaelli 248*acb4cd35SStefano Radaelli usb3-sel-hog { 249*acb4cd35SStefano Radaelli gpio-hog; 250*acb4cd35SStefano Radaelli gpios = <4 0>; 251*acb4cd35SStefano Radaelli output-low; 252*acb4cd35SStefano Radaelli line-name = "usb3_sel"; 253*acb4cd35SStefano Radaelli }; 254*acb4cd35SStefano Radaelli 255*acb4cd35SStefano Radaelli eth-som-vselect-hog { 256*acb4cd35SStefano Radaelli gpio-hog; 257*acb4cd35SStefano Radaelli gpios = <6 0>; 258*acb4cd35SStefano Radaelli output-low; 259*acb4cd35SStefano Radaelli line-name = "eth-vselect"; 260*acb4cd35SStefano Radaelli }; 261*acb4cd35SStefano Radaelli 262*acb4cd35SStefano Radaelli eth-mdio-enable-hog { 263*acb4cd35SStefano Radaelli gpio-hog; 264*acb4cd35SStefano Radaelli gpios = <7 0>; 265*acb4cd35SStefano Radaelli output-high; 266*acb4cd35SStefano Radaelli line-name = "eth-mdio-enable"; 267*acb4cd35SStefano Radaelli }; 268*acb4cd35SStefano Radaelli }; 269*acb4cd35SStefano Radaelli 270*acb4cd35SStefano Radaelli ov5640: camera@3c { 271*acb4cd35SStefano Radaelli compatible = "ovti,ov5640"; 272*acb4cd35SStefano Radaelli reg = <0x3c>; 273*acb4cd35SStefano Radaelli clocks = <&clk_ov5640_fixed>; 274*acb4cd35SStefano Radaelli clock-names = "xclk"; 275*acb4cd35SStefano Radaelli AVDD-supply = <®_2p8v>; 276*acb4cd35SStefano Radaelli DOVDD-supply = <®_1p8v>; 277*acb4cd35SStefano Radaelli DVDD-supply = <®_1p5v>; 278*acb4cd35SStefano Radaelli powerdown-gpios = <&main_gpio0 10 GPIO_ACTIVE_HIGH>; 279*acb4cd35SStefano Radaelli reset-gpios = <&main_gpio0 22 GPIO_ACTIVE_LOW>; 280*acb4cd35SStefano Radaelli pinctrl-names = "default"; 281*acb4cd35SStefano Radaelli pinctrl-0 = <&pinctrl_ov5640>; 282*acb4cd35SStefano Radaelli 283*acb4cd35SStefano Radaelli port { 284*acb4cd35SStefano Radaelli csi2_cam0: endpoint { 285*acb4cd35SStefano Radaelli remote-endpoint = <&csi2rx0_in_sensor>; 286*acb4cd35SStefano Radaelli clock-lanes = <0>; 287*acb4cd35SStefano Radaelli data-lanes = <1 2>; 288*acb4cd35SStefano Radaelli }; 289*acb4cd35SStefano Radaelli }; 290*acb4cd35SStefano Radaelli }; 291*acb4cd35SStefano Radaelli}; 292*acb4cd35SStefano Radaelli 293*acb4cd35SStefano Radaelli&main_i2c1 { 294*acb4cd35SStefano Radaelli pinctrl-names = "default"; 295*acb4cd35SStefano Radaelli pinctrl-0 = <&pinctrl_i2c1>; 296*acb4cd35SStefano Radaelli clock-frequency = <400000>; 297*acb4cd35SStefano Radaelli status = "okay"; 298*acb4cd35SStefano Radaelli 299*acb4cd35SStefano Radaelli pcal6408: gpio@21 { 300*acb4cd35SStefano Radaelli compatible = "nxp,pcal6408"; 301*acb4cd35SStefano Radaelli reg = <0x21>; 302*acb4cd35SStefano Radaelli gpio-controller; 303*acb4cd35SStefano Radaelli #gpio-cells = <2>; 304*acb4cd35SStefano Radaelli 305*acb4cd35SStefano Radaelli /* RGB_SEL */ 306*acb4cd35SStefano Radaelli lvds-brg-enable-hog { 307*acb4cd35SStefano Radaelli gpio-hog; 308*acb4cd35SStefano Radaelli gpios = <7 GPIO_ACTIVE_HIGH>; 309*acb4cd35SStefano Radaelli output-low; 310*acb4cd35SStefano Radaelli line-name = "lvds_brg_en"; 311*acb4cd35SStefano Radaelli }; 312*acb4cd35SStefano Radaelli }; 313*acb4cd35SStefano Radaelli 314*acb4cd35SStefano Radaelli st33ktpm2xi2c: tpm@2e { 315*acb4cd35SStefano Radaelli compatible = "st,st33ktpm2xi2c", "tcg,tpm-tis-i2c"; 316*acb4cd35SStefano Radaelli label = "tpm"; 317*acb4cd35SStefano Radaelli reg = <0x2e>; 318*acb4cd35SStefano Radaelli reset-gpios = <&pcal6408 4 GPIO_ACTIVE_LOW>; 319*acb4cd35SStefano Radaelli }; 320*acb4cd35SStefano Radaelli 321*acb4cd35SStefano Radaelli /* Capacitive touch controller */ 322*acb4cd35SStefano Radaelli ft5x06_ts: touchscreen@38 { 323*acb4cd35SStefano Radaelli compatible = "edt,edt-ft5206"; 324*acb4cd35SStefano Radaelli reg = <0x38>; 325*acb4cd35SStefano Radaelli pinctrl-names = "default"; 326*acb4cd35SStefano Radaelli pinctrl-0 = <&pinctrl_captouch_pins>; 327*acb4cd35SStefano Radaelli interrupt-parent = <&main_gpio1>; 328*acb4cd35SStefano Radaelli interrupts = <16 IRQ_TYPE_EDGE_FALLING>; 329*acb4cd35SStefano Radaelli touchscreen-size-x = <800>; 330*acb4cd35SStefano Radaelli touchscreen-size-y = <480>; 331*acb4cd35SStefano Radaelli touchscreen-inverted-x; 332*acb4cd35SStefano Radaelli touchscreen-inverted-y; 333*acb4cd35SStefano Radaelli wakeup-source; 334*acb4cd35SStefano Radaelli }; 335*acb4cd35SStefano Radaelli 336*acb4cd35SStefano Radaelli rtc@68 { 337*acb4cd35SStefano Radaelli compatible = "dallas,ds1337"; 338*acb4cd35SStefano Radaelli reg = <0x68>; 339*acb4cd35SStefano Radaelli }; 340*acb4cd35SStefano Radaelli}; 341*acb4cd35SStefano Radaelli 342*acb4cd35SStefano Radaelli&main_mcan0 { 343*acb4cd35SStefano Radaelli pinctrl-names = "default"; 344*acb4cd35SStefano Radaelli pinctrl-0 = <&pinctrl_mcan0>; 345*acb4cd35SStefano Radaelli phys = <&transceiver1>; 346*acb4cd35SStefano Radaelli status = "okay"; 347*acb4cd35SStefano Radaelli}; 348*acb4cd35SStefano Radaelli 349*acb4cd35SStefano Radaelli&main_pmx0 { 350*acb4cd35SStefano Radaelli pinctrl_captouch_pins: main-captouch-default-pins { 351*acb4cd35SStefano Radaelli pinctrl-single,pins = < 352*acb4cd35SStefano Radaelli AM62X_IOPAD(0x01b8, PIN_INPUT, 7) /* (C13) SPI0_CS1.GPIO1_16 */ 353*acb4cd35SStefano Radaelli >; 354*acb4cd35SStefano Radaelli }; 355*acb4cd35SStefano Radaelli 356*acb4cd35SStefano Radaelli pinctrl_epwm1: main-epwm1-default-pins { 357*acb4cd35SStefano Radaelli pinctrl-single,pins = < 358*acb4cd35SStefano Radaelli AM62X_IOPAD(0x019c, PIN_OUTPUT, 6) /* (B18) MCASP0_AXR1.EHRPWM1_A */ 359*acb4cd35SStefano Radaelli >; 360*acb4cd35SStefano Radaelli }; 361*acb4cd35SStefano Radaelli 362*acb4cd35SStefano Radaelli pinctrl_extcon: main-extcon-default-pins { 363*acb4cd35SStefano Radaelli pinctrl-single,pins = < 364*acb4cd35SStefano Radaelli AM62X_IOPAD(0x01a8, PIN_INPUT, 7) /* (D20) MCASP0_AFSX.GPIO1_12 */ 365*acb4cd35SStefano Radaelli >; 366*acb4cd35SStefano Radaelli }; 367*acb4cd35SStefano Radaelli 368*acb4cd35SStefano Radaelli pinctrl_i2c0: main-i2c0-default-pins { 369*acb4cd35SStefano Radaelli pinctrl-single,pins = < 370*acb4cd35SStefano Radaelli AM62X_IOPAD(0x1e0, PIN_INPUT_PULLUP, 0) /* (B16) I2C0_SCL */ 371*acb4cd35SStefano Radaelli AM62X_IOPAD(0x1e4, PIN_INPUT_PULLUP, 0) /* (A16) I2C0_SDA */ 372*acb4cd35SStefano Radaelli >; 373*acb4cd35SStefano Radaelli }; 374*acb4cd35SStefano Radaelli 375*acb4cd35SStefano Radaelli pinctrl_i2c1: main-i2c1-default-pins { 376*acb4cd35SStefano Radaelli bootph-all; 377*acb4cd35SStefano Radaelli pinctrl-single,pins = < 378*acb4cd35SStefano Radaelli AM62X_IOPAD(0x1e8, PIN_INPUT_PULLUP, 0) /* (B17) I2C1_SCL */ 379*acb4cd35SStefano Radaelli AM62X_IOPAD(0x1ec, PIN_INPUT_PULLUP, 0) /* (A17) I2C1_SDA */ 380*acb4cd35SStefano Radaelli >; 381*acb4cd35SStefano Radaelli }; 382*acb4cd35SStefano Radaelli 383*acb4cd35SStefano Radaelli pinctrl_mcan0: main-mcan0-default-pins { 384*acb4cd35SStefano Radaelli pinctrl-single,pins = < 385*acb4cd35SStefano Radaelli AM62X_IOPAD(0x1dc, PIN_INPUT, 0) /* (E15) MCAN0_RX */ 386*acb4cd35SStefano Radaelli AM62X_IOPAD(0x1d8, PIN_OUTPUT, 0) /* (C15) MCAN0_TX */ 387*acb4cd35SStefano Radaelli >; 388*acb4cd35SStefano Radaelli }; 389*acb4cd35SStefano Radaelli 390*acb4cd35SStefano Radaelli pinctrl_mmc1: main-mmc1-default-pins { 391*acb4cd35SStefano Radaelli bootph-all; 392*acb4cd35SStefano Radaelli pinctrl-single,pins = < 393*acb4cd35SStefano Radaelli AM62X_IOPAD(0x23c, PIN_INPUT, 0) /* (A21) MMC1_CMD */ 394*acb4cd35SStefano Radaelli AM62X_IOPAD(0x234, PIN_INPUT, 0) /* (B22) MMC1_CLK */ 395*acb4cd35SStefano Radaelli AM62X_IOPAD(0x230, PIN_INPUT, 0) /* (A22) MMC1_DAT0 */ 396*acb4cd35SStefano Radaelli AM62X_IOPAD(0x22c, PIN_INPUT, 0) /* (B21) MMC1_DAT1 */ 397*acb4cd35SStefano Radaelli AM62X_IOPAD(0x228, PIN_INPUT, 0) /* (C21) MMC1_DAT2 */ 398*acb4cd35SStefano Radaelli AM62X_IOPAD(0x224, PIN_INPUT, 0) /* (D22) MMC1_DAT3 */ 399*acb4cd35SStefano Radaelli AM62X_IOPAD(0x240, PIN_INPUT, 0) /* (D17) MMC1_SDCD */ 400*acb4cd35SStefano Radaelli >; 401*acb4cd35SStefano Radaelli }; 402*acb4cd35SStefano Radaelli 403*acb4cd35SStefano Radaelli pinctrl_ov5640: main-ov5640-default-pins { 404*acb4cd35SStefano Radaelli pinctrl-single,pins = < 405*acb4cd35SStefano Radaelli AM62X_IOPAD(0x0028, PIN_OUTPUT, 7) /* (J22) OSPI0_D7.GPIO0_10 */ 406*acb4cd35SStefano Radaelli AM62X_IOPAD(0x0058, PIN_OUTPUT, 7) /* (R23) GPMC0_AD7.GPIO0_22 */ 407*acb4cd35SStefano Radaelli >; 408*acb4cd35SStefano Radaelli }; 409*acb4cd35SStefano Radaelli 410*acb4cd35SStefano Radaelli pinctrl_ov5640_buf: main-ov5640-buf-default-pins { 411*acb4cd35SStefano Radaelli pinctrl-single,pins = < 412*acb4cd35SStefano Radaelli AM62X_IOPAD(0x0054, PIN_OUTPUT, 7) /* (P21) GPMC0_AD6.GPIO0_21 */ 413*acb4cd35SStefano Radaelli >; 414*acb4cd35SStefano Radaelli }; 415*acb4cd35SStefano Radaelli 416*acb4cd35SStefano Radaelli pinctrl_pca9534: main-pca9534-default-pins { 417*acb4cd35SStefano Radaelli pinctrl-single,pins = < 418*acb4cd35SStefano Radaelli AM62X_IOPAD(0x01f0, PIN_INPUT, 7) /* (A18) EXT_REFCLK1.GPIO1_30 */ 419*acb4cd35SStefano Radaelli >; 420*acb4cd35SStefano Radaelli }; 421*acb4cd35SStefano Radaelli 422*acb4cd35SStefano Radaelli pinctrl_rgmii2: main-rgmii2-default-pins { 423*acb4cd35SStefano Radaelli bootph-all; 424*acb4cd35SStefano Radaelli pinctrl-single,pins = < 425*acb4cd35SStefano Radaelli AM62X_IOPAD(0x184, PIN_INPUT, 0) /* (AE23) RGMII2_RD0 */ 426*acb4cd35SStefano Radaelli AM62X_IOPAD(0x188, PIN_INPUT, 0) /* (AB20) RGMII2_RD1 */ 427*acb4cd35SStefano Radaelli AM62X_IOPAD(0x18c, PIN_INPUT, 0) /* (AC21) RGMII2_RD2 */ 428*acb4cd35SStefano Radaelli AM62X_IOPAD(0x190, PIN_INPUT, 0) /* (AE22) RGMII2_RD3 */ 429*acb4cd35SStefano Radaelli AM62X_IOPAD(0x180, PIN_INPUT, 0) /* (AD23) RGMII2_RXC */ 430*acb4cd35SStefano Radaelli AM62X_IOPAD(0x17c, PIN_INPUT, 0) /* (AD22) RGMII2_RX_CTL */ 431*acb4cd35SStefano Radaelli AM62X_IOPAD(0x16c, PIN_INPUT, 0) /* (Y18) RGMII2_TD0 */ 432*acb4cd35SStefano Radaelli AM62X_IOPAD(0x170, PIN_INPUT, 0) /* (AA18) RGMII2_TD1 */ 433*acb4cd35SStefano Radaelli AM62X_IOPAD(0x174, PIN_INPUT, 0) /* (AD21) RGMII2_TD2 */ 434*acb4cd35SStefano Radaelli AM62X_IOPAD(0x178, PIN_INPUT, 0) /* (AC20) RGMII2_TD3 */ 435*acb4cd35SStefano Radaelli AM62X_IOPAD(0x168, PIN_INPUT_PULLDOWN, 0) /* (AE21) RGMII2_TXC */ 436*acb4cd35SStefano Radaelli AM62X_IOPAD(0x164, PIN_INPUT, 0) /* (AA19) RGMII2_TX_CTL */ 437*acb4cd35SStefano Radaelli >; 438*acb4cd35SStefano Radaelli }; 439*acb4cd35SStefano Radaelli 440*acb4cd35SStefano Radaelli pinctrl_sd1_vmmc: main-sd1-vmmc-default-pins { 441*acb4cd35SStefano Radaelli pinctrl-single,pins = < 442*acb4cd35SStefano Radaelli AM62X_IOPAD(0x0078, PIN_OUTPUT, 7) /* (U24) GPMC0_AD15.GPIO0_30 */ 443*acb4cd35SStefano Radaelli >; 444*acb4cd35SStefano Radaelli }; 445*acb4cd35SStefano Radaelli 446*acb4cd35SStefano Radaelli pinctrl_sd1_vqmmc: main-sd1-vqmmc-default-pins { 447*acb4cd35SStefano Radaelli pinctrl-single,pins = < 448*acb4cd35SStefano Radaelli AM62X_IOPAD(0x00e4, PIN_OUTPUT, 7) /* (AA23) VOUT0_DATA11.GPIO0_56 */ 449*acb4cd35SStefano Radaelli >; 450*acb4cd35SStefano Radaelli }; 451*acb4cd35SStefano Radaelli 452*acb4cd35SStefano Radaelli pinctrl_spi2: main-spi2-default-pins { 453*acb4cd35SStefano Radaelli pinctrl-single,pins = < 454*acb4cd35SStefano Radaelli AM62X_IOPAD(0x01b0, PIN_INPUT, 1) /* (A20) MCASP0_ACLKR.SPI2_CLK */ 455*acb4cd35SStefano Radaelli AM62X_IOPAD(0x0194, PIN_OUTPUT, 1) /* (B19) MCASP0_AXR3.SPI2_D0 */ 456*acb4cd35SStefano Radaelli AM62X_IOPAD(0x0198, PIN_INPUT, 1) /* (A19) MCASP0_AXR2.SPI2_D1 */ 457*acb4cd35SStefano Radaelli AM62X_IOPAD(0x01ac, PIN_OUTPUT, 7) /* (E19) MCASP0_AFSR.GPIO1_13 */ 458*acb4cd35SStefano Radaelli >; 459*acb4cd35SStefano Radaelli }; 460*acb4cd35SStefano Radaelli 461*acb4cd35SStefano Radaelli pinctrl_uart0: main-uart0-default-pins { 462*acb4cd35SStefano Radaelli bootph-all; 463*acb4cd35SStefano Radaelli pinctrl-single,pins = < 464*acb4cd35SStefano Radaelli AM62X_IOPAD(0x1c8, PIN_INPUT, 0) /* (D14) UART0_RXD, change muxmode from 0 to 7 to deactivate Debug UART RXD */ 465*acb4cd35SStefano Radaelli AM62X_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (E14) UART0_TXD */ 466*acb4cd35SStefano Radaelli >; 467*acb4cd35SStefano Radaelli }; 468*acb4cd35SStefano Radaelli 469*acb4cd35SStefano Radaelli pinctrl_uart2: main-uart2-default-pins { 470*acb4cd35SStefano Radaelli pinctrl-single,pins = < 471*acb4cd35SStefano Radaelli AM62X_IOPAD(0x005c, PIN_INPUT_PULLUP, 2) /* (R24) GPMC0_AD8.UART2_RXD */ 472*acb4cd35SStefano Radaelli AM62X_IOPAD(0x0060, PIN_OUTPUT, 2) /* (R25) GPMC0_AD9.UART2_TXD */ 473*acb4cd35SStefano Radaelli >; 474*acb4cd35SStefano Radaelli }; 475*acb4cd35SStefano Radaelli 476*acb4cd35SStefano Radaelli pinctrl_uart6: main-uart6-default-pins { 477*acb4cd35SStefano Radaelli pinctrl-single,pins = < 478*acb4cd35SStefano Radaelli AM62X_IOPAD(0x009c, PIN_INPUT, 3) /* (V25) GPMC0_WAIT1.UART6_RXD */ 479*acb4cd35SStefano Radaelli AM62X_IOPAD(0x0244, PIN_OUTPUT, 1) /* (C17) MMC1_SDWP.UART6_TXD */ 480*acb4cd35SStefano Radaelli >; 481*acb4cd35SStefano Radaelli }; 482*acb4cd35SStefano Radaelli 483*acb4cd35SStefano Radaelli pinctrl_usb1: main-usb1-default-pins { 484*acb4cd35SStefano Radaelli pinctrl-single,pins = < 485*acb4cd35SStefano Radaelli AM62X_IOPAD(0x0258, PIN_OUTPUT, 0) /* (F18) USB1_DRVVBUS */ 486*acb4cd35SStefano Radaelli >; 487*acb4cd35SStefano Radaelli }; 488*acb4cd35SStefano Radaelli}; 489*acb4cd35SStefano Radaelli 490*acb4cd35SStefano Radaelli&main_spi2 { 491*acb4cd35SStefano Radaelli pinctrl-names = "default"; 492*acb4cd35SStefano Radaelli pinctrl-0 = <&pinctrl_spi2>; 493*acb4cd35SStefano Radaelli ti,pindir-d0-out-d1-in; 494*acb4cd35SStefano Radaelli cs-gpios = <&main_gpio1 13 GPIO_ACTIVE_HIGH>; 495*acb4cd35SStefano Radaelli status = "okay"; 496*acb4cd35SStefano Radaelli}; 497*acb4cd35SStefano Radaelli 498*acb4cd35SStefano Radaelli&main_uart0 { 499*acb4cd35SStefano Radaelli pinctrl-names = "default"; 500*acb4cd35SStefano Radaelli pinctrl-0 = <&pinctrl_uart0>; 501*acb4cd35SStefano Radaelli status = "okay"; 502*acb4cd35SStefano Radaelli}; 503*acb4cd35SStefano Radaelli 504*acb4cd35SStefano Radaelli&main_uart2 { 505*acb4cd35SStefano Radaelli pinctrl-names = "default"; 506*acb4cd35SStefano Radaelli pinctrl-0 = <&pinctrl_uart2>; 507*acb4cd35SStefano Radaelli status = "okay"; 508*acb4cd35SStefano Radaelli}; 509*acb4cd35SStefano Radaelli 510*acb4cd35SStefano Radaelli&main_uart6 { 511*acb4cd35SStefano Radaelli pinctrl-names = "default"; 512*acb4cd35SStefano Radaelli pinctrl-0 = <&pinctrl_uart6>; 513*acb4cd35SStefano Radaelli status = "okay"; 514*acb4cd35SStefano Radaelli}; 515*acb4cd35SStefano Radaelli 516*acb4cd35SStefano Radaelli&sdhci1 { 517*acb4cd35SStefano Radaelli /* SD Card */ 518*acb4cd35SStefano Radaelli vmmc-supply = <®_sdhc1_vmmc>; 519*acb4cd35SStefano Radaelli vqmmc-supply = <®_sdhc1_vqmmc>; 520*acb4cd35SStefano Radaelli pinctrl-names = "default"; 521*acb4cd35SStefano Radaelli pinctrl-0 = <&pinctrl_mmc1>; 522*acb4cd35SStefano Radaelli disable-wp; 523*acb4cd35SStefano Radaelli bootph-all; 524*acb4cd35SStefano Radaelli status = "okay"; 525*acb4cd35SStefano Radaelli}; 526*acb4cd35SStefano Radaelli 527*acb4cd35SStefano Radaelli&ti_csi2rx0 { 528*acb4cd35SStefano Radaelli status = "okay"; 529*acb4cd35SStefano Radaelli}; 530*acb4cd35SStefano Radaelli 531*acb4cd35SStefano Radaelli&usb0 { 532*acb4cd35SStefano Radaelli usb-role-switch; 533*acb4cd35SStefano Radaelli status = "okay"; 534*acb4cd35SStefano Radaelli 535*acb4cd35SStefano Radaelli port { 536*acb4cd35SStefano Radaelli typec_hs: endpoint { 537*acb4cd35SStefano Radaelli remote-endpoint = <&usb_con_hs>; 538*acb4cd35SStefano Radaelli }; 539*acb4cd35SStefano Radaelli }; 540*acb4cd35SStefano Radaelli}; 541*acb4cd35SStefano Radaelli 542*acb4cd35SStefano Radaelli&usb1 { 543*acb4cd35SStefano Radaelli dr_mode = "host"; 544*acb4cd35SStefano Radaelli pinctrl-names = "default"; 545*acb4cd35SStefano Radaelli pinctrl-0 = <&pinctrl_usb1>; 546*acb4cd35SStefano Radaelli status = "okay"; 547*acb4cd35SStefano Radaelli}; 548*acb4cd35SStefano Radaelli 549*acb4cd35SStefano Radaelli&usbss0 { 550*acb4cd35SStefano Radaelli status = "okay"; 551*acb4cd35SStefano Radaelli}; 552*acb4cd35SStefano Radaelli 553*acb4cd35SStefano Radaelli&usbss1 { 554*acb4cd35SStefano Radaelli status = "okay"; 555*acb4cd35SStefano Radaelli}; 556