17f950979SHsun Lai// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 27f950979SHsun Lai 37f950979SHsun Lai/dts-v1/; 47f950979SHsun Lai 57f950979SHsun Lai#include <dt-bindings/gpio/gpio.h> 67f950979SHsun Lai#include <dt-bindings/leds/common.h> 77f950979SHsun Lai#include <dt-bindings/pinctrl/rockchip.h> 87f950979SHsun Lai#include <dt-bindings/soc/rockchip,vop2.h> 97f950979SHsun Lai#include <dt-bindings/usb/pd.h> 107f950979SHsun Lai#include "rk3588s.dtsi" 117f950979SHsun Lai 127f950979SHsun Lai/ { 137f950979SHsun Lai model = "Firefly Station M3"; 147f950979SHsun Lai compatible = "firefly,rk3588s-roc-pc", "rockchip,rk3588s"; 157f950979SHsun Lai 167f950979SHsun Lai aliases { 177f950979SHsun Lai ethernet0 = &gmac1; 187f950979SHsun Lai mmc0 = &sdhci; 197f950979SHsun Lai mmc1 = &sdmmc; 207f950979SHsun Lai }; 217f950979SHsun Lai 227f950979SHsun Lai analog-sound { 237f950979SHsun Lai compatible = "simple-audio-card"; 247f950979SHsun Lai pinctrl-names = "default"; 257f950979SHsun Lai pinctrl-0 = <&hp_detect>; 267f950979SHsun Lai simple-audio-card,name = "rockchip,es8388"; 277f950979SHsun Lai simple-audio-card,bitclock-master = <&masterdai>; 287f950979SHsun Lai simple-audio-card,format = "i2s"; 297f950979SHsun Lai simple-audio-card,frame-master = <&masterdai>; 307f950979SHsun Lai simple-audio-card,hp-det-gpios = <&gpio1 RK_PA6 GPIO_ACTIVE_LOW>; 317f950979SHsun Lai simple-audio-card,mclk-fs = <256>; 327f950979SHsun Lai simple-audio-card,pin-switches = "Headphones"; 337f950979SHsun Lai simple-audio-card,routing = 347f950979SHsun Lai "Headphones", "LOUT1", 357f950979SHsun Lai "Headphones", "ROUT1", 367f950979SHsun Lai "LINPUT1", "Microphone Jack", 377f950979SHsun Lai "RINPUT1", "Microphone Jack", 387f950979SHsun Lai "LINPUT2", "Onboard Microphone", 397f950979SHsun Lai "RINPUT2", "Onboard Microphone"; 407f950979SHsun Lai simple-audio-card,widgets = 417f950979SHsun Lai "Microphone", "Microphone Jack", 427f950979SHsun Lai "Microphone", "Onboard Microphone", 437f950979SHsun Lai "Headphone", "Headphones"; 447f950979SHsun Lai 457f950979SHsun Lai masterdai: simple-audio-card,codec { 467f950979SHsun Lai sound-dai = <&es8388>; 477f950979SHsun Lai system-clock-frequency = <12288000>; 487f950979SHsun Lai }; 497f950979SHsun Lai 507f950979SHsun Lai simple-audio-card,cpu { 517f950979SHsun Lai sound-dai = <&i2s0_8ch>; 527f950979SHsun Lai }; 537f950979SHsun Lai }; 547f950979SHsun Lai 557f950979SHsun Lai chosen { 567f950979SHsun Lai stdout-path = "serial2:1500000n8"; 577f950979SHsun Lai }; 587f950979SHsun Lai 597f950979SHsun Lai hdmi-con { 607f950979SHsun Lai compatible = "hdmi-connector"; 617f950979SHsun Lai type = "a"; 627f950979SHsun Lai 637f950979SHsun Lai port { 647f950979SHsun Lai hdmi_con_in: endpoint { 657f950979SHsun Lai remote-endpoint = <&hdmi0_out_con>; 667f950979SHsun Lai }; 677f950979SHsun Lai }; 687f950979SHsun Lai }; 697f950979SHsun Lai 707f950979SHsun Lai fan: fan { 717f950979SHsun Lai compatible = "pwm-fan"; 727f950979SHsun Lai cooling-levels = <60 100 140 160 185 220 255>; 737f950979SHsun Lai fan-supply = <&vcc12v_dcin>; 747f950979SHsun Lai pwms = <&pwm11 0 50000 1>; 757f950979SHsun Lai #cooling-cells = <2>; 767f950979SHsun Lai }; 777f950979SHsun Lai 787f950979SHsun Lai leds { 797f950979SHsun Lai compatible = "gpio-leds"; 807f950979SHsun Lai pinctrl-names = "default"; 817f950979SHsun Lai pinctrl-0 = <&led_pins>; 827f950979SHsun Lai 837f950979SHsun Lai led-0 { 847f950979SHsun Lai color = <LED_COLOR_ID_GREEN>; 857f950979SHsun Lai default-state = "on"; 867f950979SHsun Lai function = LED_FUNCTION_POWER; 877f950979SHsun Lai gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>; 887f950979SHsun Lai }; 897f950979SHsun Lai 907f950979SHsun Lai led-1 { 917f950979SHsun Lai color = <LED_COLOR_ID_BLUE>; 927f950979SHsun Lai default-state = "off"; 937f950979SHsun Lai gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>; 947f950979SHsun Lai }; 957f950979SHsun Lai 967f950979SHsun Lai led-2 { 977f950979SHsun Lai color = <LED_COLOR_ID_RED>; 987f950979SHsun Lai default-state = "off"; 997f950979SHsun Lai gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>; 1007f950979SHsun Lai }; 1017f950979SHsun Lai }; 1027f950979SHsun Lai 1037f950979SHsun Lai vcc12v_dcin: regulator-vcc12v-dcin { 1047f950979SHsun Lai compatible = "regulator-fixed"; 1057f950979SHsun Lai regulator-name = "vcc12v_dcin"; 1067f950979SHsun Lai regulator-always-on; 1077f950979SHsun Lai regulator-boot-on; 1087f950979SHsun Lai regulator-min-microvolt = <12000000>; 1097f950979SHsun Lai regulator-max-microvolt = <12000000>; 1107f950979SHsun Lai }; 1117f950979SHsun Lai 1127f950979SHsun Lai vbus5v0_typec: regulator-vbus5v0-typec { 1137f950979SHsun Lai compatible = "regulator-fixed"; 1147f950979SHsun Lai enable-active-high; 1157f950979SHsun Lai gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; 1167f950979SHsun Lai pinctrl-names = "default"; 1177f950979SHsun Lai pinctrl-0 = <&typec5v_pwren>; 1187f950979SHsun Lai regulator-name = "vbus5v0_typec"; 1197f950979SHsun Lai regulator-min-microvolt = <5000000>; 1207f950979SHsun Lai regulator-max-microvolt = <5000000>; 1217f950979SHsun Lai vin-supply = <&vcc5v0_sys>; 1227f950979SHsun Lai }; 1237f950979SHsun Lai 1247f950979SHsun Lai vcc3v3_pcie20: regulator-vcc3v3-pcie20 { 1257f950979SHsun Lai compatible = "regulator-fixed"; 1267f950979SHsun Lai gpio = <&gpio1 RK_PD7 GPIO_ACTIVE_HIGH>; 1277f950979SHsun Lai regulator-name = "vcc3v3_pcie20"; 1287f950979SHsun Lai enable-active-high; 1297f950979SHsun Lai regulator-min-microvolt = <3300000>; 1307f950979SHsun Lai regulator-max-microvolt = <3300000>; 1317f950979SHsun Lai startup-delay-us = <5000>; 1327f950979SHsun Lai vin-supply = <&vcc12v_dcin>; 1337f950979SHsun Lai }; 1347f950979SHsun Lai 1357f950979SHsun Lai vcc5v0_host: regulator-vcc5v0-host { 1367f950979SHsun Lai compatible = "regulator-fixed"; 1377f950979SHsun Lai enable-active-high; 1387f950979SHsun Lai gpio = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>; 1397f950979SHsun Lai pinctrl-names = "default"; 1407f950979SHsun Lai pinctrl-0 = <&vcc5v0_host_en>; 1417f950979SHsun Lai regulator-name = "vcc5v0_host"; 1427f950979SHsun Lai regulator-min-microvolt = <5000000>; 1437f950979SHsun Lai regulator-max-microvolt = <5000000>; 1447f950979SHsun Lai vin-supply = <&vcc5v0_sys>; 1457f950979SHsun Lai }; 1467f950979SHsun Lai 1477f950979SHsun Lai vcc5v0_sys: regulator-vcc5v0-sys { 1487f950979SHsun Lai compatible = "regulator-fixed"; 1497f950979SHsun Lai regulator-name = "vcc5v0_sys"; 1507f950979SHsun Lai regulator-always-on; 1517f950979SHsun Lai regulator-boot-on; 1527f950979SHsun Lai regulator-min-microvolt = <5000000>; 1537f950979SHsun Lai regulator-max-microvolt = <5000000>; 1547f950979SHsun Lai vin-supply = <&vcc12v_dcin>; 1557f950979SHsun Lai }; 1567f950979SHsun Lai 1577f950979SHsun Lai vcc5v0_usb: regulator-vcc5v0-usb { 1587f950979SHsun Lai compatible = "regulator-fixed"; 1597f950979SHsun Lai regulator-name = "vcc5v0_usb"; 1607f950979SHsun Lai regulator-always-on; 1617f950979SHsun Lai regulator-boot-on; 1627f950979SHsun Lai regulator-min-microvolt = <5000000>; 1637f950979SHsun Lai regulator-max-microvolt = <5000000>; 1647f950979SHsun Lai vin-supply = <&vcc12v_dcin>; 1657f950979SHsun Lai }; 1667f950979SHsun Lai}; 1677f950979SHsun Lai 1687f950979SHsun Lai&combphy0_ps { 1697f950979SHsun Lai status = "okay"; 1707f950979SHsun Lai}; 1717f950979SHsun Lai 1727f950979SHsun Lai&combphy2_psu { 1737f950979SHsun Lai status = "okay"; 1747f950979SHsun Lai}; 1757f950979SHsun Lai 1767f950979SHsun Lai&cpu_b0 { 1777f950979SHsun Lai cpu-supply = <&vdd_cpu_big0_s0>; 1787f950979SHsun Lai}; 1797f950979SHsun Lai 1807f950979SHsun Lai&cpu_b1 { 1817f950979SHsun Lai cpu-supply = <&vdd_cpu_big0_s0>; 1827f950979SHsun Lai}; 1837f950979SHsun Lai 1847f950979SHsun Lai&cpu_b2 { 1857f950979SHsun Lai cpu-supply = <&vdd_cpu_big1_s0>; 1867f950979SHsun Lai}; 1877f950979SHsun Lai 1887f950979SHsun Lai&cpu_b3 { 1897f950979SHsun Lai cpu-supply = <&vdd_cpu_big1_s0>; 1907f950979SHsun Lai}; 1917f950979SHsun Lai 1927f950979SHsun Lai&cpu_l0 { 1937f950979SHsun Lai cpu-supply = <&vdd_cpu_lit_s0>; 1947f950979SHsun Lai}; 1957f950979SHsun Lai 1967f950979SHsun Lai&cpu_l1 { 1977f950979SHsun Lai cpu-supply = <&vdd_cpu_lit_s0>; 1987f950979SHsun Lai}; 1997f950979SHsun Lai 2007f950979SHsun Lai&cpu_l2 { 2017f950979SHsun Lai cpu-supply = <&vdd_cpu_lit_s0>; 2027f950979SHsun Lai}; 2037f950979SHsun Lai 2047f950979SHsun Lai&cpu_l3 { 2057f950979SHsun Lai cpu-supply = <&vdd_cpu_lit_s0>; 2067f950979SHsun Lai}; 2077f950979SHsun Lai 2087f950979SHsun Lai&gmac1 { 2097f950979SHsun Lai clock_in_out = "output"; 2107f950979SHsun Lai phy-handle = <&rgmii_phy1>; 2117f950979SHsun Lai phy-mode = "rgmii-id"; 2127f950979SHsun Lai pinctrl-names = "default"; 2137f950979SHsun Lai pinctrl-0 = <&gmac1_miim 2147f950979SHsun Lai &gmac1_tx_bus2 2157f950979SHsun Lai &gmac1_rx_bus2 2167f950979SHsun Lai &gmac1_rgmii_clk 2177f950979SHsun Lai &gmac1_rgmii_bus>; 2187f950979SHsun Lai status = "okay"; 2197f950979SHsun Lai}; 2207f950979SHsun Lai 2217f950979SHsun Lai&gpu { 2227f950979SHsun Lai mali-supply = <&vdd_gpu_s0>; 2237f950979SHsun Lai status = "okay"; 2247f950979SHsun Lai}; 2257f950979SHsun Lai 2267f950979SHsun Lai&hdmi0 { 2277f950979SHsun Lai status = "okay"; 2287f950979SHsun Lai}; 2297f950979SHsun Lai 2307f950979SHsun Lai&hdmi0_in { 2317f950979SHsun Lai hdmi0_in_vp0: endpoint { 2327f950979SHsun Lai remote-endpoint = <&vp0_out_hdmi0>; 2337f950979SHsun Lai }; 2347f950979SHsun Lai}; 2357f950979SHsun Lai 2367f950979SHsun Lai&hdmi0_out { 2377f950979SHsun Lai hdmi0_out_con: endpoint { 2387f950979SHsun Lai remote-endpoint = <&hdmi_con_in>; 2397f950979SHsun Lai }; 2407f950979SHsun Lai}; 2417f950979SHsun Lai 2427f950979SHsun Lai&hdptxphy0 { 2437f950979SHsun Lai status = "okay"; 2447f950979SHsun Lai}; 2457f950979SHsun Lai 2467f950979SHsun Lai&i2c0 { 2477f950979SHsun Lai pinctrl-names = "default"; 2487f950979SHsun Lai pinctrl-0 = <&i2c0m2_xfer>; 2497f950979SHsun Lai status = "okay"; 2507f950979SHsun Lai 2517f950979SHsun Lai vdd_cpu_big0_s0: regulator@42 { 2527f950979SHsun Lai compatible = "rockchip,rk8602"; 2537f950979SHsun Lai reg = <0x42>; 2547f950979SHsun Lai fcs,suspend-voltage-selector = <1>; 2557f950979SHsun Lai regulator-name = "vdd_cpu_big0_s0"; 2567f950979SHsun Lai regulator-always-on; 2577f950979SHsun Lai regulator-boot-on; 2587f950979SHsun Lai regulator-min-microvolt = <550000>; 2597f950979SHsun Lai regulator-max-microvolt = <1050000>; 2607f950979SHsun Lai regulator-ramp-delay = <2300>; 2617f950979SHsun Lai vin-supply = <&vcc5v0_sys>; 2627f950979SHsun Lai 2637f950979SHsun Lai regulator-state-mem { 2647f950979SHsun Lai regulator-off-in-suspend; 2657f950979SHsun Lai }; 2667f950979SHsun Lai }; 2677f950979SHsun Lai 2687f950979SHsun Lai vdd_cpu_big1_s0: regulator@43 { 2697f950979SHsun Lai compatible = "rockchip,rk8603", "rockchip,rk8602"; 2707f950979SHsun Lai reg = <0x43>; 2717f950979SHsun Lai fcs,suspend-voltage-selector = <1>; 2727f950979SHsun Lai regulator-name = "vdd_cpu_big1_s0"; 2737f950979SHsun Lai regulator-always-on; 2747f950979SHsun Lai regulator-boot-on; 2757f950979SHsun Lai regulator-min-microvolt = <550000>; 2767f950979SHsun Lai regulator-max-microvolt = <1050000>; 2777f950979SHsun Lai regulator-ramp-delay = <2300>; 2787f950979SHsun Lai vin-supply = <&vcc5v0_sys>; 2797f950979SHsun Lai 2807f950979SHsun Lai regulator-state-mem { 2817f950979SHsun Lai regulator-off-in-suspend; 2827f950979SHsun Lai }; 2837f950979SHsun Lai }; 2847f950979SHsun Lai}; 2857f950979SHsun Lai 2867f950979SHsun Lai&i2c2 { 2877f950979SHsun Lai pinctrl-names = "default"; 2887f950979SHsun Lai pinctrl-0 = <&i2c2m0_xfer>; 2897f950979SHsun Lai status = "okay"; 2907f950979SHsun Lai 2917f950979SHsun Lai vdd_npu_s0: regulator@42 { 2927f950979SHsun Lai compatible = "rockchip,rk8602"; 2937f950979SHsun Lai reg = <0x42>; 2947f950979SHsun Lai fcs,suspend-voltage-selector = <1>; 2957f950979SHsun Lai regulator-name = "vdd_npu_s0"; 2967f950979SHsun Lai regulator-always-on; 2977f950979SHsun Lai regulator-boot-on; 2987f950979SHsun Lai regulator-min-microvolt = <550000>; 2997f950979SHsun Lai regulator-max-microvolt = <950000>; 3007f950979SHsun Lai regulator-ramp-delay = <2300>; 3017f950979SHsun Lai vin-supply = <&vcc5v0_sys>; 3027f950979SHsun Lai 3037f950979SHsun Lai regulator-state-mem { 3047f950979SHsun Lai regulator-off-in-suspend; 3057f950979SHsun Lai }; 3067f950979SHsun Lai }; 3077f950979SHsun Lai 3087f950979SHsun Lai hym8563: rtc@51 { 3097f950979SHsun Lai compatible = "haoyu,hym8563"; 3107f950979SHsun Lai reg = <0x51>; 3117f950979SHsun Lai #clock-cells = <0>; 3127f950979SHsun Lai clock-output-names = "hym8563"; 3137f950979SHsun Lai interrupt-parent = <&gpio0>; 3147f950979SHsun Lai interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>; 3157f950979SHsun Lai pinctrl-names = "default"; 3167f950979SHsun Lai pinctrl-0 = <&hym8563_int>; 3177f950979SHsun Lai }; 3187f950979SHsun Lai}; 3197f950979SHsun Lai 3207f950979SHsun Lai&i2c3 { 3217f950979SHsun Lai status = "okay"; 3227f950979SHsun Lai 323*4138adfdSKaison Deng es8388: audio-codec@11 { 3247f950979SHsun Lai compatible = "everest,es8388", "everest,es8328"; 325*4138adfdSKaison Deng reg = <0x11>; 3267f950979SHsun Lai clocks = <&cru I2S1_8CH_MCLKOUT>; 3277f950979SHsun Lai AVDD-supply = <&vcc_3v3_s0>; 3287f950979SHsun Lai DVDD-supply = <&vcc_1v8_s0>; 3297f950979SHsun Lai HPVDD-supply = <&vcc_3v3_s0>; 3307f950979SHsun Lai PVDD-supply = <&vcc_3v3_s0>; 3317f950979SHsun Lai assigned-clocks = <&cru I2S1_8CH_MCLKOUT>; 3327f950979SHsun Lai assigned-clock-rates = <12288000>; 3337f950979SHsun Lai #sound-dai-cells = <0>; 3347f950979SHsun Lai }; 3357f950979SHsun Lai}; 3367f950979SHsun Lai 3377f950979SHsun Lai&i2s0_8ch { 3387f950979SHsun Lai pinctrl-names = "default"; 3397f950979SHsun Lai pinctrl-0 = <&i2s0_lrck 3407f950979SHsun Lai &i2s0_mclk 3417f950979SHsun Lai &i2s0_sclk 3427f950979SHsun Lai &i2s0_sdi0 3437f950979SHsun Lai &i2s0_sdo0>; 3447f950979SHsun Lai status = "okay"; 3457f950979SHsun Lai}; 3467f950979SHsun Lai 3477f950979SHsun Lai&mdio1 { 3487f950979SHsun Lai rgmii_phy1: ethernet-phy@1 { 3497f950979SHsun Lai compatible = "ethernet-phy-ieee802.3-c22"; 3507f950979SHsun Lai reg = <0x1>; 3517f950979SHsun Lai pinctrl-names = "default"; 3527f950979SHsun Lai pinctrl-0 = <&rtl8211f_rst>; 3537f950979SHsun Lai reset-assert-us = <20000>; 3547f950979SHsun Lai reset-deassert-us = <100000>; 3557f950979SHsun Lai reset-gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_LOW>; 3567f950979SHsun Lai }; 3577f950979SHsun Lai}; 3587f950979SHsun Lai 3597f950979SHsun Lai&pcie2x1l1 { 3607f950979SHsun Lai reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>; 3617f950979SHsun Lai vpcie3v3-supply = <&vcc3v3_pcie20>; 3627f950979SHsun Lai status = "okay"; 3637f950979SHsun Lai}; 3647f950979SHsun Lai 3657f950979SHsun Lai&pd_gpu { 3667f950979SHsun Lai domain-supply = <&vdd_gpu_s0>; 3677f950979SHsun Lai}; 3687f950979SHsun Lai 3697f950979SHsun Lai&pinctrl { 3707f950979SHsun Lai hym8563 { 3717f950979SHsun Lai hym8563_int: hym8563-int { 3727f950979SHsun Lai rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; 3737f950979SHsun Lai }; 3747f950979SHsun Lai }; 3757f950979SHsun Lai 3767f950979SHsun Lai headphone { 3777f950979SHsun Lai hp_detect: hp-detect { 3787f950979SHsun Lai rockchip,pins = <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; 3797f950979SHsun Lai }; 3807f950979SHsun Lai }; 3817f950979SHsun Lai 3827f950979SHsun Lai leds { 3837f950979SHsun Lai led_pins: led-pins { 3847f950979SHsun Lai rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>, 3857f950979SHsun Lai <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>, 3867f950979SHsun Lai <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; 3877f950979SHsun Lai }; 3887f950979SHsun Lai }; 3897f950979SHsun Lai 3907f950979SHsun Lai rtl8211 { 3917f950979SHsun Lai rtl8211f_rst: rtl8211f-rst { 3927f950979SHsun Lai rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; 3937f950979SHsun Lai }; 3947f950979SHsun Lai }; 3957f950979SHsun Lai 3967f950979SHsun Lai usb { 3977f950979SHsun Lai typec5v_pwren: typec5v-pwren { 3987f950979SHsun Lai rockchip,pins = <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; 3997f950979SHsun Lai }; 4007f950979SHsun Lai 4017f950979SHsun Lai vcc5v0_host_en: vcc5v0-host-en { 4027f950979SHsun Lai rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; 4037f950979SHsun Lai }; 4047f950979SHsun Lai }; 4057f950979SHsun Lai}; 4067f950979SHsun Lai 4077f950979SHsun Lai&pwm11 { 4087f950979SHsun Lai pinctrl-names = "default"; 4097f950979SHsun Lai pinctrl-0 = <&pwm11m3_pins>; 4107f950979SHsun Lai status = "okay"; 4117f950979SHsun Lai}; 4127f950979SHsun Lai 4137f950979SHsun Lai&saradc { 4147f950979SHsun Lai vref-supply = <&vcc_1v8_s0>; 4157f950979SHsun Lai status = "okay"; 4167f950979SHsun Lai}; 4177f950979SHsun Lai 4187f950979SHsun Lai&sdhci { 4197f950979SHsun Lai bus-width = <8>; 4207f950979SHsun Lai mmc-hs400-1_8v; 4217f950979SHsun Lai mmc-hs400-enhanced-strobe; 4227f950979SHsun Lai no-sdio; 4237f950979SHsun Lai no-sd; 4247f950979SHsun Lai non-removable; 4257f950979SHsun Lai status = "okay"; 4267f950979SHsun Lai}; 4277f950979SHsun Lai 4287f950979SHsun Lai&sdmmc { 4297f950979SHsun Lai bus-width = <4>; 4307f950979SHsun Lai cap-sd-highspeed; 4317f950979SHsun Lai disable-wp; 4327f950979SHsun Lai max-frequency = <150000000>; 4337f950979SHsun Lai no-sdio; 4347f950979SHsun Lai no-mmc; 4357f950979SHsun Lai sd-uhs-sdr104; 4367f950979SHsun Lai vmmc-supply = <&vcc_3v3_s3>; 4377f950979SHsun Lai vqmmc-supply = <&vccio_sd_s0>; 4387f950979SHsun Lai status = "okay"; 4397f950979SHsun Lai}; 4407f950979SHsun Lai 4417f950979SHsun Lai&spi2 { 4427f950979SHsun Lai assigned-clocks = <&cru CLK_SPI2>; 4437f950979SHsun Lai assigned-clock-rates = <200000000>; 4447f950979SHsun Lai num-cs = <1>; 4457f950979SHsun Lai pinctrl-names = "default"; 4467f950979SHsun Lai pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; 4477f950979SHsun Lai status = "okay"; 4487f950979SHsun Lai 4497f950979SHsun Lai pmic@0 { 4507f950979SHsun Lai compatible = "rockchip,rk806"; 4517f950979SHsun Lai reg = <0x0>; 4527f950979SHsun Lai interrupt-parent = <&gpio0>; 4537f950979SHsun Lai interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 4547f950979SHsun Lai pinctrl-names = "default"; 4557f950979SHsun Lai pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, 4567f950979SHsun Lai <&rk806_dvs2_null>, <&rk806_dvs3_null>; 4577f950979SHsun Lai spi-max-frequency = <1000000>; 4587f950979SHsun Lai system-power-controller; 4597f950979SHsun Lai 4607f950979SHsun Lai vcc1-supply = <&vcc5v0_sys>; 4617f950979SHsun Lai vcc2-supply = <&vcc5v0_sys>; 4627f950979SHsun Lai vcc3-supply = <&vcc5v0_sys>; 4637f950979SHsun Lai vcc4-supply = <&vcc5v0_sys>; 4647f950979SHsun Lai vcc5-supply = <&vcc5v0_sys>; 4657f950979SHsun Lai vcc6-supply = <&vcc5v0_sys>; 4667f950979SHsun Lai vcc7-supply = <&vcc5v0_sys>; 4677f950979SHsun Lai vcc8-supply = <&vcc5v0_sys>; 4687f950979SHsun Lai vcc9-supply = <&vcc5v0_sys>; 4697f950979SHsun Lai vcc10-supply = <&vcc5v0_sys>; 4707f950979SHsun Lai vcc11-supply = <&vcc_2v0_pldo_s3>; 4717f950979SHsun Lai vcc12-supply = <&vcc5v0_sys>; 4727f950979SHsun Lai vcc13-supply = <&vcc_1v1_nldo_s3>; 4737f950979SHsun Lai vcc14-supply = <&vcc_1v1_nldo_s3>; 4747f950979SHsun Lai vcca-supply = <&vcc5v0_sys>; 4757f950979SHsun Lai 4767f950979SHsun Lai gpio-controller; 4777f950979SHsun Lai #gpio-cells = <2>; 4787f950979SHsun Lai 4797f950979SHsun Lai rk806_dvs1_null: dvs1-null-pins { 4807f950979SHsun Lai pins = "gpio_pwrctrl1"; 4817f950979SHsun Lai function = "pin_fun0"; 4827f950979SHsun Lai }; 4837f950979SHsun Lai 4847f950979SHsun Lai rk806_dvs2_null: dvs2-null-pins { 4857f950979SHsun Lai pins = "gpio_pwrctrl2"; 4867f950979SHsun Lai function = "pin_fun0"; 4877f950979SHsun Lai }; 4887f950979SHsun Lai 4897f950979SHsun Lai rk806_dvs3_null: dvs3-null-pins { 4907f950979SHsun Lai pins = "gpio_pwrctrl3"; 4917f950979SHsun Lai function = "pin_fun0"; 4927f950979SHsun Lai }; 4937f950979SHsun Lai 4947f950979SHsun Lai regulators { 4957f950979SHsun Lai vdd_gpu_s0: dcdc-reg1 { 4967f950979SHsun Lai regulator-name = "vdd_gpu_s0"; 4977f950979SHsun Lai regulator-boot-on; 4987f950979SHsun Lai regulator-min-microvolt = <550000>; 4997f950979SHsun Lai regulator-max-microvolt = <950000>; 5007f950979SHsun Lai regulator-ramp-delay = <12500>; 5017f950979SHsun Lai regulator-enable-ramp-delay = <400>; 5027f950979SHsun Lai 5037f950979SHsun Lai regulator-state-mem { 5047f950979SHsun Lai regulator-off-in-suspend; 5057f950979SHsun Lai }; 5067f950979SHsun Lai }; 5077f950979SHsun Lai 5087f950979SHsun Lai vdd_cpu_lit_s0: dcdc-reg2 { 5097f950979SHsun Lai regulator-name = "vdd_cpu_lit_s0"; 5107f950979SHsun Lai regulator-always-on; 5117f950979SHsun Lai regulator-boot-on; 5127f950979SHsun Lai regulator-min-microvolt = <550000>; 5137f950979SHsun Lai regulator-max-microvolt = <950000>; 5147f950979SHsun Lai regulator-ramp-delay = <12500>; 5157f950979SHsun Lai 5167f950979SHsun Lai regulator-state-mem { 5177f950979SHsun Lai regulator-off-in-suspend; 5187f950979SHsun Lai }; 5197f950979SHsun Lai }; 5207f950979SHsun Lai 5217f950979SHsun Lai vdd_log_s0: dcdc-reg3 { 5227f950979SHsun Lai regulator-name = "vdd_log_s0"; 5237f950979SHsun Lai regulator-always-on; 5247f950979SHsun Lai regulator-boot-on; 5257f950979SHsun Lai regulator-min-microvolt = <675000>; 5267f950979SHsun Lai regulator-max-microvolt = <750000>; 5277f950979SHsun Lai regulator-ramp-delay = <12500>; 5287f950979SHsun Lai 5297f950979SHsun Lai regulator-state-mem { 5307f950979SHsun Lai regulator-off-in-suspend; 5317f950979SHsun Lai regulator-suspend-microvolt = <750000>; 5327f950979SHsun Lai }; 5337f950979SHsun Lai }; 5347f950979SHsun Lai 5357f950979SHsun Lai vdd_vdenc_s0: dcdc-reg4 { 5367f950979SHsun Lai regulator-name = "vdd_vdenc_s0"; 5377f950979SHsun Lai regulator-always-on; 5387f950979SHsun Lai regulator-boot-on; 5397f950979SHsun Lai regulator-min-microvolt = <550000>; 5407f950979SHsun Lai regulator-max-microvolt = <950000>; 5417f950979SHsun Lai regulator-ramp-delay = <12500>; 5427f950979SHsun Lai 5437f950979SHsun Lai regulator-state-mem { 5447f950979SHsun Lai regulator-off-in-suspend; 5457f950979SHsun Lai }; 5467f950979SHsun Lai }; 5477f950979SHsun Lai 5487f950979SHsun Lai vdd_ddr_s0: dcdc-reg5 { 5497f950979SHsun Lai regulator-name = "vdd_ddr_s0"; 5507f950979SHsun Lai regulator-always-on; 5517f950979SHsun Lai regulator-boot-on; 5527f950979SHsun Lai regulator-min-microvolt = <675000>; 5537f950979SHsun Lai regulator-max-microvolt = <900000>; 5547f950979SHsun Lai regulator-ramp-delay = <12500>; 5557f950979SHsun Lai 5567f950979SHsun Lai regulator-state-mem { 5577f950979SHsun Lai regulator-off-in-suspend; 5587f950979SHsun Lai regulator-suspend-microvolt = <850000>; 5597f950979SHsun Lai }; 5607f950979SHsun Lai }; 5617f950979SHsun Lai 5627f950979SHsun Lai vcc_1v1_nldo_s3: vdd2_ddr_s3: dcdc-reg6 { 5637f950979SHsun Lai regulator-name = "vdd2_ddr_s3"; 5647f950979SHsun Lai regulator-always-on; 5657f950979SHsun Lai regulator-boot-on; 5667f950979SHsun Lai regulator-max-microvolt = <1100000>; 5677f950979SHsun Lai regulator-min-microvolt = <1100000>; 5687f950979SHsun Lai 5697f950979SHsun Lai regulator-state-mem { 5707f950979SHsun Lai regulator-on-in-suspend; 5717f950979SHsun Lai }; 5727f950979SHsun Lai }; 5737f950979SHsun Lai 5747f950979SHsun Lai vcc_2v0_pldo_s3: dcdc-reg7 { 5757f950979SHsun Lai regulator-name = "vdd_2v0_pldo_s3"; 5767f950979SHsun Lai regulator-always-on; 5777f950979SHsun Lai regulator-boot-on; 5787f950979SHsun Lai regulator-min-microvolt = <2000000>; 5797f950979SHsun Lai regulator-max-microvolt = <2000000>; 5807f950979SHsun Lai regulator-ramp-delay = <12500>; 5817f950979SHsun Lai 5827f950979SHsun Lai regulator-state-mem { 5837f950979SHsun Lai regulator-on-in-suspend; 5847f950979SHsun Lai regulator-suspend-microvolt = <2000000>; 5857f950979SHsun Lai }; 5867f950979SHsun Lai }; 5877f950979SHsun Lai 5887f950979SHsun Lai vcc_3v3_s3: dcdc-reg8 { 5897f950979SHsun Lai regulator-name = "vcc_3v3_s3"; 5907f950979SHsun Lai regulator-always-on; 5917f950979SHsun Lai regulator-boot-on; 5927f950979SHsun Lai regulator-min-microvolt = <3300000>; 5937f950979SHsun Lai regulator-max-microvolt = <3300000>; 5947f950979SHsun Lai 5957f950979SHsun Lai regulator-state-mem { 5967f950979SHsun Lai regulator-on-in-suspend; 5977f950979SHsun Lai regulator-suspend-microvolt = <3300000>; 5987f950979SHsun Lai }; 5997f950979SHsun Lai }; 6007f950979SHsun Lai 6017f950979SHsun Lai vddq_ddr_s0: dcdc-reg9 { 6027f950979SHsun Lai regulator-name = "vddq_ddr_s0"; 6037f950979SHsun Lai regulator-always-on; 6047f950979SHsun Lai regulator-boot-on; 6057f950979SHsun Lai 6067f950979SHsun Lai regulator-state-mem { 6077f950979SHsun Lai regulator-off-in-suspend; 6087f950979SHsun Lai }; 6097f950979SHsun Lai }; 6107f950979SHsun Lai 6117f950979SHsun Lai vcc_1v8_s3: dcdc-reg10 { 6127f950979SHsun Lai regulator-name = "vcc_1v8_s3"; 6137f950979SHsun Lai regulator-always-on; 6147f950979SHsun Lai regulator-boot-on; 6157f950979SHsun Lai regulator-min-microvolt = <1800000>; 6167f950979SHsun Lai regulator-max-microvolt = <1800000>; 6177f950979SHsun Lai 6187f950979SHsun Lai regulator-state-mem { 6197f950979SHsun Lai regulator-on-in-suspend; 6207f950979SHsun Lai regulator-suspend-microvolt = <1800000>; 6217f950979SHsun Lai }; 6227f950979SHsun Lai }; 6237f950979SHsun Lai 6247f950979SHsun Lai avcc_1v8_s0: pldo-reg1 { 6257f950979SHsun Lai regulator-name = "avcc_1v8_s0"; 6267f950979SHsun Lai regulator-always-on; 6277f950979SHsun Lai regulator-boot-on; 6287f950979SHsun Lai regulator-min-microvolt = <1800000>; 6297f950979SHsun Lai regulator-max-microvolt = <1800000>; 6307f950979SHsun Lai 6317f950979SHsun Lai regulator-state-mem { 6327f950979SHsun Lai regulator-off-in-suspend; 6337f950979SHsun Lai }; 6347f950979SHsun Lai }; 6357f950979SHsun Lai 6367f950979SHsun Lai vcc_1v8_s0: pldo-reg2 { 6377f950979SHsun Lai regulator-name = "vcc_1v8_s0"; 6387f950979SHsun Lai regulator-always-on; 6397f950979SHsun Lai regulator-boot-on; 6407f950979SHsun Lai regulator-min-microvolt = <1800000>; 6417f950979SHsun Lai regulator-max-microvolt = <1800000>; 6427f950979SHsun Lai 6437f950979SHsun Lai regulator-state-mem { 6447f950979SHsun Lai regulator-off-in-suspend; 6457f950979SHsun Lai regulator-suspend-microvolt = <1800000>; 6467f950979SHsun Lai }; 6477f950979SHsun Lai }; 6487f950979SHsun Lai 6497f950979SHsun Lai avdd_1v2_s0: pldo-reg3 { 6507f950979SHsun Lai regulator-name = "avdd_1v2_s0"; 6517f950979SHsun Lai regulator-always-on; 6527f950979SHsun Lai regulator-boot-on; 6537f950979SHsun Lai regulator-min-microvolt = <1200000>; 6547f950979SHsun Lai regulator-max-microvolt = <1200000>; 6557f950979SHsun Lai 6567f950979SHsun Lai regulator-state-mem { 6577f950979SHsun Lai regulator-off-in-suspend; 6587f950979SHsun Lai }; 6597f950979SHsun Lai }; 6607f950979SHsun Lai 6617f950979SHsun Lai vcc_3v3_s0: pldo-reg4 { 6627f950979SHsun Lai regulator-name = "vcc_3v3_s0"; 6637f950979SHsun Lai regulator-always-on; 6647f950979SHsun Lai regulator-boot-on; 6657f950979SHsun Lai regulator-min-microvolt = <3300000>; 6667f950979SHsun Lai regulator-max-microvolt = <3300000>; 6677f950979SHsun Lai regulator-ramp-delay = <12500>; 6687f950979SHsun Lai 6697f950979SHsun Lai regulator-state-mem { 6707f950979SHsun Lai regulator-off-in-suspend; 6717f950979SHsun Lai }; 6727f950979SHsun Lai }; 6737f950979SHsun Lai 6747f950979SHsun Lai vccio_sd_s0: pldo-reg5 { 6757f950979SHsun Lai regulator-name = "vccio_sd_s0"; 6767f950979SHsun Lai regulator-always-on; 6777f950979SHsun Lai regulator-boot-on; 6787f950979SHsun Lai regulator-min-microvolt = <1800000>; 6797f950979SHsun Lai regulator-max-microvolt = <3300000>; 6807f950979SHsun Lai regulator-ramp-delay = <12500>; 6817f950979SHsun Lai 6827f950979SHsun Lai regulator-state-mem { 6837f950979SHsun Lai regulator-off-in-suspend; 6847f950979SHsun Lai }; 6857f950979SHsun Lai }; 6867f950979SHsun Lai 6877f950979SHsun Lai pldo6_s3: pldo-reg6 { 6887f950979SHsun Lai regulator-name = "pldo6_s3"; 6897f950979SHsun Lai regulator-always-on; 6907f950979SHsun Lai regulator-boot-on; 6917f950979SHsun Lai regulator-min-microvolt = <1800000>; 6927f950979SHsun Lai regulator-max-microvolt = <1800000>; 6937f950979SHsun Lai 6947f950979SHsun Lai regulator-state-mem { 6957f950979SHsun Lai regulator-on-in-suspend; 6967f950979SHsun Lai regulator-suspend-microvolt = <1800000>; 6977f950979SHsun Lai }; 6987f950979SHsun Lai }; 6997f950979SHsun Lai 7007f950979SHsun Lai vdd_0v75_s3: nldo-reg1 { 7017f950979SHsun Lai regulator-name = "vdd_0v75_s3"; 7027f950979SHsun Lai regulator-always-on; 7037f950979SHsun Lai regulator-boot-on; 7047f950979SHsun Lai regulator-min-microvolt = <750000>; 7057f950979SHsun Lai regulator-max-microvolt = <750000>; 7067f950979SHsun Lai 7077f950979SHsun Lai regulator-state-mem { 7087f950979SHsun Lai regulator-on-in-suspend; 7097f950979SHsun Lai regulator-suspend-microvolt = <750000>; 7107f950979SHsun Lai }; 7117f950979SHsun Lai }; 7127f950979SHsun Lai 7137f950979SHsun Lai vdd_ddr_pll_s0: nldo-reg2 { 7147f950979SHsun Lai regulator-name = "vdd_ddr_pll_s0"; 7157f950979SHsun Lai regulator-always-on; 7167f950979SHsun Lai regulator-boot-on; 7177f950979SHsun Lai regulator-min-microvolt = <850000>; 7187f950979SHsun Lai regulator-max-microvolt = <850000>; 7197f950979SHsun Lai 7207f950979SHsun Lai regulator-state-mem { 7217f950979SHsun Lai regulator-off-in-suspend; 7227f950979SHsun Lai regulator-suspend-microvolt = <850000>; 7237f950979SHsun Lai }; 7247f950979SHsun Lai }; 7257f950979SHsun Lai 7267f950979SHsun Lai avdd_0v75_s0: nldo-reg3 { 7277f950979SHsun Lai regulator-name = "avdd_0v75_s0"; 7287f950979SHsun Lai regulator-always-on; 7297f950979SHsun Lai regulator-boot-on; 7307f950979SHsun Lai regulator-min-microvolt = <750000>; 7317f950979SHsun Lai regulator-max-microvolt = <750000>; 7327f950979SHsun Lai 7337f950979SHsun Lai regulator-state-mem { 7347f950979SHsun Lai regulator-off-in-suspend; 7357f950979SHsun Lai }; 7367f950979SHsun Lai }; 7377f950979SHsun Lai 7387f950979SHsun Lai vdd_0v85_s0: nldo-reg4 { 7397f950979SHsun Lai regulator-name = "vdd_0v85_s0"; 7407f950979SHsun Lai regulator-always-on; 7417f950979SHsun Lai regulator-boot-on; 7427f950979SHsun Lai regulator-min-microvolt = <850000>; 7437f950979SHsun Lai regulator-max-microvolt = <850000>; 7447f950979SHsun Lai 7457f950979SHsun Lai regulator-state-mem { 7467f950979SHsun Lai regulator-off-in-suspend; 7477f950979SHsun Lai }; 7487f950979SHsun Lai }; 7497f950979SHsun Lai 7507f950979SHsun Lai vdd_0v75_s0: nldo-reg5 { 7517f950979SHsun Lai regulator-name = "vdd_0v75_s0"; 7527f950979SHsun Lai regulator-always-on; 7537f950979SHsun Lai regulator-boot-on; 7547f950979SHsun Lai regulator-min-microvolt = <750000>; 7557f950979SHsun Lai regulator-max-microvolt = <750000>; 7567f950979SHsun Lai 7577f950979SHsun Lai regulator-state-mem { 7587f950979SHsun Lai regulator-off-in-suspend; 7597f950979SHsun Lai }; 7607f950979SHsun Lai }; 7617f950979SHsun Lai }; 7627f950979SHsun Lai }; 7637f950979SHsun Lai}; 7647f950979SHsun Lai 7657f950979SHsun Lai&tsadc { 7667f950979SHsun Lai status = "okay"; 7677f950979SHsun Lai}; 7687f950979SHsun Lai 7697f950979SHsun Lai&u2phy0 { 7707f950979SHsun Lai status = "okay"; 7717f950979SHsun Lai}; 7727f950979SHsun Lai 7737f950979SHsun Lai&u2phy0_otg { 7747f950979SHsun Lai status = "okay"; 7757f950979SHsun Lai}; 7767f950979SHsun Lai 7777f950979SHsun Lai&u2phy2 { 7787f950979SHsun Lai status = "okay"; 7797f950979SHsun Lai}; 7807f950979SHsun Lai 7817f950979SHsun Lai&u2phy3 { 7827f950979SHsun Lai status = "okay"; 7837f950979SHsun Lai}; 7847f950979SHsun Lai 7857f950979SHsun Lai&u2phy2_host { 7867f950979SHsun Lai phy-supply = <&vcc5v0_host>; 7877f950979SHsun Lai status = "okay"; 7887f950979SHsun Lai}; 7897f950979SHsun Lai 7907f950979SHsun Lai&u2phy3_host { 7917f950979SHsun Lai phy-supply = <&vcc5v0_host>; 7927f950979SHsun Lai status = "okay"; 7937f950979SHsun Lai}; 7947f950979SHsun Lai 7957f950979SHsun Lai&uart2 { 7967f950979SHsun Lai pinctrl-names = "default"; 7977f950979SHsun Lai pinctrl-0 = <&uart2m0_xfer>; 7987f950979SHsun Lai status = "okay"; 7997f950979SHsun Lai}; 8007f950979SHsun Lai 8017f950979SHsun Lai&uart7 { 8027f950979SHsun Lai pinctrl-0 = <&uart7m2_xfer>; 8037f950979SHsun Lai status = "okay"; 8047f950979SHsun Lai}; 8057f950979SHsun Lai 8067f950979SHsun Lai&usb_host0_ehci { 8077f950979SHsun Lai status = "okay"; 8087f950979SHsun Lai}; 8097f950979SHsun Lai 8107f950979SHsun Lai&usb_host0_ohci { 8117f950979SHsun Lai status = "okay"; 8127f950979SHsun Lai}; 8137f950979SHsun Lai 8147f950979SHsun Lai&usb_host0_xhci { 8157f950979SHsun Lai extcon = <&u2phy0>; 8167f950979SHsun Lai status = "okay"; 8177f950979SHsun Lai}; 8187f950979SHsun Lai 8197f950979SHsun Lai&usb_host1_ehci { 8207f950979SHsun Lai status = "okay"; 8217f950979SHsun Lai}; 8227f950979SHsun Lai 8237f950979SHsun Lai&usb_host1_ohci { 8247f950979SHsun Lai status = "okay"; 8257f950979SHsun Lai}; 8267f950979SHsun Lai 8277f950979SHsun Lai&vop { 8287f950979SHsun Lai status = "okay"; 8297f950979SHsun Lai}; 8307f950979SHsun Lai 8317f950979SHsun Lai&vop_mmu { 8327f950979SHsun Lai status = "okay"; 8337f950979SHsun Lai}; 8347f950979SHsun Lai 8357f950979SHsun Lai&vp0 { 8367f950979SHsun Lai vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { 8377f950979SHsun Lai reg = <ROCKCHIP_VOP2_EP_HDMI0>; 8387f950979SHsun Lai remote-endpoint = <&hdmi0_in_vp0>; 8397f950979SHsun Lai }; 8407f950979SHsun Lai}; 841