151712e1dSChukun Pan// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 251712e1dSChukun Pan/* 351712e1dSChukun Pan * Based on rk3328-nanopi-r2s.dts, which is: 451712e1dSChukun Pan * Copyright (c) 2020 David Bauer <mail@david-bauer.net> 551712e1dSChukun Pan */ 651712e1dSChukun Pan 751712e1dSChukun Pan/dts-v1/; 851712e1dSChukun Pan 9f3c6526dSDragan Simic#include "rk3328-orangepi-r1-plus.dtsi" 1051712e1dSChukun Pan 1151712e1dSChukun Pan/ { 1251712e1dSChukun Pan model = "Xunlong Orange Pi R1 Plus"; 1351712e1dSChukun Pan compatible = "xunlong,orangepi-r1-plus", "rockchip,rk3328"; 1451712e1dSChukun Pan}; 1551712e1dSChukun Pan 1651712e1dSChukun Pan&gmac2io { 1751712e1dSChukun Pan phy-handle = <&rtl8211e>; 18*a6a7cba1STianling Shen phy-mode = "rgmii"; 1951712e1dSChukun Pan tx_delay = <0x24>; 20f3c6526dSDragan Simic rx_delay = <0x18>; 2151712e1dSChukun Pan status = "okay"; 2251712e1dSChukun Pan 2351712e1dSChukun Pan mdio { 2451712e1dSChukun Pan rtl8211e: ethernet-phy@1 { 2551712e1dSChukun Pan reg = <1>; 2651712e1dSChukun Pan pinctrl-0 = <ð_phy_reset_pin>; 2751712e1dSChukun Pan pinctrl-names = "default"; 2851712e1dSChukun Pan reset-assert-us = <10000>; 2951712e1dSChukun Pan reset-deassert-us = <50000>; 3051712e1dSChukun Pan reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; 3151712e1dSChukun Pan }; 3251712e1dSChukun Pan }; 3351712e1dSChukun Pan}; 34