xref: /linux/scripts/dtc/include-prefixes/arm64/renesas/ulcb-kf.dtsi (revision d151e4e5447b96ad52d2efb2b3725e500fcfdda6) 
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the Kingfisher (ULCB extension) board
4 *
5 * Copyright (C) 2017 Renesas Electronics Corp.
6 * Copyright (C) 2017 Cogent Embedded, Inc.
7 */
8
9/ {
10	aliases {
11		serial1 = &hscif0;
12		serial2 = &scif1;
13		serial3 = &hscif1;
14		mmc2 = &sdhi3;
15	};
16
17	clksndsel: clksndsel {
18		#clock-cells = <0>;
19		compatible = "gpio-mux-clock";
20		clocks = <&cs2000>, <&audio_clk_a>; /* clk8snd, clksnd */
21		select-gpios = <&gpio_exp_75 13 GPIO_ACTIVE_HIGH>;
22	};
23
24	hdmi1-out {
25		compatible = "hdmi-connector";
26		type = "a";
27
28		port {
29			hdmi1_con: endpoint {
30				remote-endpoint = <&adv7513_out>;
31			};
32		};
33	};
34
35	hdmi_1v8: regulator-hdmi-1v8 {
36		compatible = "regulator-fixed";
37		regulator-name = "hdmi-1v8";
38		regulator-min-microvolt = <1800000>;
39		regulator-max-microvolt = <1800000>;
40	};
41
42	pcie_1v5: regulator-pcie-1v5 {
43		compatible = "regulator-fixed";
44		regulator-name = "pcie-1v5";
45		regulator-min-microvolt = <1500000>;
46		regulator-max-microvolt = <1500000>;
47		gpio = <&gpio_exp_77 15 GPIO_ACTIVE_HIGH>;
48		enable-active-high;
49	};
50
51	pcie_3v3: regulator-pcie-3v3 {
52		compatible = "regulator-fixed";
53		regulator-name = "pcie-3v3";
54		regulator-min-microvolt = <3300000>;
55		regulator-max-microvolt = <3300000>;
56		gpio = <&gpio_exp_77 14 GPIO_ACTIVE_HIGH>;
57		enable-active-high;
58	};
59
60	snd_vcc5v: regulator-snd_vcc5v {
61		compatible = "regulator-fixed";
62		regulator-name = "snd-vcc5v";
63		regulator-min-microvolt = <5000000>;
64		regulator-max-microvolt = <5000000>;
65	};
66
67	wlan_en: regulator-wlan_en {
68		compatible = "regulator-fixed";
69		regulator-name = "wlan-en-regulator";
70
71		regulator-min-microvolt = <3300000>;
72		regulator-max-microvolt = <3300000>;
73
74		gpio = <&gpio_exp_74 4 GPIO_ACTIVE_HIGH>;
75		startup-delay-us = <70000>;
76		enable-active-high;
77	};
78};
79
80&can0 {
81	pinctrl-0 = <&can0_pins>;
82	pinctrl-names = "default";
83	status = "okay";
84};
85
86&can1 {
87	pinctrl-0 = <&can1_pins>;
88	pinctrl-names = "default";
89	status = "okay";
90};
91
92&du {
93	ports {
94		port@0 {
95			du_out_rgb: endpoint {
96				remote-endpoint = <&adv7513_in>;
97			};
98		};
99	};
100};
101
102&ehci0 {
103	dr_mode = "otg";
104	status = "okay";
105};
106
107&hscif0 {
108	pinctrl-0 = <&hscif0_pins>;
109	pinctrl-names = "default";
110	uart-has-rtscts;
111
112	status = "okay";
113};
114
115&hscif1 {
116	pinctrl-0 = <&hscif1_pins>;
117	pinctrl-names = "default";
118	uart-has-rtscts;
119
120	status = "okay";
121};
122
123&hsusb {
124	dr_mode = "otg";
125	status = "okay";
126};
127
128&i2c2 {
129	i2cmux2: i2c-mux@71 {
130		compatible = "nxp,pca9548";
131		#address-cells = <1>;
132		#size-cells = <0>;
133		reg = <0x71>;
134		reset-gpios = <&gpio5 3 GPIO_ACTIVE_LOW>;
135
136		/* HDMIoSDA, HDMIoSCL */
137		i2c@4 {
138			#address-cells = <1>;
139			#size-cells = <0>;
140			reg = <4>;
141
142			hdmi@3d {
143				compatible = "adi,adv7513";
144				reg = <0x3d>;
145
146				pinctrl-0 = <&hdmi1_pins>;
147				pinctrl-names = "default";
148
149				interrupt-parent = <&gpio2>;
150				interrupts = <14 IRQ_TYPE_LEVEL_LOW>;
151
152				clocks = <&cs2000>;
153				clock-names = "cec";
154
155				pd-gpios = <&gpio_exp_75 5 GPIO_ACTIVE_LOW>;
156
157				avdd-supply = <&hdmi_1v8>;
158				dvdd-supply = <&hdmi_1v8>;
159				pvdd-supply = <&hdmi_1v8>;
160				dvdd-3v-supply = <&reg_3p3v>;
161				bgvdd-supply = <&hdmi_1v8>;
162
163				adi,input-depth = <8>;
164				adi,input-colorspace = "rgb";
165				adi,input-clock = "1x";
166
167				ports {
168					#address-cells = <1>;
169					#size-cells = <0>;
170
171					port@0 {
172						reg = <0>;
173						adv7513_in: endpoint {
174							remote-endpoint = <&du_out_rgb>;
175						};
176					};
177
178					port@1 {
179						reg = <1>;
180						adv7513_out: endpoint {
181							remote-endpoint = <&hdmi1_con>;
182						};
183					};
184				};
185			};
186		};
187
188		/* Audio_SDA, Audio_SCL */
189		i2c@7 {
190			#address-cells = <1>;
191			#size-cells = <0>;
192			reg = <7>;
193
194			accelerometer@1d {
195				compatible = "st,lsm9ds0-imu";
196				reg = <0x1d>;
197
198				vdd-supply = <&reg_3p3v>;
199				vddio-supply = <&reg_3p3v>;
200			};
201
202			pcm3168a: audio-codec@44 {
203				#sound-dai-cells = <0>;
204				compatible = "ti,pcm3168a";
205				reg = <0x44>;
206				clocks = <&clksndsel>;
207				clock-names = "scki";
208
209				VDD1-supply = <&reg_3p3v>;
210				VDD2-supply = <&reg_3p3v>;
211				VCCAD1-supply = <&snd_vcc5v>;
212				VCCAD2-supply = <&snd_vcc5v>;
213				VCCDA1-supply = <&snd_vcc5v>;
214				VCCDA2-supply = <&snd_vcc5v>;
215			};
216
217			gyroscope@6b {
218				compatible = "st,lsm9ds0-gyro";
219				reg = <0x6b>;
220
221				vdd-supply = <&reg_3p3v>;
222				vddio-supply = <&reg_3p3v>;
223			};
224		};
225	};
226
227	/* U11 */
228	gpio_exp_74: gpio@74 {
229		compatible = "ti,tca9539";
230		reg = <0x74>;
231		gpio-controller;
232		#gpio-cells = <2>;
233		interrupt-controller;
234		interrupt-parent = <&gpio6>;
235		interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
236
237		audio-out-off-hog {
238			gpio-hog;
239			gpios = <0 GPIO_ACTIVE_HIGH>; /* P00 */
240			output-high;
241			line-name = "Audio_Out_OFF";
242		};
243
244		hub-pwen-hog {
245			gpio-hog;
246			gpios = <6 GPIO_ACTIVE_HIGH>;
247			output-high;
248			line-name = "HUB pwen";
249		};
250
251		hub-rst-hog {
252			gpio-hog;
253			gpios = <7 GPIO_ACTIVE_HIGH>;
254			output-high;
255			line-name = "HUB rst";
256		};
257
258		otg-extlpn-hog {
259			gpio-hog;
260			gpios = <9 GPIO_ACTIVE_HIGH>;
261			output-high;
262			line-name = "OTG EXTLPn";
263		};
264
265		otg-offvbusn-hog {
266			gpio-hog;
267			gpios = <8 GPIO_ACTIVE_HIGH>;
268			output-low;
269			line-name = "OTG OFFVBUSn";
270		};
271
272		sd-wifi-mux-hog {
273			gpio-hog;
274			gpios = <5 GPIO_ACTIVE_HIGH>;
275			output-low;	/* Connect WL1837 */
276			line-name = "SD WiFi mux";
277		};
278
279		snd-rst-hog {
280			gpio-hog;
281			gpios = <15 GPIO_ACTIVE_HIGH>; /* P17 */
282			output-high;
283			line-name = "SND_RST";
284		};
285	};
286
287	/* U5 */
288	gpio_exp_75: gpio@75 {
289		compatible = "ti,tca9539";
290		reg = <0x75>;
291		gpio-controller;
292		#gpio-cells = <2>;
293		interrupt-controller;
294		interrupt-parent = <&gpio6>;
295		interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
296	};
297};
298
299&i2c4 {
300	i2cmux4: i2c-mux@71 {
301		compatible = "nxp,pca9548";
302		#address-cells = <1>;
303		#size-cells = <0>;
304		reg = <0x71>;
305		reset-gpios = <&gpio3 15 GPIO_ACTIVE_LOW>;
306	};
307
308	gpio_exp_76: gpio@76 {
309		compatible = "ti,tca9539";
310		reg = <0x76>;
311		gpio-controller;
312		#gpio-cells = <2>;
313		interrupt-controller;
314		interrupt-parent = <&gpio7>;
315		interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
316	};
317
318	gpio_exp_77: gpio@77 {
319		compatible = "ti,tca9539";
320		reg = <0x77>;
321		gpio-controller;
322		#gpio-cells = <2>;
323		interrupt-controller;
324		interrupt-parent = <&gpio5>;
325		interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
326	};
327};
328
329&ohci0 {
330	dr_mode = "otg";
331	status = "okay";
332};
333
334&pcie_bus_clk {
335	clock-frequency = <100000000>;
336};
337
338&pciec0 {
339	status = "okay";
340};
341
342&pciec1 {
343	status = "okay";
344
345	vpcie1v5-supply = <&pcie_1v5>;
346	vpcie3v3-supply = <&pcie_3v3>;
347};
348
349&pfc {
350	can0_pins: can0 {
351		groups = "can0_data_a";
352		function = "can0";
353	};
354
355	can1_pins: can1 {
356		groups = "can1_data";
357		function = "can1";
358	};
359
360	hdmi1_pins: hdmi1 {
361		adv7513-interrupt {
362			pins = "GP_2_14";
363			bias-pull-up;
364		};
365
366		du {
367			groups = "du_rgb888", "du_sync", "du_clk_out_0",
368				 "du_disp";
369			function = "du";
370		};
371	};
372
373	hscif0_pins: hscif0 {
374		groups = "hscif0_data", "hscif0_ctrl";
375		function = "hscif0";
376	};
377
378	hscif1_pins: hscif1 {
379		groups = "hscif1_data_a", "hscif1_ctrl_a";
380		function = "hscif1";
381	};
382
383	scif1_pins: scif1 {
384		groups = "scif1_data_b";
385		function = "scif1";
386	};
387
388	sdhi3_pins: sdhi3 {
389		groups = "sdhi3_data4", "sdhi3_ctrl";
390		function = "sdhi3";
391		power-source = <3300>;
392	};
393
394	sound_pcm_pins: sound-pcm {
395		groups = "ssi349_ctrl", "ssi3_data", "ssi4_data";
396		function = "ssi";
397	};
398
399	usb0_pins: usb0 {
400		groups = "usb0";
401		function = "usb0";
402	};
403};
404
405&rcar_sound {
406	pinctrl-0 = <&sound_pins
407		     &sound_clk_pins
408		     &sound_pcm_pins>;
409};
410
411&scif1 {
412	pinctrl-0 = <&scif1_pins>;
413	pinctrl-names = "default";
414
415	status = "okay";
416
417	gnss {
418		compatible = "u-blox,neo-m8";
419		reset-gpios = <&gpio_exp_75 6 GPIO_ACTIVE_LOW>;
420		vcc-supply = <&reg_3p3v>;
421		current-speed = <9600>;
422	};
423};
424
425&sdhi3 {
426	pinctrl-0 = <&sdhi3_pins>;
427	pinctrl-names = "default";
428
429	vmmc-supply = <&wlan_en>;
430	vqmmc-supply = <&wlan_en>;
431	bus-width = <4>;
432	no-1-8-v;
433	non-removable;
434	cap-power-off-card;
435	keep-power-in-suspend;
436	max-frequency = <26000000>;
437	status = "okay";
438
439	#address-cells = <1>;
440	#size-cells = <0>;
441	wlcore: wlcore@2 {
442		compatible = "ti,wl1837";
443		reg = <2>;
444		interrupt-parent = <&gpio1>;
445		interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
446	};
447};
448
449&ssi4 {
450	shared-pin;
451};
452
453&usb2_phy0 {
454	pinctrl-0 = <&usb0_pins>;
455	pinctrl-names = "default";
456
457	status = "okay";
458};
459
460&xhci0 {
461	status = "okay";
462};
463
464/*
465 * For sound-test.
466 *
467 * We can switch Audio Card for testing
468 * see also ulcb.dtsi
469 *
470 * #include "ulcb-kf-simple-audio-card.dtsi"
471 * #include "ulcb-kf-simple-audio-card-mix+split.dtsi"
472 * #include "ulcb-kf-audio-graph-card.dtsi"
473 * #include "ulcb-kf-audio-graph-card-mix+split.dtsi"
474 * #include "ulcb-kf-audio-graph-card2-mix+split.dtsi"
475 */
476#include "ulcb-kf-audio-graph-card2.dtsi"
477