1cba59c25SWolfram Sang// SPDX-License-Identifier: GPL-2.0 20764c67fSGeert Uytterhoeven/* 30764c67fSGeert Uytterhoeven * Device Tree Source for the Salvator-X 2nd version board 40764c67fSGeert Uytterhoeven * 50764c67fSGeert Uytterhoeven * Copyright (C) 2015-2017 Renesas Electronics Corp. 60764c67fSGeert Uytterhoeven */ 70764c67fSGeert Uytterhoeven 80764c67fSGeert Uytterhoeven#include "salvator-common.dtsi" 90764c67fSGeert Uytterhoeven 100764c67fSGeert Uytterhoeven/ { 110764c67fSGeert Uytterhoeven model = "Renesas Salvator-X 2nd version board"; 120764c67fSGeert Uytterhoeven compatible = "renesas,salvator-xs"; 130764c67fSGeert Uytterhoeven}; 140764c67fSGeert Uytterhoeven 150764c67fSGeert Uytterhoeven&extal_clk { 160764c67fSGeert Uytterhoeven clock-frequency = <16640000>; 170764c67fSGeert Uytterhoeven}; 18b127daecSLaurent Pinchart 19b127daecSLaurent Pinchart&i2c4 { 2056195dc5STakeshi Kihara clock-frequency = <400000>; 2156195dc5STakeshi Kihara 22b127daecSLaurent Pinchart versaclock6: clock-generator@6a { 23b127daecSLaurent Pinchart compatible = "idt,5p49v6901"; 24b127daecSLaurent Pinchart reg = <0x6a>; 25b127daecSLaurent Pinchart #clock-cells = <1>; 26b127daecSLaurent Pinchart clocks = <&x23_clk>; 27b127daecSLaurent Pinchart clock-names = "xin"; 28b127daecSLaurent Pinchart }; 29b127daecSLaurent Pinchart}; 3090a4ee4bSGeert Uytterhoeven 3190a4ee4bSGeert Uytterhoeven#ifdef SOC_HAS_SATA 3290a4ee4bSGeert Uytterhoeven&pca9654 { 3390a4ee4bSGeert Uytterhoeven pcie-sata-switch-hog { 3490a4ee4bSGeert Uytterhoeven gpio-hog; 3590a4ee4bSGeert Uytterhoeven gpios = <7 GPIO_ACTIVE_HIGH>; 3690a4ee4bSGeert Uytterhoeven output-low; /* enable SATA by default */ 3790a4ee4bSGeert Uytterhoeven line-name = "PCIE/SATA switch"; 3890a4ee4bSGeert Uytterhoeven }; 3990a4ee4bSGeert Uytterhoeven}; 4090a4ee4bSGeert Uytterhoeven 4190a4ee4bSGeert Uytterhoeven/* SW12-7 must be set 'Off' (MD12 set to 1) which is not the default! */ 4290a4ee4bSGeert Uytterhoeven#endif /* SOC_HAS_SATA */ 43*3a44a8d1SGeert Uytterhoeven 44*3a44a8d1SGeert Uytterhoeven#ifdef SOC_HAS_USB2_CH3 45*3a44a8d1SGeert Uytterhoeven&ehci3 { 46*3a44a8d1SGeert Uytterhoeven dr_mode = "otg"; 47*3a44a8d1SGeert Uytterhoeven status = "okay"; 48*3a44a8d1SGeert Uytterhoeven}; 49*3a44a8d1SGeert Uytterhoeven 50*3a44a8d1SGeert Uytterhoeven&hsusb3 { 51*3a44a8d1SGeert Uytterhoeven dr_mode = "otg"; 52*3a44a8d1SGeert Uytterhoeven status = "okay"; 53*3a44a8d1SGeert Uytterhoeven}; 54*3a44a8d1SGeert Uytterhoeven 55*3a44a8d1SGeert Uytterhoeven&ohci3 { 56*3a44a8d1SGeert Uytterhoeven dr_mode = "otg"; 57*3a44a8d1SGeert Uytterhoeven status = "okay"; 58*3a44a8d1SGeert Uytterhoeven}; 59*3a44a8d1SGeert Uytterhoeven 60*3a44a8d1SGeert Uytterhoeven&pfc { 61*3a44a8d1SGeert Uytterhoeven /* 62*3a44a8d1SGeert Uytterhoeven * - On Salvator-X[S], GP6_3[01] are connected to ADV7482 as irq pins 63*3a44a8d1SGeert Uytterhoeven * (when SW31 is the default setting on Salvator-XS). 64*3a44a8d1SGeert Uytterhoeven * - If SW31 is the default setting, you cannot use USB2.0 ch3 on 65*3a44a8d1SGeert Uytterhoeven * r8a77951 with Salvator-XS. 66*3a44a8d1SGeert Uytterhoeven * Hence the SW31 setting must be changed like 2) below. 67*3a44a8d1SGeert Uytterhoeven * 1) Default setting of SW31: ON-ON-OFF-OFF-OFF-OFF: 68*3a44a8d1SGeert Uytterhoeven * - Connect GP6_3[01] to ADV7842. 69*3a44a8d1SGeert Uytterhoeven * 2) Changed setting of SW31: OFF-OFF-ON-ON-ON-ON: 70*3a44a8d1SGeert Uytterhoeven * - Connect GP6_3[01] to BD082065 (USB2.0 ch3's host power). 71*3a44a8d1SGeert Uytterhoeven * - Connect GP6_{04,21} to ADV7842. 72*3a44a8d1SGeert Uytterhoeven */ 73*3a44a8d1SGeert Uytterhoeven usb2_ch3_pins: usb2_ch3 { 74*3a44a8d1SGeert Uytterhoeven groups = "usb2_ch3"; 75*3a44a8d1SGeert Uytterhoeven function = "usb2_ch3"; 76*3a44a8d1SGeert Uytterhoeven }; 77*3a44a8d1SGeert Uytterhoeven}; 78*3a44a8d1SGeert Uytterhoeven 79*3a44a8d1SGeert Uytterhoeven&usb2_phy3 { 80*3a44a8d1SGeert Uytterhoeven pinctrl-0 = <&usb2_ch3_pins>; 81*3a44a8d1SGeert Uytterhoeven pinctrl-names = "default"; 82*3a44a8d1SGeert Uytterhoeven 83*3a44a8d1SGeert Uytterhoeven status = "okay"; 84*3a44a8d1SGeert Uytterhoeven}; 85*3a44a8d1SGeert Uytterhoeven#endif /* SOC_HAS_USB2_CH3 */ 86