xref: /linux/scripts/dtc/include-prefixes/arm64/renesas/rzg2lc-smarc.dtsi (revision 2ed3b5d9540b246d7a1ec98971914ee810b40086)
1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2/*
3 * Device Tree Source for the RZ/G2LC SMARC EVK parts
4 *
5 * Copyright (C) 2022 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/gpio/gpio.h>
9#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
10
11/*
12 * DIP-Switch SW1 setting on SoM
13 * 1 : High; 0: Low
14 * SW1-2 : SW_SD0_DEV_SEL	(1: eMMC; 0: uSD)
15 * SW1-3 : SW_SCIF_CAN		(1: CAN1; 0: SCIF1)
16 * SW1-4 : SW_RSPI_CAN		(1: CAN1; 0: RSPI1)
17 * SW1-5 : SW_I2S0_I2S1		(1: I2S2 (HDMI audio); 0: I2S0)
18 * Please change below macros according to SW1 setting
19 */
20
21#define SW_SCIF_CAN	0
22#if (SW_SCIF_CAN)
23/* Due to HW routing, SW_RSPI_CAN is always 0 when SW_SCIF_CAN is set to 1 */
24#define SW_RSPI_CAN	0
25#else
26/* Please set SW_RSPI_CAN. Default value is 1 */
27#define SW_RSPI_CAN	1
28#endif
29
30#if (SW_SCIF_CAN & SW_RSPI_CAN)
31#error "Can not set 1 to both SW_SCIF_CAN and SW_RSPI_CAN due to HW routing"
32#endif
33
34#include "rzg2lc-smarc-som.dtsi"
35#include "rzg2lc-smarc-pinfunction.dtsi"
36#include "rz-smarc-common.dtsi"
37