xref: /linux/scripts/dtc/include-prefixes/arm64/renesas/r9a09g057h44-rzv2h-evk.dts (revision 3a39d672e7f48b8d6b91a09afa4b55352773b4b5)

// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
/*
 * Device Tree Source for the RZ/V2H EVK board
 *
 * Copyright (C) 2024 Renesas Electronics Corp.
 */

/dts-v1/;

#include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
#include <dt-bindings/gpio/gpio.h>
#include "r9a09g057.dtsi"

/ {
	model = "Renesas RZ/V2H EVK Board based on r9a09g057h44";
	compatible = "renesas,rzv2h-evk", "renesas,r9a09g057h44", "renesas,r9a09g057";

	aliases {
		i2c0 = &i2c0;
		i2c1 = &i2c1;
		i2c2 = &i2c2;
		i2c3 = &i2c3;
		i2c6 = &i2c6;
		i2c7 = &i2c7;
		i2c8 = &i2c8;
		mmc1 = &sdhi1;
		serial0 = &scif;
	};

	chosen {
		bootargs = "ignore_loglevel";
		stdout-path = "serial0:115200n8";
	};

	memory@48000000 {
		device_type = "memory";
		/* first 128MB is reserved for secure area. */
		reg = <0x0 0x48000000 0x1 0xF8000000>;
	};

	memory@240000000 {
		device_type = "memory";
		reg = <0x2 0x40000000 0x2 0x00000000>;
	};

	reg_3p3v: regulator1 {
		compatible = "regulator-fixed";

		regulator-name = "fixed-3.3V";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-boot-on;
		regulator-always-on;
	};

	vqmmc_sdhi1: regulator-vccq-sdhi1 {
		compatible = "regulator-gpio";
		regulator-name = "SDHI1 VccQ";
		gpios = <&pinctrl RZG2L_GPIO(10, 2) GPIO_ACTIVE_HIGH>;
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <3300000>;
		gpios-states = <0>;
		states = <3300000 0>, <1800000 1>;
	};
};

&audio_extal_clk {
	clock-frequency = <22579200>;
};

&i2c0 {
	pinctrl-0 = <&i2c0_pins>;
	pinctrl-names = "default";
	clock-frequency = <400000>;

	status = "okay";
};

&i2c1 {
	pinctrl-0 = <&i2c1_pins>;
	pinctrl-names = "default";
	clock-frequency = <400000>;

	status = "okay";
};

&i2c2 {
	pinctrl-0 = <&i2c2_pins>;
	pinctrl-names = "default";
	clock-frequency = <400000>;

	status = "okay";
};

&i2c3 {
	pinctrl-0 = <&i2c3_pins>;
	pinctrl-names = "default";
	clock-frequency = <400000>;

	status = "okay";
};

&i2c6 {
	pinctrl-0 = <&i2c6_pins>;
	pinctrl-names = "default";
	clock-frequency = <400000>;

	status = "okay";
};

&i2c7 {
	pinctrl-0 = <&i2c7_pins>;
	pinctrl-names = "default";
	clock-frequency = <400000>;

	status = "okay";
};

&i2c8 {
	pinctrl-0 = <&i2c8_pins>;
	pinctrl-names = "default";
	clock-frequency = <400000>;

	status = "okay";
};

&ostm0 {
	status = "okay";
};

&ostm1 {
	status = "okay";
};

&ostm2 {
	status = "okay";
};

&ostm3 {
	status = "okay";
};

&ostm4 {
	status = "okay";
};

&ostm5 {
	status = "okay";
};

&ostm6 {
	status = "okay";
};

&ostm7 {
	status = "okay";
};

&pinctrl {
	i2c0_pins: i2c0 {
		pinmux = <RZG2L_PORT_PINMUX(3, 0, 1)>, /* I2C0_SDA */
			 <RZG2L_PORT_PINMUX(3, 1, 1)>; /* I2C0_SCL */
	};

	i2c1_pins: i2c1 {
		pinmux = <RZG2L_PORT_PINMUX(3, 2, 1)>, /* I2C1_SDA */
			 <RZG2L_PORT_PINMUX(3, 3, 1)>; /* I2C1_SCL */
	};

	i2c2_pins: i2c2 {
		pinmux = <RZG2L_PORT_PINMUX(2, 0, 4)>, /* I2C2_SDA */
			 <RZG2L_PORT_PINMUX(2, 1, 4)>; /* I2C2_SCL */
	};

	i2c3_pins: i2c3 {
		pinmux = <RZG2L_PORT_PINMUX(3, 6, 1)>, /* I2C3_SDA */
			 <RZG2L_PORT_PINMUX(3, 7, 1)>; /* I2C3_SCL */
	};

	i2c6_pins: i2c6 {
		pinmux = <RZG2L_PORT_PINMUX(4, 4, 1)>, /* I2C6_SDA */
			 <RZG2L_PORT_PINMUX(4, 5, 1)>; /* I2C6_SCL */
	};

	i2c7_pins: i2c7 {
		pinmux = <RZG2L_PORT_PINMUX(4, 6, 1)>, /* I2C7_SDA */
			 <RZG2L_PORT_PINMUX(4, 7, 1)>; /* I2C7_SCL */
	};

	i2c8_pins: i2c8 {
		pinmux = <RZG2L_PORT_PINMUX(0, 6, 1)>, /* I2C8_SDA */
			 <RZG2L_PORT_PINMUX(0, 7, 1)>; /* I2C8_SCL */
	};

	scif_pins: scif {
		pins = "SCIF_TXD", "SCIF_RXD";
		renesas,output-impedance = <1>;
	};

	sd1-pwr-en-hog {
		gpio-hog;
		gpios = <RZG2L_GPIO(10, 3) GPIO_ACTIVE_HIGH>;
		output-high;
		line-name = "sd1_pwr_en";
	};

	sdhi1_pins: sd1 {
		sd1_dat_cmd {
			pins = "SD1DAT0", "SD1DAT1", "SD1DAT2", "SD1DAT3", "SD1CMD";
			input-enable;
			renesas,output-impedance = <3>;
			slew-rate = <0>;
		};

		sd1_clk {
			pins = "SD1CLK";
			renesas,output-impedance = <3>;
			slew-rate = <0>;
		};

		sd1_cd {
			pinmux = <RZG2L_PORT_PINMUX(9, 4, 14)>; /* SD1_CD */
		};
	};
};

&qextal_clk {
	clock-frequency = <24000000>;
};

&rtxin_clk {
	clock-frequency = <32768>;
};

&scif {
	pinctrl-0 = <&scif_pins>;
	pinctrl-names = "default";

	status = "okay";
};

&sdhi1 {
	pinctrl-0 = <&sdhi1_pins>;
	pinctrl-1 = <&sdhi1_pins>;
	pinctrl-names = "default", "state_uhs";
	vmmc-supply = <&reg_3p3v>;
	vqmmc-supply = <&vqmmc_sdhi1>;
	bus-width = <4>;
	sd-uhs-sdr50;
	sd-uhs-sdr104;
	status = "okay";
};

&wdt1 {
	status = "okay";
};