1cf40c968SBiju Das// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2cf40c968SBiju Das/* 3cf40c968SBiju Das * Device Tree Source for the RZ/G2UL SoC 4cf40c968SBiju Das * 5cf40c968SBiju Das * Copyright (C) 2022 Renesas Electronics Corp. 6cf40c968SBiju Das */ 7cf40c968SBiju Das 8cf40c968SBiju Das#include <dt-bindings/interrupt-controller/arm-gic.h> 9cf40c968SBiju Das#include <dt-bindings/clock/r9a07g043-cpg.h> 10cf40c968SBiju Das 11cf40c968SBiju Das/ { 12cf40c968SBiju Das compatible = "renesas,r9a07g043"; 13cf40c968SBiju Das #address-cells = <2>; 14cf40c968SBiju Das #size-cells = <2>; 15cf40c968SBiju Das 16cf40c968SBiju Das audio_clk1: audio-clk1 { 17cf40c968SBiju Das compatible = "fixed-clock"; 18cf40c968SBiju Das #clock-cells = <0>; 19cf40c968SBiju Das /* This value must be overridden by boards that provide it */ 20cf40c968SBiju Das clock-frequency = <0>; 21cf40c968SBiju Das }; 22cf40c968SBiju Das 23cf40c968SBiju Das audio_clk2: audio-clk2 { 24cf40c968SBiju Das compatible = "fixed-clock"; 25cf40c968SBiju Das #clock-cells = <0>; 26cf40c968SBiju Das /* This value must be overridden by boards that provide it */ 27cf40c968SBiju Das clock-frequency = <0>; 28cf40c968SBiju Das }; 29cf40c968SBiju Das 30cf40c968SBiju Das /* External CAN clock - to be overridden by boards that provide it */ 31cf40c968SBiju Das can_clk: can-clk { 32cf40c968SBiju Das compatible = "fixed-clock"; 33cf40c968SBiju Das #clock-cells = <0>; 34cf40c968SBiju Das clock-frequency = <0>; 35cf40c968SBiju Das }; 36cf40c968SBiju Das 37cf40c968SBiju Das /* clock can be either from exclk or crystal oscillator (XIN/XOUT) */ 38cf40c968SBiju Das extal_clk: extal-clk { 39cf40c968SBiju Das compatible = "fixed-clock"; 40cf40c968SBiju Das #clock-cells = <0>; 41cf40c968SBiju Das /* This value must be overridden by the board */ 42cf40c968SBiju Das clock-frequency = <0>; 43cf40c968SBiju Das }; 44cf40c968SBiju Das 45cf40c968SBiju Das cpus { 46cf40c968SBiju Das #address-cells = <1>; 47cf40c968SBiju Das #size-cells = <0>; 48cf40c968SBiju Das 49cf40c968SBiju Das cpu0: cpu@0 { 50cf40c968SBiju Das compatible = "arm,cortex-a55"; 51cf40c968SBiju Das reg = <0>; 52cf40c968SBiju Das device_type = "cpu"; 53cf40c968SBiju Das next-level-cache = <&L3_CA55>; 54cf40c968SBiju Das enable-method = "psci"; 55cf40c968SBiju Das clocks = <&cpg CPG_CORE R9A07G043_CLK_I>; 56cf40c968SBiju Das }; 57cf40c968SBiju Das 58cf40c968SBiju Das L3_CA55: cache-controller-0 { 59cf40c968SBiju Das compatible = "cache"; 60cf40c968SBiju Das cache-unified; 61cf40c968SBiju Das cache-size = <0x40000>; 62cf40c968SBiju Das }; 63cf40c968SBiju Das }; 64cf40c968SBiju Das 65cf40c968SBiju Das psci { 66cf40c968SBiju Das compatible = "arm,psci-1.0", "arm,psci-0.2"; 67cf40c968SBiju Das method = "smc"; 68cf40c968SBiju Das }; 69cf40c968SBiju Das 70cf40c968SBiju Das soc: soc { 71cf40c968SBiju Das compatible = "simple-bus"; 72cf40c968SBiju Das interrupt-parent = <&gic>; 73cf40c968SBiju Das #address-cells = <2>; 74cf40c968SBiju Das #size-cells = <2>; 75cf40c968SBiju Das ranges; 76cf40c968SBiju Das 77cf40c968SBiju Das ssi0: ssi@10049c00 { 78cf40c968SBiju Das reg = <0 0x10049c00 0 0x400>; 79cf40c968SBiju Das #sound-dai-cells = <0>; 80cf40c968SBiju Das /* place holder */ 81cf40c968SBiju Das }; 82cf40c968SBiju Das 83cf40c968SBiju Das spi1: spi@1004b000 { 84cf40c968SBiju Das reg = <0 0x1004b000 0 0x400>; 85cf40c968SBiju Das #address-cells = <1>; 86cf40c968SBiju Das #size-cells = <0>; 87cf40c968SBiju Das /* place holder */ 88cf40c968SBiju Das }; 89cf40c968SBiju Das 90cf40c968SBiju Das scif0: serial@1004b800 { 91cf40c968SBiju Das compatible = "renesas,scif-r9a07g043", 92cf40c968SBiju Das "renesas,scif-r9a07g044"; 93cf40c968SBiju Das reg = <0 0x1004b800 0 0x400>; 94cf40c968SBiju Das interrupts = <GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH>, 95cf40c968SBiju Das <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 96cf40c968SBiju Das <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>, 97cf40c968SBiju Das <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>, 98cf40c968SBiju Das <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>, 99cf40c968SBiju Das <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>; 100cf40c968SBiju Das interrupt-names = "eri", "rxi", "txi", 101cf40c968SBiju Das "bri", "dri", "tei"; 102cf40c968SBiju Das clocks = <&cpg CPG_MOD R9A07G043_SCIF0_CLK_PCK>; 103cf40c968SBiju Das clock-names = "fck"; 104cf40c968SBiju Das power-domains = <&cpg>; 105cf40c968SBiju Das resets = <&cpg R9A07G043_SCIF0_RST_SYSTEM_N>; 106cf40c968SBiju Das status = "disabled"; 107cf40c968SBiju Das }; 108cf40c968SBiju Das 109cf40c968SBiju Das scif1: serial@1004bc00 { 110cf40c968SBiju Das compatible = "renesas,scif-r9a07g043", 111cf40c968SBiju Das "renesas,scif-r9a07g044"; 112cf40c968SBiju Das reg = <0 0x1004bc00 0 0x400>; 113cf40c968SBiju Das interrupts = <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>, 114cf40c968SBiju Das <GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>, 115cf40c968SBiju Das <GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>, 116cf40c968SBiju Das <GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>, 117cf40c968SBiju Das <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>, 118cf40c968SBiju Das <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; 119cf40c968SBiju Das interrupt-names = "eri", "rxi", "txi", 120cf40c968SBiju Das "bri", "dri", "tei"; 121cf40c968SBiju Das clocks = <&cpg CPG_MOD R9A07G043_SCIF1_CLK_PCK>; 122cf40c968SBiju Das clock-names = "fck"; 123cf40c968SBiju Das power-domains = <&cpg>; 124cf40c968SBiju Das resets = <&cpg R9A07G043_SCIF1_RST_SYSTEM_N>; 125cf40c968SBiju Das status = "disabled"; 126cf40c968SBiju Das }; 127cf40c968SBiju Das 128cf40c968SBiju Das scif2: serial@1004c000 { 129cf40c968SBiju Das compatible = "renesas,scif-r9a07g043", 130cf40c968SBiju Das "renesas,scif-r9a07g044"; 131cf40c968SBiju Das reg = <0 0x1004c000 0 0x400>; 132cf40c968SBiju Das interrupts = <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>, 133cf40c968SBiju Das <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>, 134cf40c968SBiju Das <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>, 135cf40c968SBiju Das <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>, 136cf40c968SBiju Das <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>, 137cf40c968SBiju Das <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>; 138cf40c968SBiju Das interrupt-names = "eri", "rxi", "txi", 139cf40c968SBiju Das "bri", "dri", "tei"; 140cf40c968SBiju Das clocks = <&cpg CPG_MOD R9A07G043_SCIF2_CLK_PCK>; 141cf40c968SBiju Das clock-names = "fck"; 142cf40c968SBiju Das power-domains = <&cpg>; 143cf40c968SBiju Das resets = <&cpg R9A07G043_SCIF2_RST_SYSTEM_N>; 144cf40c968SBiju Das status = "disabled"; 145cf40c968SBiju Das }; 146cf40c968SBiju Das 147cf40c968SBiju Das scif3: serial@1004c400 { 148cf40c968SBiju Das compatible = "renesas,scif-r9a07g043", 149cf40c968SBiju Das "renesas,scif-r9a07g044"; 150cf40c968SBiju Das reg = <0 0x1004c400 0 0x400>; 151cf40c968SBiju Das interrupts = <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>, 152cf40c968SBiju Das <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>, 153cf40c968SBiju Das <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 154cf40c968SBiju Das <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>, 155cf40c968SBiju Das <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 156cf40c968SBiju Das <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>; 157cf40c968SBiju Das interrupt-names = "eri", "rxi", "txi", 158cf40c968SBiju Das "bri", "dri", "tei"; 159cf40c968SBiju Das clocks = <&cpg CPG_MOD R9A07G043_SCIF3_CLK_PCK>; 160cf40c968SBiju Das clock-names = "fck"; 161cf40c968SBiju Das power-domains = <&cpg>; 162cf40c968SBiju Das resets = <&cpg R9A07G043_SCIF3_RST_SYSTEM_N>; 163cf40c968SBiju Das status = "disabled"; 164cf40c968SBiju Das }; 165cf40c968SBiju Das 166cf40c968SBiju Das scif4: serial@1004c800 { 167cf40c968SBiju Das compatible = "renesas,scif-r9a07g043", 168cf40c968SBiju Das "renesas,scif-r9a07g044"; 169cf40c968SBiju Das reg = <0 0x1004c800 0 0x400>; 170cf40c968SBiju Das interrupts = <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 171cf40c968SBiju Das <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 172cf40c968SBiju Das <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 173cf40c968SBiju Das <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 174cf40c968SBiju Das <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 175cf40c968SBiju Das <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>; 176cf40c968SBiju Das interrupt-names = "eri", "rxi", "txi", 177cf40c968SBiju Das "bri", "dri", "tei"; 178cf40c968SBiju Das clocks = <&cpg CPG_MOD R9A07G043_SCIF4_CLK_PCK>; 179cf40c968SBiju Das clock-names = "fck"; 180cf40c968SBiju Das power-domains = <&cpg>; 181cf40c968SBiju Das resets = <&cpg R9A07G043_SCIF4_RST_SYSTEM_N>; 182cf40c968SBiju Das status = "disabled"; 183cf40c968SBiju Das }; 184cf40c968SBiju Das 185cf40c968SBiju Das sci0: serial@1004d000 { 186cf40c968SBiju Das compatible = "renesas,r9a07g043-sci", "renesas,sci"; 187cf40c968SBiju Das reg = <0 0x1004d000 0 0x400>; 188cf40c968SBiju Das interrupts = <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>, 189cf40c968SBiju Das <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 190cf40c968SBiju Das <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 191cf40c968SBiju Das <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; 192cf40c968SBiju Das interrupt-names = "eri", "rxi", "txi", "tei"; 193cf40c968SBiju Das clocks = <&cpg CPG_MOD R9A07G043_SCI0_CLKP>; 194cf40c968SBiju Das clock-names = "fck"; 195cf40c968SBiju Das power-domains = <&cpg>; 196cf40c968SBiju Das resets = <&cpg R9A07G043_SCI0_RST>; 197cf40c968SBiju Das status = "disabled"; 198cf40c968SBiju Das }; 199cf40c968SBiju Das 200cf40c968SBiju Das sci1: serial@1004d400 { 201cf40c968SBiju Das compatible = "renesas,r9a07g043-sci", "renesas,sci"; 202cf40c968SBiju Das reg = <0 0x1004d400 0 0x400>; 203cf40c968SBiju Das interrupts = <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>, 204cf40c968SBiju Das <GIC_SPI 410 IRQ_TYPE_LEVEL_HIGH>, 205cf40c968SBiju Das <GIC_SPI 411 IRQ_TYPE_LEVEL_HIGH>, 206cf40c968SBiju Das <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>; 207cf40c968SBiju Das interrupt-names = "eri", "rxi", "txi", "tei"; 208cf40c968SBiju Das clocks = <&cpg CPG_MOD R9A07G043_SCI1_CLKP>; 209cf40c968SBiju Das clock-names = "fck"; 210cf40c968SBiju Das power-domains = <&cpg>; 211cf40c968SBiju Das resets = <&cpg R9A07G043_SCI1_RST>; 212cf40c968SBiju Das status = "disabled"; 213cf40c968SBiju Das }; 214cf40c968SBiju Das 215cf40c968SBiju Das canfd: can@10050000 { 216cf40c968SBiju Das reg = <0 0x10050000 0 0x8000>; 217cf40c968SBiju Das /* place holder */ 218cf40c968SBiju Das }; 219cf40c968SBiju Das 220cf40c968SBiju Das i2c0: i2c@10058000 { 221cf40c968SBiju Das #address-cells = <1>; 222cf40c968SBiju Das #size-cells = <0>; 223cf40c968SBiju Das reg = <0 0x10058000 0 0x400>; 224cf40c968SBiju Das /* place holder */ 225cf40c968SBiju Das }; 226cf40c968SBiju Das 227cf40c968SBiju Das i2c1: i2c@10058400 { 228cf40c968SBiju Das #address-cells = <1>; 229cf40c968SBiju Das #size-cells = <0>; 230cf40c968SBiju Das reg = <0 0x10058400 0 0x400>; 231cf40c968SBiju Das /* place holder */ 232cf40c968SBiju Das }; 233cf40c968SBiju Das 234cf40c968SBiju Das i2c3: i2c@10058c00 { 235cf40c968SBiju Das #address-cells = <1>; 236cf40c968SBiju Das #size-cells = <0>; 237cf40c968SBiju Das reg = <0 0x10058c00 0 0x400>; 238cf40c968SBiju Das /* place holder */ 239cf40c968SBiju Das }; 240cf40c968SBiju Das 241cf40c968SBiju Das adc: adc@10059000 { 242cf40c968SBiju Das reg = <0 0x10059000 0 0x400>; 243cf40c968SBiju Das /* place holder */ 244cf40c968SBiju Das }; 245cf40c968SBiju Das 246cf40c968SBiju Das sbc: spi@10060000 { 247cf40c968SBiju Das reg = <0 0x10060000 0 0x10000>, 248cf40c968SBiju Das <0 0x20000000 0 0x10000000>, 249cf40c968SBiju Das <0 0x10070000 0 0x10000>; 250cf40c968SBiju Das #address-cells = <1>; 251cf40c968SBiju Das #size-cells = <0>; 252cf40c968SBiju Das /* place holder */ 253cf40c968SBiju Das }; 254cf40c968SBiju Das 255cf40c968SBiju Das cpg: clock-controller@11010000 { 256cf40c968SBiju Das compatible = "renesas,r9a07g043-cpg"; 257cf40c968SBiju Das reg = <0 0x11010000 0 0x10000>; 258cf40c968SBiju Das clocks = <&extal_clk>; 259cf40c968SBiju Das clock-names = "extal"; 260cf40c968SBiju Das #clock-cells = <2>; 261cf40c968SBiju Das #reset-cells = <1>; 262cf40c968SBiju Das #power-domain-cells = <0>; 263cf40c968SBiju Das }; 264cf40c968SBiju Das 265cf40c968SBiju Das sysc: system-controller@11020000 { 266cf40c968SBiju Das compatible = "renesas,r9a07g043-sysc"; 267cf40c968SBiju Das reg = <0 0x11020000 0 0x10000>; 268cf40c968SBiju Das interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 269cf40c968SBiju Das <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 270cf40c968SBiju Das <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 271cf40c968SBiju Das <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; 272cf40c968SBiju Das interrupt-names = "lpm_int", "ca55stbydone_int", 273cf40c968SBiju Das "cm33stbyr_int", "ca55_deny"; 274cf40c968SBiju Das status = "disabled"; 275cf40c968SBiju Das }; 276cf40c968SBiju Das 277cf40c968SBiju Das pinctrl: pinctrl@11030000 { 2782d105552SBiju Das compatible = "renesas,r9a07g043-pinctrl"; 279cf40c968SBiju Das reg = <0 0x11030000 0 0x10000>; 280cf40c968SBiju Das gpio-controller; 281cf40c968SBiju Das #gpio-cells = <2>; 2822d105552SBiju Das gpio-ranges = <&pinctrl 0 0 152>; 2832d105552SBiju Das clocks = <&cpg CPG_MOD R9A07G043_GPIO_HCLK>; 2842d105552SBiju Das power-domains = <&cpg>; 2852d105552SBiju Das resets = <&cpg R9A07G043_GPIO_RSTN>, 2862d105552SBiju Das <&cpg R9A07G043_GPIO_PORT_RESETN>, 2872d105552SBiju Das <&cpg R9A07G043_GPIO_SPARE_RESETN>; 288cf40c968SBiju Das }; 289cf40c968SBiju Das 290cf40c968SBiju Das dmac: dma-controller@11820000 { 291cf40c968SBiju Das compatible = "renesas,r9a07g043-dmac", 292cf40c968SBiju Das "renesas,rz-dmac"; 293cf40c968SBiju Das reg = <0 0x11820000 0 0x10000>, 294cf40c968SBiju Das <0 0x11830000 0 0x10000>; 295cf40c968SBiju Das interrupts = <GIC_SPI 141 IRQ_TYPE_EDGE_RISING>, 296cf40c968SBiju Das <GIC_SPI 125 IRQ_TYPE_EDGE_RISING>, 297cf40c968SBiju Das <GIC_SPI 126 IRQ_TYPE_EDGE_RISING>, 298cf40c968SBiju Das <GIC_SPI 127 IRQ_TYPE_EDGE_RISING>, 299cf40c968SBiju Das <GIC_SPI 128 IRQ_TYPE_EDGE_RISING>, 300cf40c968SBiju Das <GIC_SPI 129 IRQ_TYPE_EDGE_RISING>, 301cf40c968SBiju Das <GIC_SPI 130 IRQ_TYPE_EDGE_RISING>, 302cf40c968SBiju Das <GIC_SPI 131 IRQ_TYPE_EDGE_RISING>, 303cf40c968SBiju Das <GIC_SPI 132 IRQ_TYPE_EDGE_RISING>, 304cf40c968SBiju Das <GIC_SPI 133 IRQ_TYPE_EDGE_RISING>, 305cf40c968SBiju Das <GIC_SPI 134 IRQ_TYPE_EDGE_RISING>, 306cf40c968SBiju Das <GIC_SPI 135 IRQ_TYPE_EDGE_RISING>, 307cf40c968SBiju Das <GIC_SPI 136 IRQ_TYPE_EDGE_RISING>, 308cf40c968SBiju Das <GIC_SPI 137 IRQ_TYPE_EDGE_RISING>, 309cf40c968SBiju Das <GIC_SPI 138 IRQ_TYPE_EDGE_RISING>, 310cf40c968SBiju Das <GIC_SPI 139 IRQ_TYPE_EDGE_RISING>, 311cf40c968SBiju Das <GIC_SPI 140 IRQ_TYPE_EDGE_RISING>; 312cf40c968SBiju Das interrupt-names = "error", 313cf40c968SBiju Das "ch0", "ch1", "ch2", "ch3", 314cf40c968SBiju Das "ch4", "ch5", "ch6", "ch7", 315cf40c968SBiju Das "ch8", "ch9", "ch10", "ch11", 316cf40c968SBiju Das "ch12", "ch13", "ch14", "ch15"; 317cf40c968SBiju Das clocks = <&cpg CPG_MOD R9A07G043_DMAC_ACLK>, 318cf40c968SBiju Das <&cpg CPG_MOD R9A07G043_DMAC_PCLK>; 319cf40c968SBiju Das power-domains = <&cpg>; 320cf40c968SBiju Das resets = <&cpg R9A07G043_DMAC_ARESETN>, 321cf40c968SBiju Das <&cpg R9A07G043_DMAC_RST_ASYNC>; 322cf40c968SBiju Das #dma-cells = <1>; 323cf40c968SBiju Das dma-channels = <16>; 324cf40c968SBiju Das }; 325cf40c968SBiju Das 326cf40c968SBiju Das gic: interrupt-controller@11900000 { 327cf40c968SBiju Das compatible = "arm,gic-v3"; 328cf40c968SBiju Das #interrupt-cells = <3>; 329cf40c968SBiju Das #address-cells = <0>; 330cf40c968SBiju Das interrupt-controller; 331cf40c968SBiju Das reg = <0x0 0x11900000 0 0x40000>, 332cf40c968SBiju Das <0x0 0x11940000 0 0x60000>; 333cf40c968SBiju Das interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>; 334cf40c968SBiju Das }; 335cf40c968SBiju Das 336cf40c968SBiju Das sdhi0: mmc@11c00000 { 337*20e63d39SBiju Das compatible = "renesas,sdhi-r9a07g043", 338*20e63d39SBiju Das "renesas,rcar-gen3-sdhi"; 339cf40c968SBiju Das reg = <0x0 0x11c00000 0 0x10000>; 340*20e63d39SBiju Das interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, 341*20e63d39SBiju Das <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; 342*20e63d39SBiju Das clocks = <&cpg CPG_MOD R9A07G043_SDHI0_IMCLK>, 343*20e63d39SBiju Das <&cpg CPG_MOD R9A07G043_SDHI0_CLK_HS>, 344*20e63d39SBiju Das <&cpg CPG_MOD R9A07G043_SDHI0_IMCLK2>, 345*20e63d39SBiju Das <&cpg CPG_MOD R9A07G043_SDHI0_ACLK>; 346*20e63d39SBiju Das clock-names = "core", "clkh", "cd", "aclk"; 347*20e63d39SBiju Das resets = <&cpg R9A07G043_SDHI0_IXRST>; 348*20e63d39SBiju Das power-domains = <&cpg>; 349*20e63d39SBiju Das status = "disabled"; 350cf40c968SBiju Das }; 351cf40c968SBiju Das 352cf40c968SBiju Das sdhi1: mmc@11c10000 { 353*20e63d39SBiju Das compatible = "renesas,sdhi-r9a07g043", 354*20e63d39SBiju Das "renesas,rcar-gen3-sdhi"; 355cf40c968SBiju Das reg = <0x0 0x11c10000 0 0x10000>; 356*20e63d39SBiju Das interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 357*20e63d39SBiju Das <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 358*20e63d39SBiju Das clocks = <&cpg CPG_MOD R9A07G043_SDHI1_IMCLK>, 359*20e63d39SBiju Das <&cpg CPG_MOD R9A07G043_SDHI1_CLK_HS>, 360*20e63d39SBiju Das <&cpg CPG_MOD R9A07G043_SDHI1_IMCLK2>, 361*20e63d39SBiju Das <&cpg CPG_MOD R9A07G043_SDHI1_ACLK>; 362*20e63d39SBiju Das clock-names = "core", "clkh", "cd", "aclk"; 363*20e63d39SBiju Das resets = <&cpg R9A07G043_SDHI1_IXRST>; 364*20e63d39SBiju Das power-domains = <&cpg>; 365*20e63d39SBiju Das status = "disabled"; 366cf40c968SBiju Das }; 367cf40c968SBiju Das 368cf40c968SBiju Das phyrst: usbphy-ctrl@11c40000 { 369cf40c968SBiju Das reg = <0 0x11c40000 0 0x10000>; 370cf40c968SBiju Das /* place holder */ 371cf40c968SBiju Das }; 372cf40c968SBiju Das 373cf40c968SBiju Das ohci0: usb@11c50000 { 374cf40c968SBiju Das reg = <0 0x11c50000 0 0x100>; 375cf40c968SBiju Das /* place holder */ 376cf40c968SBiju Das }; 377cf40c968SBiju Das 378cf40c968SBiju Das ohci1: usb@11c70000 { 379cf40c968SBiju Das reg = <0 0x11c70000 0 0x100>; 380cf40c968SBiju Das /* place holder */ 381cf40c968SBiju Das }; 382cf40c968SBiju Das 383cf40c968SBiju Das ehci0: usb@11c50100 { 384cf40c968SBiju Das reg = <0 0x11c50100 0 0x100>; 385cf40c968SBiju Das /* place holder */ 386cf40c968SBiju Das }; 387cf40c968SBiju Das 388cf40c968SBiju Das ehci1: usb@11c70100 { 389cf40c968SBiju Das reg = <0 0x11c70100 0 0x100>; 390cf40c968SBiju Das /* place holder */ 391cf40c968SBiju Das }; 392cf40c968SBiju Das 393cf40c968SBiju Das usb2_phy0: usb-phy@11c50200 { 394cf40c968SBiju Das reg = <0 0x11c50200 0 0x700>; 395cf40c968SBiju Das /* place holder */ 396cf40c968SBiju Das }; 397cf40c968SBiju Das 398cf40c968SBiju Das usb2_phy1: usb-phy@11c70200 { 399cf40c968SBiju Das reg = <0 0x11c70200 0 0x700>; 400cf40c968SBiju Das /* place holder */ 401cf40c968SBiju Das }; 402cf40c968SBiju Das 403cf40c968SBiju Das hsusb: usb@11c60000 { 404cf40c968SBiju Das reg = <0 0x11c60000 0 0x10000>; 405cf40c968SBiju Das /* place holder */ 406cf40c968SBiju Das }; 407cf40c968SBiju Das 408cf40c968SBiju Das wdt0: watchdog@12800800 { 409cf40c968SBiju Das reg = <0 0x12800800 0 0x400>; 410cf40c968SBiju Das /* place holder */ 411cf40c968SBiju Das }; 412cf40c968SBiju Das 413cf40c968SBiju Das wdt2: watchdog@12800400 { 414cf40c968SBiju Das reg = <0 0x12800400 0 0x400>; 415cf40c968SBiju Das /* place holder */ 416cf40c968SBiju Das }; 417cf40c968SBiju Das 418cf40c968SBiju Das ostm0: timer@12801000 { 419cf40c968SBiju Das reg = <0x0 0x12801000 0x0 0x400>; 420cf40c968SBiju Das /* place holder */ 421cf40c968SBiju Das }; 422cf40c968SBiju Das 423cf40c968SBiju Das ostm1: timer@12801400 { 424cf40c968SBiju Das reg = <0x0 0x12801400 0x0 0x400>; 425cf40c968SBiju Das /* place holder */ 426cf40c968SBiju Das }; 427cf40c968SBiju Das 428cf40c968SBiju Das ostm2: timer@12801800 { 429cf40c968SBiju Das reg = <0x0 0x12801800 0x0 0x400>; 430cf40c968SBiju Das /* place holder */ 431cf40c968SBiju Das }; 432cf40c968SBiju Das }; 433cf40c968SBiju Das 434cf40c968SBiju Das timer { 435cf40c968SBiju Das compatible = "arm,armv8-timer"; 436cf40c968SBiju Das interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, 437cf40c968SBiju Das <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, 438cf40c968SBiju Das <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>, 439cf40c968SBiju Das <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>; 440cf40c968SBiju Das }; 441cf40c968SBiju Das}; 442