1*c532a55cSGeert Uytterhoeven// SPDX-License-Identifier: (GPL-2.0 or MIT) 2*c532a55cSGeert Uytterhoeven/* 3*c532a55cSGeert Uytterhoeven * Device Tree Source for the Salvator-X 2nd version board with R-Car M3e-2G 4*c532a55cSGeert Uytterhoeven * 5*c532a55cSGeert Uytterhoeven * Copyright (C) 2021 Glider bv 6*c532a55cSGeert Uytterhoeven * 7*c532a55cSGeert Uytterhoeven * Based on r8a77961-salvator-xs.dts 8*c532a55cSGeert Uytterhoeven * Copyright (C) 2018 Renesas Electronics Corp. 9*c532a55cSGeert Uytterhoeven */ 10*c532a55cSGeert Uytterhoeven 11*c532a55cSGeert Uytterhoeven/dts-v1/; 12*c532a55cSGeert Uytterhoeven#include "r8a779m3.dtsi" 13*c532a55cSGeert Uytterhoeven#include "salvator-xs.dtsi" 14*c532a55cSGeert Uytterhoeven 15*c532a55cSGeert Uytterhoeven/ { 16*c532a55cSGeert Uytterhoeven model = "Renesas Salvator-X 2nd version board based on r8a779m3"; 17*c532a55cSGeert Uytterhoeven compatible = "renesas,salvator-xs", "renesas,r8a779m3", 18*c532a55cSGeert Uytterhoeven "renesas,r8a77961"; 19*c532a55cSGeert Uytterhoeven 20*c532a55cSGeert Uytterhoeven memory@48000000 { 21*c532a55cSGeert Uytterhoeven device_type = "memory"; 22*c532a55cSGeert Uytterhoeven /* first 128MB is reserved for secure area. */ 23*c532a55cSGeert Uytterhoeven reg = <0x0 0x48000000 0x0 0x78000000>; 24*c532a55cSGeert Uytterhoeven }; 25*c532a55cSGeert Uytterhoeven 26*c532a55cSGeert Uytterhoeven memory@480000000 { 27*c532a55cSGeert Uytterhoeven device_type = "memory"; 28*c532a55cSGeert Uytterhoeven reg = <0x4 0x80000000 0x0 0x80000000>; 29*c532a55cSGeert Uytterhoeven }; 30*c532a55cSGeert Uytterhoeven 31*c532a55cSGeert Uytterhoeven memory@600000000 { 32*c532a55cSGeert Uytterhoeven device_type = "memory"; 33*c532a55cSGeert Uytterhoeven reg = <0x6 0x00000000 0x1 0x00000000>; 34*c532a55cSGeert Uytterhoeven }; 35*c532a55cSGeert Uytterhoeven}; 36*c532a55cSGeert Uytterhoeven 37*c532a55cSGeert Uytterhoeven&du { 38*c532a55cSGeert Uytterhoeven clocks = <&cpg CPG_MOD 724>, 39*c532a55cSGeert Uytterhoeven <&cpg CPG_MOD 723>, 40*c532a55cSGeert Uytterhoeven <&cpg CPG_MOD 722>, 41*c532a55cSGeert Uytterhoeven <&versaclock6 1>, 42*c532a55cSGeert Uytterhoeven <&x21_clk>, 43*c532a55cSGeert Uytterhoeven <&versaclock6 2>; 44*c532a55cSGeert Uytterhoeven clock-names = "du.0", "du.1", "du.2", 45*c532a55cSGeert Uytterhoeven "dclkin.0", "dclkin.1", "dclkin.2"; 46*c532a55cSGeert Uytterhoeven}; 47