1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the Falcon CPU board 4 * 5 * Copyright (C) 2020 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/gpio/gpio.h> 9#include "r8a779a0.dtsi" 10 11/ { 12 model = "Renesas Falcon CPU board"; 13 compatible = "renesas,falcon-cpu", "renesas,r8a779a0"; 14 15 memory@48000000 { 16 device_type = "memory"; 17 /* first 128MB is reserved for secure area. */ 18 reg = <0x0 0x48000000 0x0 0x78000000>; 19 }; 20 21 memory@500000000 { 22 device_type = "memory"; 23 reg = <0x5 0x00000000 0x0 0x80000000>; 24 }; 25 26 memory@600000000 { 27 device_type = "memory"; 28 reg = <0x6 0x00000000 0x0 0x80000000>; 29 }; 30 31 memory@700000000 { 32 device_type = "memory"; 33 reg = <0x7 0x00000000 0x0 0x80000000>; 34 }; 35 36 reg_1p8v: regulator-1p8v { 37 compatible = "regulator-fixed"; 38 regulator-name = "fixed-1.8V"; 39 regulator-min-microvolt = <1800000>; 40 regulator-max-microvolt = <1800000>; 41 regulator-boot-on; 42 regulator-always-on; 43 }; 44 45 reg_3p3v: regulator-3p3v { 46 compatible = "regulator-fixed"; 47 regulator-name = "fixed-3.3V"; 48 regulator-min-microvolt = <3300000>; 49 regulator-max-microvolt = <3300000>; 50 regulator-boot-on; 51 regulator-always-on; 52 }; 53}; 54 55&avb0 { 56 pinctrl-0 = <&avb0_pins>; 57 pinctrl-names = "default"; 58 phy-handle = <&phy0>; 59 tx-internal-delay-ps = <2000>; 60 status = "okay"; 61 62 phy0: ethernet-phy@0 { 63 rxc-skew-ps = <1500>; 64 reg = <0>; 65 interrupt-parent = <&gpio4>; 66 interrupts = <16 IRQ_TYPE_LEVEL_LOW>; 67 reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; 68 }; 69}; 70 71&extal_clk { 72 clock-frequency = <16666666>; 73}; 74 75&extalr_clk { 76 clock-frequency = <32768>; 77}; 78 79&i2c0 { 80 pinctrl-0 = <&i2c0_pins>; 81 pinctrl-names = "default"; 82 83 status = "okay"; 84 clock-frequency = <400000>; 85 86 eeprom@50 { 87 compatible = "rohm,br24g01", "atmel,24c01"; 88 label = "cpu-board"; 89 reg = <0x50>; 90 pagesize = <8>; 91 }; 92}; 93 94&i2c1 { 95 pinctrl-0 = <&i2c1_pins>; 96 pinctrl-names = "default"; 97 98 status = "okay"; 99 clock-frequency = <400000>; 100}; 101 102&i2c6 { 103 pinctrl-0 = <&i2c6_pins>; 104 pinctrl-names = "default"; 105 106 status = "okay"; 107 clock-frequency = <400000>; 108}; 109 110&mmc0 { 111 pinctrl-0 = <&mmc_pins>; 112 pinctrl-1 = <&mmc_pins>; 113 pinctrl-names = "default", "state_uhs"; 114 115 vmmc-supply = <®_3p3v>; 116 vqmmc-supply = <®_1p8v>; 117 mmc-hs200-1_8v; 118 mmc-hs400-1_8v; 119 bus-width = <8>; 120 no-sd; 121 no-sdio; 122 non-removable; 123 full-pwr-cycle-in-suspend; 124 status = "okay"; 125}; 126 127&pfc { 128 pinctrl-0 = <&scif_clk_pins>; 129 pinctrl-names = "default"; 130 131 avb0_pins: avb0 { 132 mux { 133 groups = "avb0_link", "avb0_mdio", "avb0_rgmii", "avb0_txcrefclk"; 134 function = "avb0"; 135 }; 136 137 pins_mdio { 138 groups = "avb0_mdio"; 139 drive-strength = <21>; 140 }; 141 142 pins_mii { 143 groups = "avb0_rgmii"; 144 drive-strength = <21>; 145 }; 146 147 }; 148 149 i2c0_pins: i2c0 { 150 groups = "i2c0"; 151 function = "i2c0"; 152 }; 153 154 i2c1_pins: i2c1 { 155 groups = "i2c1"; 156 function = "i2c1"; 157 }; 158 159 i2c6_pins: i2c6 { 160 groups = "i2c6"; 161 function = "i2c6"; 162 }; 163 164 mmc_pins: mmc { 165 groups = "mmc_data8", "mmc_ctrl", "mmc_ds"; 166 function = "mmc"; 167 power-source = <1800>; 168 }; 169 170 scif0_pins: scif0 { 171 groups = "scif0_data", "scif0_ctrl"; 172 function = "scif0"; 173 }; 174 175 scif_clk_pins: scif_clk { 176 groups = "scif_clk"; 177 function = "scif_clk"; 178 }; 179}; 180 181&scif0 { 182 pinctrl-0 = <&scif0_pins>; 183 pinctrl-names = "default"; 184 185 uart-has-rtscts; 186 status = "okay"; 187}; 188 189&scif_clk { 190 clock-frequency = <24000000>; 191}; 192