1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the Falcon CPU board 4 * 5 * Copyright (C) 2020 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/gpio/gpio.h> 9#include "r8a779a0.dtsi" 10 11/ { 12 model = "Renesas Falcon CPU board"; 13 compatible = "renesas,falcon-cpu", "renesas,r8a779a0"; 14 15 aliases { 16 serial0 = &scif0; 17 }; 18 19 chosen { 20 stdout-path = "serial0:115200n8"; 21 }; 22 23 memory@48000000 { 24 device_type = "memory"; 25 /* first 128MB is reserved for secure area. */ 26 reg = <0x0 0x48000000 0x0 0x78000000>; 27 }; 28 29 memory@500000000 { 30 device_type = "memory"; 31 reg = <0x5 0x00000000 0x0 0x80000000>; 32 }; 33 34 memory@600000000 { 35 device_type = "memory"; 36 reg = <0x6 0x00000000 0x0 0x80000000>; 37 }; 38 39 memory@700000000 { 40 device_type = "memory"; 41 reg = <0x7 0x00000000 0x0 0x80000000>; 42 }; 43 44 reg_1p8v: regulator-1p8v { 45 compatible = "regulator-fixed"; 46 regulator-name = "fixed-1.8V"; 47 regulator-min-microvolt = <1800000>; 48 regulator-max-microvolt = <1800000>; 49 regulator-boot-on; 50 regulator-always-on; 51 }; 52 53 reg_3p3v: regulator-3p3v { 54 compatible = "regulator-fixed"; 55 regulator-name = "fixed-3.3V"; 56 regulator-min-microvolt = <3300000>; 57 regulator-max-microvolt = <3300000>; 58 regulator-boot-on; 59 regulator-always-on; 60 }; 61}; 62 63&avb0 { 64 pinctrl-0 = <&avb0_pins>; 65 pinctrl-names = "default"; 66 phy-handle = <&phy0>; 67 tx-internal-delay-ps = <2000>; 68 status = "okay"; 69 70 phy0: ethernet-phy@0 { 71 rxc-skew-ps = <1500>; 72 reg = <0>; 73 interrupt-parent = <&gpio4>; 74 interrupts = <16 IRQ_TYPE_LEVEL_LOW>; 75 reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; 76 }; 77}; 78 79&extal_clk { 80 clock-frequency = <16666666>; 81}; 82 83&extalr_clk { 84 clock-frequency = <32768>; 85}; 86 87&i2c0 { 88 pinctrl-0 = <&i2c0_pins>; 89 pinctrl-names = "default"; 90 91 status = "okay"; 92 clock-frequency = <400000>; 93 94 eeprom@50 { 95 compatible = "rohm,br24g01", "atmel,24c01"; 96 label = "cpu-board"; 97 reg = <0x50>; 98 pagesize = <8>; 99 }; 100}; 101 102&i2c1 { 103 pinctrl-0 = <&i2c1_pins>; 104 pinctrl-names = "default"; 105 106 status = "okay"; 107 clock-frequency = <400000>; 108}; 109 110&i2c6 { 111 pinctrl-0 = <&i2c6_pins>; 112 pinctrl-names = "default"; 113 114 status = "okay"; 115 clock-frequency = <400000>; 116}; 117 118&mmc0 { 119 pinctrl-0 = <&mmc_pins>; 120 pinctrl-1 = <&mmc_pins>; 121 pinctrl-names = "default", "state_uhs"; 122 123 vmmc-supply = <®_3p3v>; 124 vqmmc-supply = <®_1p8v>; 125 mmc-hs200-1_8v; 126 mmc-hs400-1_8v; 127 bus-width = <8>; 128 no-sd; 129 no-sdio; 130 non-removable; 131 full-pwr-cycle-in-suspend; 132 status = "okay"; 133}; 134 135&pfc { 136 pinctrl-0 = <&scif_clk_pins>; 137 pinctrl-names = "default"; 138 139 avb0_pins: avb0 { 140 mux { 141 groups = "avb0_link", "avb0_mdio", "avb0_rgmii", "avb0_txcrefclk"; 142 function = "avb0"; 143 }; 144 145 pins_mdio { 146 groups = "avb0_mdio"; 147 drive-strength = <21>; 148 }; 149 150 pins_mii { 151 groups = "avb0_rgmii"; 152 drive-strength = <21>; 153 }; 154 155 }; 156 157 i2c0_pins: i2c0 { 158 groups = "i2c0"; 159 function = "i2c0"; 160 }; 161 162 i2c1_pins: i2c1 { 163 groups = "i2c1"; 164 function = "i2c1"; 165 }; 166 167 i2c6_pins: i2c6 { 168 groups = "i2c6"; 169 function = "i2c6"; 170 }; 171 172 mmc_pins: mmc { 173 groups = "mmc_data8", "mmc_ctrl", "mmc_ds"; 174 function = "mmc"; 175 power-source = <1800>; 176 }; 177 178 scif0_pins: scif0 { 179 groups = "scif0_data", "scif0_ctrl"; 180 function = "scif0"; 181 }; 182 183 scif_clk_pins: scif_clk { 184 groups = "scif_clk"; 185 function = "scif_clk"; 186 }; 187}; 188 189&scif0 { 190 pinctrl-0 = <&scif0_pins>; 191 pinctrl-names = "default"; 192 193 uart-has-rtscts; 194 status = "okay"; 195}; 196 197&scif_clk { 198 clock-frequency = <24000000>; 199}; 200