1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the Falcon CPU board 4 * 5 * Copyright (C) 2020 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/gpio/gpio.h> 9#include <dt-bindings/input/input.h> 10#include <dt-bindings/leds/common.h> 11 12#include "r8a779a0.dtsi" 13 14/ { 15 model = "Renesas Falcon CPU board"; 16 compatible = "renesas,falcon-cpu", "renesas,r8a779a0"; 17 18 aliases { 19 i2c0 = &i2c0; 20 i2c1 = &i2c1; 21 i2c2 = &i2c2; 22 i2c3 = &i2c3; 23 i2c4 = &i2c4; 24 i2c5 = &i2c5; 25 i2c6 = &i2c6; 26 serial0 = &scif0; 27 }; 28 29 chosen { 30 stdout-path = "serial0:115200n8"; 31 }; 32 33 keys { 34 compatible = "gpio-keys"; 35 36 pinctrl-0 = <&keys_pins>; 37 pinctrl-names = "default"; 38 39 key-1 { 40 gpios = <&gpio6 18 GPIO_ACTIVE_LOW>; 41 linux,code = <KEY_1>; 42 label = "SW47"; 43 wakeup-source; 44 debounce-interval = <20>; 45 }; 46 47 key-2 { 48 gpios = <&gpio6 19 GPIO_ACTIVE_LOW>; 49 linux,code = <KEY_2>; 50 label = "SW48"; 51 wakeup-source; 52 debounce-interval = <20>; 53 }; 54 55 key-3 { 56 gpios = <&gpio6 20 GPIO_ACTIVE_LOW>; 57 linux,code = <KEY_3>; 58 label = "SW49"; 59 wakeup-source; 60 debounce-interval = <20>; 61 }; 62 }; 63 64 leds { 65 compatible = "gpio-leds"; 66 67 led-1 { 68 gpios = <&gpio4 18 GPIO_ACTIVE_HIGH>; 69 color = <LED_COLOR_ID_GREEN>; 70 function = LED_FUNCTION_INDICATOR; 71 function-enumerator = <1>; 72 }; 73 led-2 { 74 gpios = <&gpio4 19 GPIO_ACTIVE_HIGH>; 75 color = <LED_COLOR_ID_GREEN>; 76 function = LED_FUNCTION_INDICATOR; 77 function-enumerator = <2>; 78 }; 79 led-3 { 80 gpios = <&gpio4 20 GPIO_ACTIVE_HIGH>; 81 color = <LED_COLOR_ID_GREEN>; 82 function = LED_FUNCTION_INDICATOR; 83 function-enumerator = <3>; 84 }; 85 }; 86 87 memory@48000000 { 88 device_type = "memory"; 89 /* first 128MB is reserved for secure area. */ 90 reg = <0x0 0x48000000 0x0 0x78000000>; 91 }; 92 93 memory@500000000 { 94 device_type = "memory"; 95 reg = <0x5 0x00000000 0x0 0x80000000>; 96 }; 97 98 memory@600000000 { 99 device_type = "memory"; 100 reg = <0x6 0x00000000 0x0 0x80000000>; 101 }; 102 103 memory@700000000 { 104 device_type = "memory"; 105 reg = <0x7 0x00000000 0x0 0x80000000>; 106 }; 107 108 mini-dp-con { 109 compatible = "dp-connector"; 110 label = "CN5"; 111 type = "mini"; 112 113 port { 114 mini_dp_con_in: endpoint { 115 remote-endpoint = <&sn65dsi86_out>; 116 }; 117 }; 118 }; 119 120 reg_1p2v: regulator-1p2v { 121 compatible = "regulator-fixed"; 122 regulator-name = "fixed-1.2V"; 123 regulator-min-microvolt = <1200000>; 124 regulator-max-microvolt = <1200000>; 125 regulator-boot-on; 126 regulator-always-on; 127 }; 128 129 reg_1p8v: regulator-1p8v { 130 compatible = "regulator-fixed"; 131 regulator-name = "fixed-1.8V"; 132 regulator-min-microvolt = <1800000>; 133 regulator-max-microvolt = <1800000>; 134 regulator-boot-on; 135 regulator-always-on; 136 }; 137 138 reg_3p3v: regulator-3p3v { 139 compatible = "regulator-fixed"; 140 regulator-name = "fixed-3.3V"; 141 regulator-min-microvolt = <3300000>; 142 regulator-max-microvolt = <3300000>; 143 regulator-boot-on; 144 regulator-always-on; 145 }; 146 147 sn65dsi86_refclk: clk-x6 { 148 compatible = "fixed-clock"; 149 #clock-cells = <0>; 150 clock-frequency = <38400000>; 151 }; 152}; 153 154&dsi0 { 155 status = "okay"; 156 157 ports { 158 port@1 { 159 dsi0_out: endpoint { 160 remote-endpoint = <&sn65dsi86_in>; 161 data-lanes = <1 2 3 4>; 162 }; 163 }; 164 }; 165}; 166 167&du { 168 status = "okay"; 169}; 170 171&extal_clk { 172 clock-frequency = <16666666>; 173}; 174 175&extalr_clk { 176 clock-frequency = <32768>; 177}; 178 179&i2c0 { 180 pinctrl-0 = <&i2c0_pins>; 181 pinctrl-names = "default"; 182 183 status = "okay"; 184 clock-frequency = <400000>; 185 186 eeprom@50 { 187 compatible = "rohm,br24g01", "atmel,24c01"; 188 label = "cpu-board"; 189 reg = <0x50>; 190 pagesize = <8>; 191 }; 192}; 193 194&i2c1 { 195 pinctrl-0 = <&i2c1_pins>; 196 pinctrl-names = "default"; 197 198 status = "okay"; 199 clock-frequency = <400000>; 200 201 bridge@2c { 202 pinctrl-0 = <&irq0_pins>; 203 pinctrl-names = "default"; 204 205 compatible = "ti,sn65dsi86"; 206 reg = <0x2c>; 207 208 clocks = <&sn65dsi86_refclk>; 209 clock-names = "refclk"; 210 211 interrupt-parent = <&intc_ex>; 212 interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; 213 214 vccio-supply = <®_1p8v>; 215 vpll-supply = <®_1p8v>; 216 vcca-supply = <®_1p2v>; 217 vcc-supply = <®_1p2v>; 218 219 ports { 220 #address-cells = <1>; 221 #size-cells = <0>; 222 223 port@0 { 224 reg = <0>; 225 sn65dsi86_in: endpoint { 226 remote-endpoint = <&dsi0_out>; 227 }; 228 }; 229 230 port@1 { 231 reg = <1>; 232 sn65dsi86_out: endpoint { 233 remote-endpoint = <&mini_dp_con_in>; 234 }; 235 }; 236 }; 237 }; 238}; 239 240&i2c6 { 241 pinctrl-0 = <&i2c6_pins>; 242 pinctrl-names = "default"; 243 244 status = "okay"; 245 clock-frequency = <400000>; 246}; 247 248&mmc0 { 249 pinctrl-0 = <&mmc_pins>; 250 pinctrl-1 = <&mmc_pins>; 251 pinctrl-names = "default", "state_uhs"; 252 253 vmmc-supply = <®_3p3v>; 254 vqmmc-supply = <®_1p8v>; 255 mmc-hs200-1_8v; 256 mmc-hs400-1_8v; 257 bus-width = <8>; 258 no-sd; 259 no-sdio; 260 non-removable; 261 full-pwr-cycle-in-suspend; 262 status = "okay"; 263}; 264 265&pfc { 266 pinctrl-0 = <&scif_clk_pins>; 267 pinctrl-names = "default"; 268 269 i2c0_pins: i2c0 { 270 groups = "i2c0"; 271 function = "i2c0"; 272 }; 273 274 i2c1_pins: i2c1 { 275 groups = "i2c1"; 276 function = "i2c1"; 277 }; 278 279 i2c6_pins: i2c6 { 280 groups = "i2c6"; 281 function = "i2c6"; 282 }; 283 284 irq0_pins: irq0 { 285 groups = "intc_ex_irq0"; 286 function = "intc_ex"; 287 }; 288 289 keys_pins: keys { 290 pins = "GP_6_18", "GP_6_19", "GP_6_20"; 291 bias-pull-up; 292 }; 293 294 mmc_pins: mmc { 295 groups = "mmc_data8", "mmc_ctrl", "mmc_ds"; 296 function = "mmc"; 297 power-source = <1800>; 298 }; 299 300 qspi0_pins: qspi0 { 301 groups = "qspi0_ctrl", "qspi0_data4"; 302 function = "qspi0"; 303 }; 304 305 scif0_pins: scif0 { 306 groups = "scif0_data", "scif0_ctrl"; 307 function = "scif0"; 308 }; 309 310 scif_clk_pins: scif_clk { 311 groups = "scif_clk"; 312 function = "scif_clk"; 313 }; 314}; 315 316&rpc { 317 pinctrl-0 = <&qspi0_pins>; 318 pinctrl-names = "default"; 319 320 status = "okay"; 321 322 flash@0 { 323 compatible = "spansion,s25fs512s", "jedec,spi-nor"; 324 reg = <0>; 325 spi-max-frequency = <40000000>; 326 spi-rx-bus-width = <4>; 327 328 partitions { 329 compatible = "fixed-partitions"; 330 #address-cells = <1>; 331 #size-cells = <1>; 332 333 boot@0 { 334 reg = <0x0 0xcc0000>; 335 read-only; 336 }; 337 user@cc0000 { 338 reg = <0xcc0000 0x3340000>; 339 }; 340 }; 341 }; 342}; 343 344&rwdt { 345 timeout-sec = <60>; 346 status = "okay"; 347}; 348 349&scif0 { 350 pinctrl-0 = <&scif0_pins>; 351 pinctrl-names = "default"; 352 353 uart-has-rtscts; 354 status = "okay"; 355}; 356 357&scif_clk { 358 clock-frequency = <24000000>; 359}; 360