xref: /linux/scripts/dtc/include-prefixes/arm64/renesas/r8a77970-eagle.dts (revision e9550a536e3edd23b88926a6fb27fa200b56dfa9)
1cba59c25SWolfram Sang// SPDX-License-Identifier: GPL-2.0
21a48290eSSergei Shtylyov/*
31a48290eSSergei Shtylyov * Device Tree Source for the Eagle board
41a48290eSSergei Shtylyov *
51a48290eSSergei Shtylyov * Copyright (C) 2016-2017 Renesas Electronics Corp.
61a48290eSSergei Shtylyov * Copyright (C) 2017 Cogent Embedded, Inc.
71a48290eSSergei Shtylyov */
81a48290eSSergei Shtylyov
91a48290eSSergei Shtylyov/dts-v1/;
101a48290eSSergei Shtylyov#include "r8a77970.dtsi"
111a48290eSSergei Shtylyov
121a48290eSSergei Shtylyov/ {
131a48290eSSergei Shtylyov	model = "Renesas Eagle board based on r8a77970";
141a48290eSSergei Shtylyov	compatible = "renesas,eagle", "renesas,r8a77970";
151a48290eSSergei Shtylyov
161a48290eSSergei Shtylyov	aliases {
171a48290eSSergei Shtylyov		serial0 = &scif0;
1838525608SSergei Shtylyov		ethernet0 = &avb;
191a48290eSSergei Shtylyov	};
201a48290eSSergei Shtylyov
211a48290eSSergei Shtylyov	chosen {
22b31b43c9SMagnus Damm		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
231a48290eSSergei Shtylyov		stdout-path = "serial0:115200n8";
241a48290eSSergei Shtylyov	};
251a48290eSSergei Shtylyov
2683c5cf19SYoshihiro Kaneko	d3p3: regulator-fixed {
2783c5cf19SYoshihiro Kaneko		compatible = "regulator-fixed";
2883c5cf19SYoshihiro Kaneko		regulator-name = "fixed-3.3V";
2983c5cf19SYoshihiro Kaneko		regulator-min-microvolt = <3300000>;
3083c5cf19SYoshihiro Kaneko		regulator-max-microvolt = <3300000>;
3183c5cf19SYoshihiro Kaneko		regulator-boot-on;
3283c5cf19SYoshihiro Kaneko		regulator-always-on;
331a48290eSSergei Shtylyov	};
343c3d1672SJacopo Mondi
353c3d1672SJacopo Mondi	hdmi-out {
363c3d1672SJacopo Mondi		compatible = "hdmi-connector";
373c3d1672SJacopo Mondi		type = "a";
383c3d1672SJacopo Mondi
393c3d1672SJacopo Mondi		port {
403c3d1672SJacopo Mondi			hdmi_con_out: endpoint {
413c3d1672SJacopo Mondi				remote-endpoint = <&adv7511_out>;
423c3d1672SJacopo Mondi			};
433c3d1672SJacopo Mondi		};
443c3d1672SJacopo Mondi	};
453c3d1672SJacopo Mondi
463c3d1672SJacopo Mondi	lvds-decoder {
473c3d1672SJacopo Mondi		compatible = "thine,thc63lvd1024";
483c3d1672SJacopo Mondi
493c3d1672SJacopo Mondi		vcc-supply = <&d3p3>;
503c3d1672SJacopo Mondi
513c3d1672SJacopo Mondi		ports {
523c3d1672SJacopo Mondi			#address-cells = <1>;
533c3d1672SJacopo Mondi			#size-cells = <0>;
543c3d1672SJacopo Mondi
553c3d1672SJacopo Mondi			port@0 {
563c3d1672SJacopo Mondi				reg = <0>;
573c3d1672SJacopo Mondi				thc63lvd1024_in: endpoint {
583c3d1672SJacopo Mondi					remote-endpoint = <&lvds0_out>;
593c3d1672SJacopo Mondi				};
603c3d1672SJacopo Mondi			};
613c3d1672SJacopo Mondi
623c3d1672SJacopo Mondi			port@2 {
633c3d1672SJacopo Mondi				reg = <2>;
643c3d1672SJacopo Mondi				thc63lvd1024_out: endpoint {
653c3d1672SJacopo Mondi					remote-endpoint = <&adv7511_in>;
663c3d1672SJacopo Mondi				};
673c3d1672SJacopo Mondi			};
683c3d1672SJacopo Mondi		};
693c3d1672SJacopo Mondi	};
7083c5cf19SYoshihiro Kaneko
7183c5cf19SYoshihiro Kaneko	memory@48000000 {
7283c5cf19SYoshihiro Kaneko		device_type = "memory";
7383c5cf19SYoshihiro Kaneko		/* first 128MB is reserved for secure area. */
7483c5cf19SYoshihiro Kaneko		reg = <0x0 0x48000000 0x0 0x38000000>;
7583c5cf19SYoshihiro Kaneko	};
76*e9550a53SValentine Barshak
77*e9550a53SValentine Barshak	x1_clk: x1-clock {
78*e9550a53SValentine Barshak		compatible = "fixed-clock";
79*e9550a53SValentine Barshak		#clock-cells = <0>;
80*e9550a53SValentine Barshak		clock-frequency = <148500000>;
81*e9550a53SValentine Barshak	};
821a48290eSSergei Shtylyov};
831a48290eSSergei Shtylyov
84d0ff035fSGeert Uytterhoeven&avb {
851119cffeSSergei Shtylyov	pinctrl-0 = <&avb_pins>;
861119cffeSSergei Shtylyov	pinctrl-names = "default";
871119cffeSSergei Shtylyov
88d0ff035fSGeert Uytterhoeven	renesas,no-ether-link;
89d0ff035fSGeert Uytterhoeven	phy-handle = <&phy0>;
909b810181SGeert Uytterhoeven	rx-internal-delay-ps = <1800>;
919b810181SGeert Uytterhoeven	tx-internal-delay-ps = <2000>;
92d0ff035fSGeert Uytterhoeven	status = "okay";
93d0ff035fSGeert Uytterhoeven
94d0ff035fSGeert Uytterhoeven	phy0: ethernet-phy@0 {
95d0ff035fSGeert Uytterhoeven		rxc-skew-ps = <1500>;
96d0ff035fSGeert Uytterhoeven		reg = <0>;
9751671b26SSergei Shtylyov		interrupt-parent = <&gpio1>;
9851671b26SSergei Shtylyov		interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
99d0ff035fSGeert Uytterhoeven	};
100d0ff035fSGeert Uytterhoeven};
101d0ff035fSGeert Uytterhoeven
102bb8d2033SSergei Shtylyov&canfd {
103bb8d2033SSergei Shtylyov	pinctrl-0 = <&canfd0_pins>;
104bb8d2033SSergei Shtylyov	pinctrl-names = "default";
105bb8d2033SSergei Shtylyov	status = "okay";
106bb8d2033SSergei Shtylyov
107bb8d2033SSergei Shtylyov	channel0 {
108bb8d2033SSergei Shtylyov		status = "okay";
109bb8d2033SSergei Shtylyov	};
110bb8d2033SSergei Shtylyov};
111bb8d2033SSergei Shtylyov
11283c5cf19SYoshihiro Kaneko&du {
113*e9550a53SValentine Barshak	clocks = <&cpg CPG_MOD 724>, <&x1_clk>;
114*e9550a53SValentine Barshak	clock-names = "du.0", "dclkin.0";
11583c5cf19SYoshihiro Kaneko	status = "okay";
11683c5cf19SYoshihiro Kaneko};
11783c5cf19SYoshihiro Kaneko
1181a48290eSSergei Shtylyov&extal_clk {
1191a48290eSSergei Shtylyov	clock-frequency = <16666666>;
1201a48290eSSergei Shtylyov};
1211a48290eSSergei Shtylyov
1221a48290eSSergei Shtylyov&extalr_clk {
1231a48290eSSergei Shtylyov	clock-frequency = <32768>;
1241a48290eSSergei Shtylyov};
1251a48290eSSergei Shtylyov
1267859eb31SSergei Shtylyov&i2c0 {
1277859eb31SSergei Shtylyov	pinctrl-0 = <&i2c0_pins>;
1287859eb31SSergei Shtylyov	pinctrl-names = "default";
1297859eb31SSergei Shtylyov
1307859eb31SSergei Shtylyov	status = "okay";
1317859eb31SSergei Shtylyov	clock-frequency = <400000>;
1327859eb31SSergei Shtylyov
1337859eb31SSergei Shtylyov	io_expander: gpio@20 {
1347859eb31SSergei Shtylyov		compatible = "onnn,pca9654";
1357859eb31SSergei Shtylyov		reg = <0x20>;
1367859eb31SSergei Shtylyov		gpio-controller;
1377859eb31SSergei Shtylyov		#gpio-cells = <2>;
1387859eb31SSergei Shtylyov	};
1393c3d1672SJacopo Mondi
1403c3d1672SJacopo Mondi	hdmi@39 {
1413c3d1672SJacopo Mondi		compatible = "adi,adv7511w";
1423c3d1672SJacopo Mondi		reg = <0x39>;
1433c3d1672SJacopo Mondi		interrupt-parent = <&gpio1>;
1443c3d1672SJacopo Mondi		interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
1453c3d1672SJacopo Mondi
1463c3d1672SJacopo Mondi		adi,input-depth = <8>;
1473c3d1672SJacopo Mondi		adi,input-colorspace = "rgb";
1483c3d1672SJacopo Mondi		adi,input-clock = "1x";
1493c3d1672SJacopo Mondi
1503c3d1672SJacopo Mondi		ports {
1513c3d1672SJacopo Mondi			#address-cells = <1>;
1523c3d1672SJacopo Mondi			#size-cells = <0>;
1533c3d1672SJacopo Mondi
1543c3d1672SJacopo Mondi			port@0 {
1553c3d1672SJacopo Mondi				reg = <0>;
1563c3d1672SJacopo Mondi				adv7511_in: endpoint {
1573c3d1672SJacopo Mondi					remote-endpoint = <&thc63lvd1024_out>;
1583c3d1672SJacopo Mondi				};
1593c3d1672SJacopo Mondi			};
1603c3d1672SJacopo Mondi
1613c3d1672SJacopo Mondi			port@1 {
1623c3d1672SJacopo Mondi				reg = <1>;
1633c3d1672SJacopo Mondi				adv7511_out: endpoint {
1643c3d1672SJacopo Mondi					remote-endpoint = <&hdmi_con_out>;
1653c3d1672SJacopo Mondi				};
1663c3d1672SJacopo Mondi			};
1673c3d1672SJacopo Mondi		};
1683c3d1672SJacopo Mondi	};
1697859eb31SSergei Shtylyov};
1707859eb31SSergei Shtylyov
17183c5cf19SYoshihiro Kaneko&lvds0 {
17283c5cf19SYoshihiro Kaneko	status = "okay";
17383c5cf19SYoshihiro Kaneko
17483c5cf19SYoshihiro Kaneko	ports {
17583c5cf19SYoshihiro Kaneko		port@1 {
17683c5cf19SYoshihiro Kaneko			lvds0_out: endpoint {
17783c5cf19SYoshihiro Kaneko				remote-endpoint = <&thc63lvd1024_in>;
17883c5cf19SYoshihiro Kaneko			};
17983c5cf19SYoshihiro Kaneko		};
18083c5cf19SYoshihiro Kaneko	};
18183c5cf19SYoshihiro Kaneko};
18283c5cf19SYoshihiro Kaneko
18331bded67SSergei Shtylyov&pfc {
1841119cffeSSergei Shtylyov	avb_pins: avb0 {
1851119cffeSSergei Shtylyov		groups = "avb0_mdio", "avb0_rgmii", "avb0_txcrefclk";
1861119cffeSSergei Shtylyov		function = "avb0";
1871119cffeSSergei Shtylyov	};
1881119cffeSSergei Shtylyov
189bb8d2033SSergei Shtylyov	canfd0_pins: canfd0 {
190bb8d2033SSergei Shtylyov		groups = "canfd0_data_a";
191bb8d2033SSergei Shtylyov		function = "canfd0";
192bb8d2033SSergei Shtylyov	};
193bb8d2033SSergei Shtylyov
1947859eb31SSergei Shtylyov	i2c0_pins: i2c0 {
1957859eb31SSergei Shtylyov		groups = "i2c0";
1967859eb31SSergei Shtylyov		function = "i2c0";
1977859eb31SSergei Shtylyov	};
1987859eb31SSergei Shtylyov
199daa36ae0SSergei Shtylyov	qspi0_pins: qspi0 {
200daa36ae0SSergei Shtylyov		groups = "qspi0_ctrl", "qspi0_data4";
201daa36ae0SSergei Shtylyov		function = "qspi0";
202daa36ae0SSergei Shtylyov	};
203daa36ae0SSergei Shtylyov
20431bded67SSergei Shtylyov	scif0_pins: scif0 {
20531bded67SSergei Shtylyov		groups = "scif0_data";
20631bded67SSergei Shtylyov		function = "scif0";
20731bded67SSergei Shtylyov	};
20831bded67SSergei Shtylyov};
20931bded67SSergei Shtylyov
210daa36ae0SSergei Shtylyov&rpc {
211daa36ae0SSergei Shtylyov	pinctrl-0 = <&qspi0_pins>;
212daa36ae0SSergei Shtylyov	pinctrl-names = "default";
213daa36ae0SSergei Shtylyov
214daa36ae0SSergei Shtylyov	status = "okay";
215daa36ae0SSergei Shtylyov
216daa36ae0SSergei Shtylyov	flash@0 {
217daa36ae0SSergei Shtylyov		compatible = "spansion,s25fs512s", "jedec,spi-nor";
218daa36ae0SSergei Shtylyov		reg = <0>;
219daa36ae0SSergei Shtylyov		spi-max-frequency = <50000000>;
220daa36ae0SSergei Shtylyov		spi-rx-bus-width = <4>;
221daa36ae0SSergei Shtylyov
222daa36ae0SSergei Shtylyov		partitions {
223daa36ae0SSergei Shtylyov			compatible = "fixed-partitions";
224daa36ae0SSergei Shtylyov			#address-cells = <1>;
225daa36ae0SSergei Shtylyov			#size-cells = <1>;
226daa36ae0SSergei Shtylyov
227daa36ae0SSergei Shtylyov			bootparam@0 {
228daa36ae0SSergei Shtylyov				reg = <0x00000000 0x040000>;
229daa36ae0SSergei Shtylyov				read-only;
230daa36ae0SSergei Shtylyov			};
231daa36ae0SSergei Shtylyov			cr7@40000 {
232daa36ae0SSergei Shtylyov				reg = <0x00040000 0x080000>;
233daa36ae0SSergei Shtylyov				read-only;
234daa36ae0SSergei Shtylyov			};
235daa36ae0SSergei Shtylyov			cert_header_sa3@c0000 {
236daa36ae0SSergei Shtylyov				reg = <0x000c0000 0x080000>;
237daa36ae0SSergei Shtylyov				read-only;
238daa36ae0SSergei Shtylyov			};
239daa36ae0SSergei Shtylyov			bl2@140000 {
240daa36ae0SSergei Shtylyov				reg = <0x00140000 0x040000>;
241daa36ae0SSergei Shtylyov				read-only;
242daa36ae0SSergei Shtylyov			};
243daa36ae0SSergei Shtylyov			cert_header_sa6@180000 {
244daa36ae0SSergei Shtylyov				reg = <0x00180000 0x040000>;
245daa36ae0SSergei Shtylyov				read-only;
246daa36ae0SSergei Shtylyov			};
247daa36ae0SSergei Shtylyov			bl31@1c0000 {
248daa36ae0SSergei Shtylyov				reg = <0x001c0000 0x460000>;
249daa36ae0SSergei Shtylyov				read-only;
250daa36ae0SSergei Shtylyov			};
251daa36ae0SSergei Shtylyov			uboot@640000 {
252daa36ae0SSergei Shtylyov				reg = <0x00640000 0x0c0000>;
253daa36ae0SSergei Shtylyov				read-only;
254daa36ae0SSergei Shtylyov			};
255daa36ae0SSergei Shtylyov			uboot-env@700000 {
256daa36ae0SSergei Shtylyov				reg = <0x00700000 0x040000>;
257daa36ae0SSergei Shtylyov				read-only;
258daa36ae0SSergei Shtylyov			};
259daa36ae0SSergei Shtylyov			dtb@740000 {
260daa36ae0SSergei Shtylyov				reg = <0x00740000 0x080000>;
261daa36ae0SSergei Shtylyov			};
262daa36ae0SSergei Shtylyov			kernel@7c0000 {
263daa36ae0SSergei Shtylyov				reg = <0x007c0000 0x1400000>;
264daa36ae0SSergei Shtylyov			};
265daa36ae0SSergei Shtylyov			user@1bc0000 {
266daa36ae0SSergei Shtylyov				reg = <0x01bc0000 0x2440000>;
267daa36ae0SSergei Shtylyov			};
268daa36ae0SSergei Shtylyov		};
269daa36ae0SSergei Shtylyov	};
270daa36ae0SSergei Shtylyov};
271daa36ae0SSergei Shtylyov
272fd363f54SGeert Uytterhoeven&rwdt {
273fd363f54SGeert Uytterhoeven	timeout-sec = <60>;
274fd363f54SGeert Uytterhoeven	status = "okay";
275fd363f54SGeert Uytterhoeven};
276fd363f54SGeert Uytterhoeven
2771a48290eSSergei Shtylyov&scif0 {
27831bded67SSergei Shtylyov	pinctrl-0 = <&scif0_pins>;
27931bded67SSergei Shtylyov	pinctrl-names = "default";
28031bded67SSergei Shtylyov
2811a48290eSSergei Shtylyov	status = "okay";
2821a48290eSSergei Shtylyov};
283