xref: /linux/scripts/dtc/include-prefixes/arm64/renesas/r8a77970-eagle.dts (revision 31bded67ad215be592deda0c9ee8acdfe2067243)
11a48290eSSergei Shtylyov/*
21a48290eSSergei Shtylyov * Device Tree Source for the Eagle board
31a48290eSSergei Shtylyov *
41a48290eSSergei Shtylyov * Copyright (C) 2016-2017 Renesas Electronics Corp.
51a48290eSSergei Shtylyov * Copyright (C) 2017 Cogent Embedded, Inc.
61a48290eSSergei Shtylyov *
71a48290eSSergei Shtylyov * This file is licensed under the terms of the GNU General Public License
81a48290eSSergei Shtylyov * version 2.  This program is licensed "as is" without any warranty of any
91a48290eSSergei Shtylyov * kind, whether express or implied.
101a48290eSSergei Shtylyov */
111a48290eSSergei Shtylyov
121a48290eSSergei Shtylyov/dts-v1/;
131a48290eSSergei Shtylyov#include "r8a77970.dtsi"
141a48290eSSergei Shtylyov
151a48290eSSergei Shtylyov/ {
161a48290eSSergei Shtylyov	model = "Renesas Eagle board based on r8a77970";
171a48290eSSergei Shtylyov	compatible = "renesas,eagle", "renesas,r8a77970";
181a48290eSSergei Shtylyov
191a48290eSSergei Shtylyov	aliases {
201a48290eSSergei Shtylyov		serial0 = &scif0;
2138525608SSergei Shtylyov		ethernet0 = &avb;
221a48290eSSergei Shtylyov	};
231a48290eSSergei Shtylyov
241a48290eSSergei Shtylyov	chosen {
2538525608SSergei Shtylyov		bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
261a48290eSSergei Shtylyov		stdout-path = "serial0:115200n8";
271a48290eSSergei Shtylyov	};
281a48290eSSergei Shtylyov
291a48290eSSergei Shtylyov	memory@48000000 {
301a48290eSSergei Shtylyov		device_type = "memory";
311a48290eSSergei Shtylyov		/* first 128MB is reserved for secure area. */
321a48290eSSergei Shtylyov		reg = <0x0 0x48000000 0x0 0x38000000>;
331a48290eSSergei Shtylyov	};
341a48290eSSergei Shtylyov};
351a48290eSSergei Shtylyov
36d0ff035fSGeert Uytterhoeven&avb {
37d0ff035fSGeert Uytterhoeven	renesas,no-ether-link;
38d0ff035fSGeert Uytterhoeven	phy-handle = <&phy0>;
39d0ff035fSGeert Uytterhoeven	status = "okay";
40d0ff035fSGeert Uytterhoeven
41d0ff035fSGeert Uytterhoeven	phy0: ethernet-phy@0 {
42d0ff035fSGeert Uytterhoeven		rxc-skew-ps = <1500>;
43d0ff035fSGeert Uytterhoeven		reg = <0>;
44d0ff035fSGeert Uytterhoeven	};
45d0ff035fSGeert Uytterhoeven};
46d0ff035fSGeert Uytterhoeven
471a48290eSSergei Shtylyov&extal_clk {
481a48290eSSergei Shtylyov	clock-frequency = <16666666>;
491a48290eSSergei Shtylyov};
501a48290eSSergei Shtylyov
511a48290eSSergei Shtylyov&extalr_clk {
521a48290eSSergei Shtylyov	clock-frequency = <32768>;
531a48290eSSergei Shtylyov};
541a48290eSSergei Shtylyov
55*31bded67SSergei Shtylyov&pfc {
56*31bded67SSergei Shtylyov	scif0_pins: scif0 {
57*31bded67SSergei Shtylyov		groups = "scif0_data";
58*31bded67SSergei Shtylyov		function = "scif0";
59*31bded67SSergei Shtylyov	};
60*31bded67SSergei Shtylyov};
61*31bded67SSergei Shtylyov
62fd363f54SGeert Uytterhoeven&rwdt {
63fd363f54SGeert Uytterhoeven	timeout-sec = <60>;
64fd363f54SGeert Uytterhoeven	status = "okay";
65fd363f54SGeert Uytterhoeven};
66fd363f54SGeert Uytterhoeven
671a48290eSSergei Shtylyov&scif0 {
68*31bded67SSergei Shtylyov	pinctrl-0 = <&scif0_pins>;
69*31bded67SSergei Shtylyov	pinctrl-names = "default";
70*31bded67SSergei Shtylyov
711a48290eSSergei Shtylyov	status = "okay";
721a48290eSSergei Shtylyov};
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